Datasheet IW4053BDW, IW4053BN Datasheet (INTEGRAL)

TECHNICAL DATA

109

Analog Multiplexer Demultiplexer

High-Performance Silicon-Gate CMOS

The IW4053B analog multiplexer/demultiplexer is digitally controlled analog switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20V peak-topeak can be achieved by digital signal amplitudes of 4.5 to 20V (if V

CC

- GND = 3V, a VCC - VEE of up to 13 V can be controlled; for VCC V

EE

level differences above 13V a VCC - GND of at least 4.5V is

required).

These multiplexer circuits dissipate extremely low quiescent power over the full V

CC

-GND and VCC - VEE supply-voltage ranges, independent of the logic state of the control signals. When a logic “1”is present at the ENABLE input terminal all channels are off.

The IW4053B is a triple 2-channel multiplexer having three separate digital control inputs, A, B, and C, and an enable input. Each control input selects one of a pair of channels which are connected in a single-pole double-throw configuration.

•

Operating Voltage Range: 3.0 to 18 V

•

Maximum input current of 1 µA at 18 V over full package-

temperature range; 100 nA at 18 V and 25°C

•

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

IW4053B

ORDERING INFORMATION

IW4053BN Plastic

IW4053BDW SOIC

TA = -55° to 125° C for all packages

PIN ASSIGNMENT

FUNCTION TABLE

Control Inputs ON

Enable Select Channels

CBA L L L L Z0 Y0 X0 L L L H Z0 Y0 X1 L L H L Z0 Y1 X0 L L H H Z0 Y1 X1 L H L L Z1 Y0 X0 L H L H Z1 Y0 X1 L H H L Z1 Y1 X0 L H H H Z1 Y1 X1 HXXX None

X = don’t care

LOGIC DIAGRAM

Triple Single-Pole, Double-Position

Plus Common Off

PIN 16 =V

CC

PIN 7 = V

EE

PIN 8 = GND

IW4053B

110

MAXIMUM RATINGS

*

Symbol Parameter Value Unit

V

CC

DC Supply Voltage (Referenced to GND) -0.5 to +20 V

V

IN

DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V

V

OUT

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V

I

IN

DC Input Current, per Pin

±

10

mA

P

D

Power Dissipation in Still Air, Plastic DIP+ SOIC Package+

750 500

mW

P

D

Power Dissipation per Output Transistor 100 mW

Tstg Storage Temperature -65 to +150

°

C

T

L

Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)

260

°

C

*

Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

V

CC

DC Supply Voltage (Referenced to GND) 3.0 18 V

VIN, V

OUT

DC Input Voltage, Output Voltage (Referenced to GND) 0 V

CC

V

T

A

Operating Temperature, All Package Types -55 +125

°

C

I Multiplexer Switch Input Current Capability

*

-25mA

R

OH

Output Load Resistance 100 -

Ω

*

In certain applications, the external load-resistor current may include both VCC and signal-line components.

This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V

IN

and V

OUT

should be constrained to the range

GND≤(V

IN

or V

OUT

)≤VCC.

Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or V

CC

).

Unused Analog I/O pins may be left open or terminated.

IW4053B

111

DC ELECTRICAL CHARACTERISTICS

Digital Section

V

CC

Guaranteed Limit

Symbol Parameter Test Conditions V

≥

-55

°

C

≤

25

°

C

≤

125

°

C

Unit

V

IH

Minimum High-Level Input Voltage, Channel-Select or Enable Inputs

V

IS=VCC

thru 1k

Ω

V

EE

=GND

I

IS

<2µA on all OFF Chanels

R

L

=1kΩ to GND

5 10 15

3.5 7

11

3.5 7

11

3.5 7

11

V

IL

Maximum Low -Leve l Input Voltage, Channel-Select or Enable Inputs

V

IS=VCC

thru 1k

Ω

V

EE

=GND

I

IS

<2µA on all OFF Chanels

R

L

=1kΩ to GND

5 10 15

1.5 3 4

V

I

IN

Maximum Input Leakage Current, Channel-Select or Enable Inputs

V

IN=VCC

or GND 18

±

0.1

±

0.1

±

1.0

µ

A

I

CC

Maximum Quiescent Supply Current (per Package)

Channel Select = VCC or GND 5

10 15 20

5 10 20

100

5 10 20

100

150 300 600

3000

µ

A

DC ELECTRICAL CHARACTERISTICS

Analog Section

V

CC

Guaranteed Limit

Symbol Parameter Test Conditions V

≥

-55

°

C

≤

25

°

C

≤

125

°

C

Unit

R

ON

Maximum “ON” Resistan ce VEE=GND=0

V

IS

= GND to V

CC

5 10 15

800 310 200

1050

400 240

1300

550 320

Ω

∆

R

ON

Maximum Difference in “ON” Resistance Between Any Two Channels in the Same Package

V

EE

=GND=0 5

10 15

-

10 15

5

-

Ω

I

OFF

Maximum Off- Channel Leakage Current, Any One Channel

VEE=GND=0 18

±

100

±

100±1000

nA

Maximum Off- Channel Leakage Current, Common Channel

VEE=GND=0 18

±

100

±

100±1000

IW4053B

112

AC ELECTRICAL CHARACTERISTICS

(CL=50pF,Input tr=tf=20.0 ns)

V

CC

Guaranteed Limit

Symbol Parameter V

≥

-55

°

C

≤

25

°

C

≤

125

°

C

Unit

t

PLH

, t

PHL

Maximum Propagation Delay , Analog Input to Analog Output (Fi gure 1) R

L

=200k

Ω

5 10 15

60 30 20

120

60 40

ns

t

PLZ

, t

PHZ

Maximum Propagation Delay , Address to Analog Output (Figure 2) R

L

=10k

Ω

V

EE

=GND=0

5 10 15

720 320 240

1440

640 480

ns

VEE=-5V 5 450 450 900

t

PLZ

,

t

PZL

Maximum Propagation Delay, Enable to Analog Output (Figure 2) R

L

=10k

Ω

V

EE

=GND=0

5 10 15

720 320 240

1440

640 480

ns

VEE=-10V 5 400 400 800

t

PHZ

,

t

PZH

Maximum Propagation Delay, Enable to Analog Output (Figure 2) R

L

=10k

Ω

V

EE

=GND=0

5 10 15

450 210 160

900 420 320

ns

VEE=-10V 5 300 300 600

C

IN

Maximum Input Capacitance, Channel-Select or Enable Inputs

- 7.5 7.5 7.5 pF

C

I/O

Maximum Capacitance V

EE

=GND=-5V

C

IS

5- 5 -pF

C

OS

5- 9 -

Feedthrough C

IOS

5- 0.2 -

IW4053B

113

ADDITIONAL APPLICATION CHARACTERISTICS

V

CC

VISLimit

*

Symbol Parameter Test Conditions V V

25 °C

Unit

BW Maximum On-

Channel Bandwidth or Minimum Frequency Response (-3db)

V

EE

=GND

R

L

=1k

Ω

20 log(V

OS/VIS

)=-3db

V

OS

at Common OUT/IN

10 5

*

30 MHz

VOS at Any Channel 10 5

*

60 (-40db) Feedthrough

Frequency (All Channels OFF)

VEE=GND R

L

=1k

Ω

20 log(V

OS/VIS

)=-40db

V

OS

at Common OUT/IN

10 5

*

8

VOS at Any Channel 10 5

*

8

(-40db) Signal Crosstalk Frequency

VEE=GND R

L

=1k

Ω

20 log(V

OS/VIS

)=-40db Between any 2 Sections : In Pin 2, Out Pin 14 In Pin 15, Out Pin 14

2.5 6

THD T otal Harmonic

Distortion

VEE=GND f

IS

=1kHz sine wave

5 10 15

2* 3* 5*

0.3

0.2

012

%

- Address-or Enable to Signal Crosstalk

VEE=GND R

L

=10kΩ**

t

r,tf

=20ns

Square Wave

10 - 65 mv

(peak)

* Peak-to-peak voltage symmetrical about (VDD-VEE)/2 **Both ends of channel

IW4053B

114

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

EXPANDED LOGIC DIAGRAM