Datasheet IW4052BN, IW4052BDW Datasheet (INTEGRAL)

Analog Multiplexer Demultiplexer

High-Performance Silicon-Gate CMOS

The IW4052B analog multiplexer/demultiplexer is digitally controlled analog switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20V peak-topeak can be achieved by digital signal amplitudes of 4.5 to 20V (if V

- GND = 3V, a VCC - VEE of up to 13 V can be controlled; for VCC V

level differences above 13V a VCC - GND of at least 4.5V is

EE

required).

These multiplexer circuits dissipate extremely low quiescent power over the full V independent of the logic state of the control signals. When a logic “1”is present at the ENABLE input terminal all channels are off.

The IW4052 is a differential 4-channel multiplexer having two binary control inputs. A and B, and an enable input. The two binary input signals select 1 of 4 pairs of channels to turned on and connect the analog inputs to the outputs.

•

Operating Voltage Range: 3.0 to 18 V

•

Maximum inp ut current of

1 µA at 18 V over full package-temperature range; 100 nA at 18 V

and 25°C

•

Noise margin (over full package temperature range):

-GND and VCC - VEE supply-voltage ranges,

CC

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

CC

TECHNICAL DATA

IW4052B

ORDERING INFORMATION

IW4052BN Plastic

IW4052BDW SOIC

TA = -55° to 125° C for all packages

PIN ASSIGNMENT

LOGIC DIAGRAM

Double-Pole, 4-Position

Plus Common Off

PIN 16 =V

PIN 7 = V

PIN 8 = GND

CC

EE

FUNCTION TABLE

Control Inputs ON

Enable Select Channels

BA LLLY0X0 LLHY1X1 LHLY2X2 LHHY3X3 HXX None

X = don’t care

103

IW4052B

MAXIMUM RATINGS

*

Symbol Parameter Value Unit

V

CC

V

OUT

I

IN

P

Tstg Storage Temperature -65 to +150

T

DC Supply Voltage (Referenced to GND) -0.5 to +20 V DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V

IN

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+

D

SOIC Package+ Power Dissipation per Output Transistor 100 mW

D

±

10

750 500

mA

mW

°

Lead Temperature, 1 mm from Case for 10 Seconds

L

260

°

(Plastic DIP or SOIC Package)

*

Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

V

CC

VIN, V

T

A

I Multiplexer Switch Input Current Capability

R

OH

*

In certain applications, the external load-resistor current may include both VCC and signal-line components.

DC Supply Voltage (Referenced to GND) 3.0 18 V DC Input Voltage, Output Voltage (Referenced to GND) 0 V

OUT

Operating Temperature, All Package Types -55 +125

*

-25mA

Output Load Resistance 100 -

CC

C C

V

°

C

Ω

This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V GND≤(V

IN

or V

OUT

)≤VCC.

Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or V

and V

IN

should be constrained to the range

OUT

CC

Unused Analog I/O pins may be left open or terminated.

104

).

IW4052B

DC ELECTRICAL CHARACTERISTICS

Digital Section

Symbol Parameter Test Conditions V

V

I

IN

Minimum High-Level

IH

Input Voltage, Channel-Select or Enable Inputs

Maximum Low -Leve l

IL

Input Voltage, Channel-Select or Enable Inputs

Maximum Input

V V I

IS

R V

V I

IS

R V

thru 1k

IS=VCC

=GND

EE

<2µA on all OFF Chanels

=1kΩ to GND

L

thru 1k

IS=VCC

=GND

EE

<2µA on all OFF Chanels

=1kΩ to GND

L

IN=VCC

Ω

or GND 18 Leakage Current, Channel-Select or Enable Inputs

I

CC

Maximum Quiescent

Channel Select = VCC or GND 5 Supply Current (per Package)

V

CC

5 10 15

10 15 20

Guaranteed Limit

≥

±

100

-55

°

3.5 7

11

1.5 3 4

0.1

5

10 20

≤

25

°

C

3.5 7

11

1.5 3 4

±

0.1

5

10 20

100

≤

125

°

3.5 7

12

1.4 3 4

±

1.0

150 300 600

3000

Unit

C

V

µ

A

µ

A

DC ELECTRICAL CHARACTERISTICS

Analog Section

Symbol Parameter Test Conditions V

R

ON

∆

R

Maximum “ON” Resistan ce VEE=GND=0

Maximum Difference in

ON

V

= GND to V

IS

V

=GND=0 5

EE

CC

“ON” Resistance Between Any Two Channels in the Same Package

I

OFF

Maximum Off- Channel

VEE=GND=0 18 Leakage Current, Any One Channel

Maximum Off- Channel

VEE=GND=0 18 Leakage Current, Common Channel

V

CC

5 10 15

10 15

Guaranteed Limit

≥

800 310 200

±

-55

°

C

-

100

≤

25

°

1050

400 240

10 15

5

±

100

±

100

≤

125

C

1300

Unit

°

C

Ω

550 320

-

Ω

-

±

1000

±

1000

nA

105

IW4052B

AC ELECTRICAL CHARACTERISTICS

(CL=50pF,Input tr=tf=20.0 ns)

Symbol Parameter V

t

PLH

, t

Maximum Propagation Delay , Analog Input to

PHL

Analog Output (Fi gure 1)

Ω

=200k

R

L

t

PLZ

, t

Maximum Propagation Delay , Address to Analog

PHZ

Ω

Output (Figure 2) R

=10k

L

V

EE

=GND=0

VEE=-5V 5 450 450 900

t

,

PLZ

t

PZL

Maximum Propagation Delay, Enable to Analog

Ω

Output (Figure 2) R

=10k

L

V

EE

=GND=0

VEE=-10V 5 400 400 800

t

,

PHZ

t

PZH

Maximum Propagation Delay, Enable to Analog

Ω

Output (Figure 2) R

=10k

L

V

EE

=GND=0

VEE=-10V 5 300 300 600

C

IN

Maximum Input Capacitance, Channel-Select or Enable Inputs

C

I/O

Maximum Capacitance V

=GND=-5V

EE

C

IS

C

OS

Feedthrough C

IOS

V

CC

5 10 15

Guaranteed Limit

≥

-55

°

C

≤

60 30 20

720 320 240

450 210 160

25

°

C

60 30 20

720 320 240

450 210 160

≤

125

°

120

60 40

1440

640 480

1440

640 480

900 420 320

Unit

C

ns

- 7.5 7.5 7.5 pF

5- 5 -pF

5- 18 -

5- 0.2 -

106

ADDITIONAL APPLICATION CHARACTERISTICS

)

V

CC

Symbol Parameter Test Conditions V V

BW Maximum On-

Channel Bandwidth or Minimum Frequency Response (-3db)

(-40db) Feedthrough

Frequency (All Channels OFF)

(-40db) Signal Crosstalk Frequency

THD Total Harmonic

Distortion

- Address-or Enable to Signal Crosstalk

* Peak-to-peak voltage symmetrical about (VDD-VEE)/2 ** Both ends of channel

V

=GND

EE

Ω

=1k

R

L

20 log(V

OS/VIS

)=-3db

10 5

V

at Common OUT/IN

OS

VOS at Any Channel 10 5 VEE=GND

Ω

=1k

R

L

20 log(V V

OS/VIS

)=-40db

at Common OUT/IN

OS

10 5

VOS at Any Channel 10 5 VEE=GND

Ω

=1k

R

L

20 log(V

OS/VIS

)=-40db Between Sections : Measured on Common Measured on Any Chanel

VEE=GND f

=1kHz sine wave

IS

5 10 15

VEE=GND

=10kΩ**

R

L

t

=20ns

r,tf

10 - 65 mv

Square Wave

V

2* 3* 5*

IW4052B

Limit

IS

25 °C

*

Unit

25 MHz

60

10

8

6

10

0.3

%

0.2

012

(peak

107

IW4052B

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

EXPANDED LOGIC DIAGRAM

108