The IW4051B analog multiplexer/demultiplexer is digitally
controlled analog switches having low ON impedance and very low
OFF leakage current. Control of analog signals up to 20V peak-topeak can be achieved by digital signal amplitudes of 4.5 to 20V (if V
- GND = 3V, a VCC - VEE of up to 13 V can be controlled; for VCC V
level differences above 13V a VCC - GND of at least 4.5V is
EE
required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The IW4051B is a single 8-channel multiplexer having three binary
control inputs, A,B and C, and an ENABLE input. The three binary
signals select 1 of 8 channels to be turned on, and connect one of the 8
inputs to the output.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
DC Supply Voltage (Referenced to GND)-0.5 to +20V
DC Input Voltage (Referenced to GND)-0.5 to VCC +0.5V
IN
DC Output Voltage (Referenced to GND)-0.5 to VCC +0.5V
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
Power Dissipation per Output Transistor100mW
D
±
10
750
500
mA
mW
°
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
°
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterMinMaxUnit
V
CC
VIN, V
T
A
IMultiplexer Switch Input Current Capability
R
OH
*
In certain applications, the external load-resistor current may include both VCC and signal-line components.
DC Supply Voltage (Referenced to GND)3.018V
DC Input Voltage, Output Voltage (Referenced to GND)0V
OUT
Operating Temperature, All Package Types-55+125
*
-25mA
Output Load Resistance100-
CC
C
C
V
°
C
Ω
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused Analog I/O pins may be left open or terminated.
98
).
Page 3
IW4051B
DC ELECTRICAL CHARACTERISTICS
Digital Section
SymbolParameterTest ConditionsV
V
V
I
Minimum High-Level
IH
Input Voltage,
Channel-Select or
Enable Inputs
Maximum Low -Leve l
IL
Input Voltage,
Channel-Select or
Enable Inputs
Maximum Input
IN
V
V
I
IS
R
V
V
I
IS
R
V
thru 1k
IS=VCC
=GND
EE
<2µA on all OFF Chanels
=1kΩ to GND
L
thru 1k
IS=VCC
=GND
EE
<2µA on all OFF Chanels
=1kΩ to GND
L
IN=VCC
Ω
Ω
or GND18
Leakage Current,
Channel-Select or
Enable Inputs
I
Maximum Quiescent
CC
Channel Select = VCC or GND5
Supply Current (per
Package)
V
CC
5
10
15
5
10
15
10
15
20
Guaranteed Limit
≥
±
-55
°
3.5
7
11
1.5
3
4
0.1
5
10
20
100
≤
25
°
C
C
3.5
7
11
1.5
3
4
±
0.1
5
10
20
100
≤
125
°
3.5
7
11
1.5
3
4
±
1.0
150
300
600
3000
Unit
C
V
V
µ
A
µ
A
DC ELECTRICAL CHARACTERISTICS
Analog Section
SymbolParameterTest ConditionsV
R
ON
∆
R
Maximum “ON” Resistan ceVEE=GND=0
Maximum Difference in
ON
V
= GND to V
IS
V
=GND=05
EE
CC
“ON” Resistance Between
Any Two Channels in the
Same Package
I
OFF
Maximum Off- Channel
VEE=GND=018
Leakage Current, Any One
Channel
Maximum Off- Channel
VEE=GND=018
Leakage Current, Common
Channel
V
CC
5
10
15
10
15
Guaranteed Limit
≥
800
310
200
-55
°
C
≤
1050
400
240
-
-
-
±
±
100
100
±
±
25
°
C
10
15
5
100
100
≤
125
1300
550
320
±
1000
±
1000
Unit
°
C
Ω
-
Ω
-
-
nA
99
Page 4
IW4051B
AC ELECTRICAL CHARACTERISTICS
(CL=50pF,Input tr=tf=20.0 ns)
SymbolParameterV
t
PLH
, t
Maximum Propagation Delay , Analog Input to
PHL
Analog Output (Fi gure 1)
Ω
=200k
R
L
t
PLZ
, t
Maximum Propagation Delay , Address to Analog
PHZ
Ω
Output (Figure 2) R
=10k
L
V
EE
=GND=0
VEE=-5V5450450900
t
,
PLZ
t
PZL
Maximum Propagation Delay, Enable to Analog
Ω
Output (Figure 2) R
=10k
L
V
EE
=GND=0
VEE=-10V5400400800
t
,
PHZ
t
PZH
Maximum Propagation Delay, Enable to Analog
Ω
Output (Figure 2) R
=10k
L
V
EE
=GND=0
VEE=-10V5300300600
C
IN
Maximum Input Capacitance, Channel-Select or
Enable Inputs
C
I/O
Maximum Capacitance
V
=GND=-5V
EE
C
IS
C
OS
Feedthrough C
IOS
V
CC
5
10
15
5
10
15
5
10
15
5
10
15
Guaranteed Limit
≥
-55
°
C
≤
60
30
20
720
320
240
720
320
240
450
210
160
25
°
C
60
30
20
720
320
240
720
320
240
450
210
160
≤
125
°
120
60
40
1440
640
480
1440
640
480
900
420
320
Unit
C
ns
ns
ns
ns
-7.57.57.5pF
5- 5 -pF
5- 30 -
5- 0.2 -
100
Page 5
ADDITIONAL APPLICATION CHARACTERISTICS
)
V
CC
SymbolParameterTest ConditionsVV
Maximum OnChannel
Bandwidth or
Minimum
BW
Frequency
Response (-3db)
(-40db)
Feedthrough
Frequency (All
Channels OFF)
(-40db)
Signal Crosstalk
Frequency
THDTotal Harmonic
Distortion
-Address-or
Enable to Signal
Crosstalk
* Peak-to-peak voltage symmetrical about (VCC-VEE)/2.
** Both ends of channel.
V
=GND
EE
Ω
=1k
R
L
20 log(V
OS/VIS
)=-3db
105
V
at Common OUT/IN
OS
VOS at Any Channel105
VEE=GND
Ω
=1k
R
L
20 log(V
V
OS/VIS
)=-40db
at Common OUT/IN
OS
105
VOS at Any Channel105
VEE=GND
Ω
=1k
R
L
20 log(V
Between Any 2 Channels
VEE=GND
f
=1kHz sine wave
IS
OS/VIS
)=-40db
105
5
10
15
V
=GND, RL=10kΩ**
EE
t
=20ns
r,tf
10-65mv
Square Wave
V
2*
3*
5*
IW4051B
Limit
IS
25 °C
*
*
*
*
*
*
Unit
20MHz
60
12
8
3
0.3
%
0.2
012
(Peak
101
Page 6
IW4051B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
EXPANDED LOGIC DIAGRAM
102
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