Page 1
Quad Clocked «D» Latch
High-Voltage Silicon-Gate CMOS
CD4042B types contain four latch circuits, each strobed by a
common clock. Complementary buffered outputs are available from
each circuit. The impedance of the n- and p-channel output devices is
balanced and all outputs are electrically identical. Information present
at the data input is transferred to outputs Q and Q during the CLOCK
level which is programmed by the POLARITY input. For
POLARITY = 0 the transfer occurs during the 0 CLOCK level and for
POLARITY = 1 the transfer occurs during the 1 CLOCK level. The
outputs follow the data input providing the CLOCK and POLARITY
levels defined above are present. When a CLOCK transition occurs
(positive for POLARITY = 0 and negative for POLARTY = 1) the
information present at the input during the CLOCK transition is
retained at the outputs until an opposite CLOCK transition occurs.
The CD4042B types are supplied in 16-lead hermetic dual-in-line
ceramic packages (D and F suffixes); 16-lead dual-in-line plastic
package (E suffix), and in chip form (H suffix).
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
TECHNICAL DATA
IW4042B
ORDERING INFORMATION
IW4042BN Plastic
IW4042BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
PIN 8 = GND
CC
FUNCTION TABLE
Inputs Outputs
Clock Polarity Q
00D
10Latch
11D
01Latch
1
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IW4042B
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
P
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
I
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
I
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
±
10
750
500
Ptot Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
VI, V
T
CC
OUT
A
DC Supply Voltage (Referenced to GND) 3.0 18 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
Operating Temperature, All Package Types -55 +125
mA
mW
°
C
°
C
V
°
C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
≤
)
.
VCC
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
and V
IN
should be constrained to the range
OUT
VCC
Unused outputs must be left open.
2
).
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IW4042B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
V
V
V
Minimum High-Level
IH
Input Voltage
Maximum Low -Level
IL
Input Voltage
Minimum High-Level
OH
V
=0.5 V or V
OUT
V
=1.0 V or V
OUT
V
=1.5 V or V
OUT
V
=0.5 V or V
OUT
V
=1.0 V or V
OUT
V
=1.5 V or V
OUT
VIN=GND or V
CC
CC
CC
CC
CC
CC
CC
- 0.5 V
- 1.0 V
- 1.5 V
- 0.5 V
- 1.0 V
- 1.5 V
Output Voltage
V
Maximum Low-Level
OL
VIN=GND or V
CC
Output Voltage
I
IN
Maximum Input
VIN= GND or V
CC
Leakage Current
I
СС
Maximum Quiescent
VIN= GND or V
CC
Supply Current
(per Package)
I
OL
I
OH
Minimum Output Low
(Sink) Current
Minimum Output
High (Source) Current
VIN= GND or V
VOL=0.4 V
V
=0.5 V
OL
V
=1.5 V
OL
VIN= GND or V
VOH=2.5 V
V
=4.6 V
OH
V
=9.5 V
OH
V
=13.5 V
OH
CC
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
СС
≥
14.95
Guaranteed Limit
-55°C25°C
3.5
7
11
1.5
3
4
4.95
9.95
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
0.1
1
2
4
20
0.64
1.6
4.2
-2.0
-0.64
-1.6
-4.2
0.05
0.05
0.05
±
0.1
1
2
4
20
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
≤
125
°
C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
1.0
30
60
120
600
0.36
0.9
2.4
-1.15
-0.36
-0.9
-2.4
Unit
V
V
V
V
µ
A
µ
A
mA
mA
3
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IW4042B
AC ELECTRICAL CHARACTERISTICS
(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Symbol Parameter V
t
PLH
, t
Maximum Propagation Delay, Clock to Q
PHL
(Figure 1)
t
PLH
, t
Maximum Propagation Delay, Clock to Q
PHL
(Figure 1)
t
t
t
TLH
PLH
PLH
, t
, t
, t
Maximum Propagation Delay, Data to Q (Figure2)5.0
PHL
Maximum Propagation Delay, Data to Q (Figure2)5.0
PHL
Maximum Output Transition Time, Any Output
THL
(Figure 1)
C
IN
Maximum Input Capacitance - 7.5 pF
V
5.0
10
15
5.0
10
15
10
15
10
15
5.0
10
15
CC
≥
Guaranteed Limit
-55°C25°C
450
200
160
500
230
180
220
110
80
300
150
100
200
100
80
450
200
160
500
230
180
220
110
80
300
150
100
200
100
80
≤
125°C
900
400
320
1000
460
360
440
220
160
600
300
200
400
200
160
Unit
ns
ns
ns
ns
ns
TIMING REQUIREMENTS
(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Symbol Parameter V
t
w
t
su
Minimum Pulse Width, Clock (Figure 1) 5.0
Minimum Setup Time, Data to Clock
(Figure 1)
t
h
Minimum Hold Time, Clock to Data
(Figure 1)
tr, t
Maximum Input Rise or Fall Time, Clock
f
(Figure 1)
V
10
15
5.0
10
15
5.0
10
15
5.0
10
15
CC
≥
Guaranteed Limit
-55°C25°C
200
100
60
50
30
25
120
60
50
200
100
60
50
30
25
120
60
50
Not rise or fall
time sensitive
≤
125°C
400
200
120
100
60
50
240
120
100
Unit
ns
ns
ns
µ
s
4
Page 5
IW4042B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
5
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