Page 1
8-Bit Shift Register
High-Voltage Silicon-Gate CMOS
The IW4021B is an Edge-Triggered 8-Bit Shift Register (Parallelto-Serial Converter) with a synchronous Serial Data Input (D
Clock Input (CP), an asynchronous active HIGH Parallel Load Input
(PL), eight asynchronous Parallel Data Inputs (P
Parallel Outputs from the last three stages (Q
5-Q7
) and Buffered
0-P7
).
Information on the Parallel Data Inputs (P0-P7) is asynchronously
loaded into the register while the Parallel Load Input (PL) is HIGH,
independent of the Clock (CP) and Serial Data (D
) inputs. Data
S
present in the register is stored on the HIGH-to-LOW transition of the
Parallel Load Input (PL).
When the Parallel Load Input is LOW, data on the Serial Data
Input (D
) is shifted into the first register position and all the data in
S
the register is shifted one position to the right on the LOW-to-HIGH
transition of the Clock Input (CP).
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
), a
S
TECHNICAL DATA
IW4021B
ORDERING INFORMATION
IW4021BN Plastic
IW4021BDW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
PIN 8 = GND
CC
FUNCTION TABLE
SERIAL OPERATION:
tCPD
S
PL
Q
t=n+6
n000
n+1 1 0 1 0
n+2 0 0 0 1 0
n+3 1 0 1 0 1
X0 Q5Q
PARALLEL OPERATION:
CP D
PL P5P6P7Q5Q6Q
S
X X 1 DDDDDD
X = don’t care
D = 1 or 0
Q
5
6
t=n+7
6
t=n+8
Q
7
Q
7
7
1
Page 2
IW4021B
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
P
P
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
Power Dissipation per Output Transistor 100 mW
D
±
10
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
VIN, V
T
CC
A
DC Supply Voltage (Referenced to GND) 3.0 18 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125
CC
mA
mW
°
C
°
C
V
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused outputs must be left open.
2
).
Page 3
IW4021B
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
V
Minimum High-Level
IH
Input Voltage
V
Maximum Low -Level
IL
Input Voltage
V
Minimum High-Level
OH
Output Voltage
V
Maximum Low-Level
OL
Output Voltage
I
Maximum Input
IN
Leakage Current
I
Maximum Qui escent
CC
Supply Current
(per Package)
I
Minimum Output Low
OL
(Sink) Current
I
Minimum Output High
OH
(Source) Current
V
=0.5 V or V
OUT
V
=1.0 V or V
OUT
V
=1.5 V or V
OUT
V
=0.5 V or V
OUT
V
=1.0 V or V
OUT
V
=1.5 V or V
OUT
VIN=GND or V
VIN=GND or V
VIN= GND or V
VIN= GND or V
VIN= GND or V
VOL=0.4 V
V
=0.5 V
OL
V
=1.5 V
OL
VIN= GND or V
VOH=2.5 V
V
=4.6 V
OH
V
=9.5 V
OH
V
=13.5 V
OH
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
(Voltages Referenced to GND)
- 0.5 V
- 1.0 V
- 1.5 V
- 0.5 V
- 1.0 V
- 1.5 V
V
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
CC
V
10
15
10
15
10
15
10
15
18
10
15
20
10
15
10
15
Guaranteed Limit
≥
-55°C25°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
0.1
5.0
10
20
100
0.64
1.6
4.2
-2.0
-0.64
-1.6
-4.2
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
0.1
5.0
10
20
100
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
≤
125°C
3.5
11
1.5
4.95
9.95
14.95
0.05
0.05
0.05
±
150
300
600
3000
0.36
0.9
2.4
-1.15
-0.36
-0.9
-2.4
7
3
4
1.0
Unit
V
V
V
V
µ
A
µ
A
mA
mA
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter
t
t
t
PLH
PLH
TLH
f
max
, t
, t
, t
C
IN
Maximum Clock Frequency 5.0
Maximum Propagation Delay, CP to Qn 5.0
PHL
Maximum Propagation Delay, PL to Qn 5.0
PHL
Maximum Output Transition Time, Any Output 5.0
THL
Maximum Input Capacitance 5.0 7.5 pF
(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
V
CC
V
10
15
10
15
10
15
10
15
Guaranteed Limit
≥
-55°C25°C
3.0
6.0
8.5
320
160
120
320
160
120
200
100
80
3.0
6.0
8.5
320
160
120
320
160
120
200
100
80
≤
125°C
1.5
3.0
4.25
640
320
240
640
320
240
400
200
160
Unit
MHz
ns
ns
ns
3
Page 4
IW4021B
TIMING REQUIREMENTS
Symbol Parameter
t
t
t
t
t
tr, t
w
w
su
su
t
h
t
h
rec
Minimum Pulse Width CP 5.0
Minimum Pulse Width PL 5.0
Minimum Setup Time, DS toCP 5.0
Minimum Setup Time, Pn to PL 5.0
Minimum Hold Time, DS toCP 5.0
Minimum Hold Time, Pn to PL 5.0
Minimum Recovery Time PL 5.0
Maximum Input Rise o r Fall Time 5.0
f
(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
V
CC
V
≥
-55°C25°C
160
10
15
80
50
180
10
15
80
50
120
10
15
80
60
50
10
15
30
20
0
10
15
0
0
0
10
15
0
0
280
10
15
140
100
15
10
15
15
15
Guaranteed Limit
160
80
50
180
80
50
120
80
60
50
30
20
0
0
0
0
0
0
280
140
100
15
15
15
≤
125°C
320
160
100
360
160
100
240
160
120
100
60
40
560
240
200
15
15
15
Unit
ns
ns
ns
ns
0
ns
0
0
0
ns
0
0
ns
µ
s
EXPANDED LOGIC DIAGRAM
4
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