Datasheet IW4019BD, IW4019BN Datasheet (INTEGRAL)

Page 1
TECHNICAL DATA
35
Quad AND/OR Select Gate
High-Voltage Silicon-Gate CMOS
The IW4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits S
and S
b
.In addition to selection of either channel A or channel B information, the control bits can be applied simultaneously to accomplish the logical A + B function
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4019B
ORDERING INFORMATION
IW4019BN Plastic
IW4019BDW SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Outputs
S
S
b
AB Y HLHXH HLLXL
LHXHH LHXLL
LLXXL HHLLL HHLHH HHHLH HHHHH
Page 2
IW4019B
36
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
V
IN
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
V
OUT
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
I
IN
DC Input Current, per Pin
±
10
mA
P
D
Power Dissipation in Still Air, Plastic DIP+ SOIC Package+
750 500
mW
P
D
Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
260
°
C
*
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 3.0 18 V
VIN, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types -55 +125
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
Page 3
IW4019B
37
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limit
Symbol Parameter Test Conditions V
≥
-55°C25°C
≤
125
°
C
Unit
V
IH
Minimum High-Level Input Voltage
V
OUT
=0.5V or V
CC
- 0.5V
V
OUT
=1.0V or VCC - 1.0V
V
OUT
=1.5V or VCC - 1.5V
5.0 10 15
3.5 7
11
3.5 7
11
3.5 7
11
V
V
IL
Maximum Low -Level Input Voltage
V
OUT
=0.5V or V
CC
- 0.5V
V
OUT
=1.0V or VCC - 1.0V
V
OUT
=1.5V or VCC - 1.5V
5.0 10 15
1.5 3 4
1.5 3 4
1.5 3 4
V
V
OH
Minimum High-Level Output Voltage
VIN=GND or V
CC
5.0 10 15
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
V
V
OL
Maximum Low-Level Output Voltage
VIN=GND or V
CC
5.0 10 15
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
I
IN
Maximum Input Leakage Current
VIN= GND or V
CC
18
±
0.1
±
0.1
±
1.0
µ
A
I
CC
Maximum Quies cent Supply Current (per Package)
VIN= GND or V
CC
5.0 10 15 20
1 2 4
20
1 2 4
20
30
60 120 600
µ
A
I
OL
Minimum Outpu t Low (Sink) Current
VIN= GND or V
CC
UOL=0.4 V U
OL
=0.5 V
U
OL
=1.5 V
5.0 10 15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
mA
I
OH
Minimum Outpu t High (Source) Current
VIN= GND or V
CC
UOH=2.5 V U
OH
=4.6 V
U
OH
=9.5 V
U
OH
=13.5 V
5.0
5.0 10 15
-2.0
-0.64
-1.6
-4.2
-1.6
-0.51
-1.3
-3.4
-1.15
-0.36
-0.9
-2.4
mA
Page 4
IW4019B
38
AC ELECTRICAL CHARACTERISTICS
(CL=50pF, RL=200KΩ, Input tr=tf=20 ns)
V
CC
Guaranteed Limit
Symbol Parameter V
≥
-55°C25°C
≤
125°C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, Input A, B, SA or S
b
to Output Y (Figure 1)
5.0 10 15
300 120 100
300 120 100
600 240 200
ns
t
TLH
, t
THL
Maximum Output Transition Time, Any Output (Figure 1)
5.0 10 15
200 100
80
200 100
80
400 200 160
ns
C
IN
Maximum Input Capacitance All A and B
Inputs
-7.5pF
Sa and S
b
Inputs
- 15.0 pF
Figure 1. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/4 of the Device)
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