Page 1
®
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ISL83385E
Data Sheet January 16, 2005
±15kV ESD Protected, +3V to +5.5V,
1 Microamp, 250kbps,
RS-232 Transmitters/Receivers
The Intersil ISL83385E contains 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at V
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with a manual powerdown function
reduces the standby supply current to a 1µA trickle. Small
footprint packaging, and the use of small, low value
capacitors ensure board space savings as well. Data rates
greater than 250kbps are guaranteed at worst case load
conditions. This device is fully compatible with 3.3V only
systems, mixed 3.3V and 5.0V systems, and 5.0V only
systems.
The single pin powerdown function (SHDN
the transmitters, while shutting down the charge pump to
minimize supply current drain.
Table 1 summarizes the features of the ISL83385E, while
Application Note AN9863 summarizes the features of each
device comprising the 3V RS-232 family.
= 3.0V. Targeted
CC
= 0) disables all
Ordering Information
PAR T
NUMBER
ISL83385ECA 83385ECA 0 to 70 20 Ld SSOP M20.209
ISL83385ECAZ
(See Note)
ISL83385EIA 83385EIA -40 to 85 20 Ld SSOP M20.209
ISL83385EIAZ
(See Note)
ISL83385EIB 83385EIB -40 to 85 18 Ld SOIC M18.3
ISL83385EIBZ
(See Note)
Add “-T” suffix for tape and reel.
PAR T
MARKING
83385ECAZ 0 to 70 20 Ld SSOP
83385EIAZ -40 to 85 20 Ld SSOP
83385EIBZ -40 to 85 18 Ld SOIC
TEMP.
RANGE
(°C) PACKAGE
(Pb-free)
(Pb-free)
(Pb-free)
PKG.
DWG. #
M20.209
M20.209
M18.3
FN6001.4
Features
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Low Power, Pin Compatible Upgrade for MAX3385E
• Single SHDN Pin Disables Transmitters
• RS-232 Compatible Outputs at 2.7V
• Receivers Active in Powerdown
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Receiver Hysteresis For Improved Noise Immunity
• Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 0.3mA
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . .<1µA
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, 2004-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Page 2
ISL83385E
www.BDTIC.com/Intersil
TABLE 1. SUMMARY OF FEATURES
PART NUMBER
NO. OF
Tx.
NO. OF
Rx.
NO. OF
MONITOR Rx.
)
(R
OUTB
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWER-
DOWN?
POWERDOWN
ISL83385E 2 2 0 250 No No Yes No
Pinouts
ISL83385E (SOIC)
TOP VIEW
ISL83385E (SSOP)
TOP VIEW
AUTOMATIC
FUNCTION?
18
SHDN
V
17
CC
GND
16
15
T1
OUT
R1
14
IN
R1
13
OUT
T1
12
IN
T2
11
IN
10
R2
OUT
T2
C1+
C2+
OUT
R2
NC
V+
C1-
C2-
1
2
3
4
5
6
V-
7
8
9
IN
Pin Descriptions
PIN FUNCTION
V
CC
V+ Internally generated positive transmitter supply (+5.5V).
V- Internally generated negative transmitter supply (-5.5V).
GND Ground connection.
C1+ External capacitor (voltage doubler) is connected to this lead.
C1- External capacitor (voltage doubler) is connected to this lead.
C2+ External capacitor (voltage inverter) is connected to this lead.
C2- External capacitor (voltage inverter) is connected to this lead.
T
IN
T
OUT
R
IN
R
OUT
SHDN
System power supply input (3.0V to 5.5V).
TTL/CMOS compatible transmitter Inputs.
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs.
Active low input to shut down transmitters and on-board power supply, to place device in low power mode.
T2
C1+
C2+
OUT
R2
NC
V+
C1-
C2-
NC
20
1
2
3
4
5
6
V-
7
8
9
IN
10
SHDN
V
19
CC
GND
18
17
T1
OUT
R1
16
IN
R1
15
OUT
T1
14
IN
T2
13
IN
12
R2
OUT
NC
11
2
FN6001.4
January 16, 2005
Page 3
Typical Operating Circuit
www.BDTIC.com/Intersil
TTL/CMOS
LOGIC LEVELS
+3.3V to +5V
0.1µF
0.1µF
R1
R2
C
C
T1
T2
OUT
OUT
ISL83385E
ISL83385E (Note 2)
C3 (OPTIONAL CONNECTION, NOTE 1)
+
0.1µF
2
1
2
IN
IN
C1+
+
4
C1-
5
C2+
+
6
C2-
12
11
13
10
V
CC
R
R
2
GND
17
V+
V-
T
1
T
2
5kΩ
1
5kΩ
SHDN
16
+
3
C
3
+
0.1µF
7
C
4
0.1µF
+
15
T1
OUT
8
T2
OUT
14
R1
9
R2
18
V
CC
RS-232
LEVELS
IN
IN
NOTES:
1. The negative terminal of C
can be connected to either VCC or Gnd.
3
2. Pin numbers refer to SOIC package.
3
FN6001.4
January 16, 2005
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ISL83385E
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Absolute Maximum Ratings Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
T
IN
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
T
OUT
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
OUT
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
T
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θ
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Thermal Resistance (Typical, Note 3)
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 125
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
θ
JA
(°C/W)
Operating Conditions
Temperature Range
ISL83385ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
ISL83385EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
Electrical Specifications Test Conditions: V
Typicals are at T
PARAMETER TEST CONDITIONS
DC CHARACTERISTICS
Supply Current, Enabled All Outputs Unloaded, SHDN
Supply Current, Powerdown SHDN = GND 25 - 1 10 µA
LOGIC AND TRANSMITTER INPUTS
Input Logic Threshold Low T
Input Logic Threshold High TIN, SHDN VCC = 3.3V Full 2.0 - - V
Transmitter Input Hysteresis 25 - 0.5 - V
Input Leakage Current T
RECEIVER OUTPUTS
Output Voltage Low I
Output Voltage High I
RECEIVER INPUTS
Input Voltage Range Full -25 - 25 V
Input Threshold Low V
Input Threshold High V
Input Hysteresis 25 - 0.5 - V
Input Resistance 25 3 5 7 kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V
Output Resistance V
Output Short-Circuit Current Full - ±35 ±60 mA
Output Leakage Current V
, SHDN Full - - 0.8 V
IN
, SHDN Full - ±0.01 ±1.0 µA
IN
= 1.6mA Full - - 0.4 V
OUT
= -1.0mA Full V
OUT
= 3.3V 25 0.6 1.2 - V
CC
= 5.0V 25 0.8 1.5 - V
V
CC
= 3.3V 25 - 1.5 2.4 V
CC
= 5.0V 25 - 1.8 2.4 V
V
CC
=V+=V-=0V, Transmitter Output=±2V Full 300 10M - Ω
CC
= ±12V, VCC= 0V or 3V to 5.5V, SHDN =GND Full - - ±25 µA
OUT
= 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
CC
= 25°C
A
TEMP
(°C) MIN TYP MAX UNITS
=VCC, VCC = 3.15V 25 - 0.3 1 mA
= 5.0V Full 2.4 - - V
V
CC
CC
-0.6 V
-0.1 - V
CC
4
FN6001.4
January 16, 2005
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ISL83385E
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Electrical Specifications Test Conditions: V
Typicals are at T
PARAMETER TEST CONDITIONS
TIMING CHARACTERISTICS
Maximum Data Rate R
Receiver Propagation Delay Receiver Input to Receiver
Transmitter Output Enable Time From SHDN Rising Edge to T
Transmitter Skew t
Receiver Skew t
Transition Region Slew Rate RL=3kΩ to 7kΩ,
ESD PERFORMANCE
RS-232 Pins (T
All Other Pins Human Body Model 25 - ±3-kV
NOTE:
4. Transmitter skew is measured at the transmitter zero crossing points.
, RIN) Human Body Model 25 - ±15 - kV
OUT
=3kΩ, CL= 1000pF, One Transmitter Switching Full 250 500 - kbps
L
- t
- t
PLH
PLH
= 150pF
L
Output, C
PHL
PHL
Measured From 3V to -3V or
-3V to 3V, V
IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV
IEC61000-4-2 Contact Discharge 25 - ±8-kV
= 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
CC
= 25°C (Continued)
A
TEMP
(°C) MIN TYP MAX UNITS
t
PHL
t
PLH
= ±3.7V 25 - 100 - µs
OUT
(Note 4) 25 - 100 - ns
= 150pF to 1000pF 25 6 - 30 V/µs
C
L
= 150pF to 2500pF 25 4 - 30 V/µs
C
CC
= 3.3V
L
25 - 0.15 - µs
25 - 0.15 - µs
25 - 50 - ns
Detailed Description
The ISL83385E operates from a single +3V to +5.5V supply,
guarantees a 250kbps minimum data rate, requires only four
small external 0.1µF capacitors, features low power
consumption, and meets all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil’s new ISL83385E utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions over the full V
range; other capacitor combinations can be used as shown
in Table 3. The charge pumps operate discontinuously (i.e.,
they turn off as soon as the V+ and V- supplies are pumped
up to the nominal values), resulting in significant power
savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
supply as
CC
CC
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), V
≥ 3.0V, with one
CC
transmitter operating at full speed. Under more typical
conditions of V
≥ 3.3V, RL=3kΩ, and CL= 250pF, one
CC
transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected (there are no pullup resistors), and may cause I
increases. Connect
CC
unused inputs to GND for the best performance.
TABLE 2. POWERDOWN TRUTH TABLE
SHDN
INPUT
TRANSMITTER
OUTPUTS
H Active Active Normal Operation
L High-Z Active Manual Powerdown
RECEIVER
OUTPUTS MODE OF OPERATION
Receivers
The ISL83385E contains standard inverting receivers that
convert RS-232 signals to CMOS output levels and accept
inputs up to ±30V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 1) even if the power is off
(V
= 0V). The receivers’ Schmitt trigger input stage uses
CC
5
FN6001.4
January 16, 2005
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ISL83385E
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hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions.
V
CC
R
XIN
-25V ≤ V
FIGURE 1. INVERTING RECEIVER CONNECTIONS
RIN
GND
≤ +25V
5kΩ
R
GND ≤ V
XOUT
ROUT
≤ V
CC
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA,
even at V
= 5.5V, during normal operation (not in
CC
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices, allowing
users to reduce system power simply by replacing the old
style device with the ISL83385E in new designs.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge
pump turns off (V+ collapses to V
and the transmitter outputs three-state. This micro-power
mode makes these devices ideal for battery powered and
portable applications.
Software Controlled (Manual) Powerdown
The ISL83385E may be forced into its low power, standby
state via a simple shutdown (SHDN
Driving this pin high enables normal operation, while driving
it low forces the IC into it’s powerdown state. The time
required to exit powerdown, and resume transmission is less
than 100µs. Connect SHDN
function isn’t needed.
PWR
MGT
LOGIC
to VCC if the powerdown
SHDN
, V- collapses to GND),
CC
) pin (see Figure 2).
ISL83385E
Capacitor Selection
These charge pumps only require 0.1µF capacitors for the
full operational voltage range. Table 3 lists other acceptable
capacitor values for various supply voltage ranges. Do not
use values smaller than those listed in Table 3. Increasing
the capacitor values (by a factor of 2) reduces ripple on the
transmitter outputs and slightly reduces power consumption.
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
TABLE 3. REQUIRED CAPACITOR VALUES
V
CC
(V)
3.0 to 3.6 0.1 0.1
4.5 to 5.5 0.047 0.33
3.0 to 5.5 0.1 0.47
C
(µF)
1
C
2
, C3, C
(µF)
4
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
capacitor of the same value as the charge-pump capacitor C
to ground with a
CC
1
Connect the bypass capacitor as close as possible to the IC.
Operation Down to 2.7V
ISL83385E transmitter outputs meet RS-562 levels (±3.7V),
at the full data rate, with V
as low as 2.7V. RS-562 levels
CC
typically ensure inter operability with RS-232 devices.
Transmitter Outputs when Exiting
Powerdown
Figure 3 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
.
I/O
CPU
FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN
UART
6
FN6001.4
January 16, 2005
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5V/DIV
2V/DIV
SHDN
T1
T2
VCC = +3.3V
C1 - C4 = 0.1µF
TIME (20µs/DIV)
FIGURE 3. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
High Data Rates
The ISL83385E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 4
details a transmitter loopback test circuit, and Figure 5
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 6 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitter was also
loaded with an RS-232 receiver.
5V/DIV.
T1
T1
OUT
R1
OUT
5V/DIV.
T1
T1
OUT
IN
VCC = +3.3V
C1 - C4 = 0.1µF
5µs/DIV.
FIGURE 5. LOOPBACK TEST AT 120kbps
IN
V
CC
0.1µF
+
C
1
+
C
2
V
CC
C1+
C1-
C2+
C2-
T
IN
R
OUT
SHDN
+
V
CC
ISL83385E
T
OUT
V+
V-
R
IN
5K
+
C
3
C
4
+
1000pF
FIGURE 4. TRANSMITTER LOOPBACK TEST CIRCUIT
R1
OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 6. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
The ISL83385E directly interfaces with 5V CMOS and TTL
logic families. Nevertheless, with the device at 3.3V, and the
logic supply at 5V, AC, HC, and CD4000 outputs can drive
ISL83385E inputs, but ISL83385E outputs do not reach the
minimum V
information.
for these logic families. See Table 4 for more
IH
7
FN6001.4
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TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VO LTAG E
(V)
3.3 3.3 Compatible with all CMOS families.
5 5 Compatible with all TTL and CMOS
5 3.3 Compatible with ACT and HCT
V
CC
SUPPLY
VOLTAGE
(V) COMPATIBILITY
logic families.
CMOS, and with TTL.
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
ISL83385E
±15kV ESD Protection
All pins on the 3V interface devices include ESD protection
structures, but the ISL83385E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
Typical Performance Curves V
6.0
4.0
2.0
1 TRANSMITTER AT 250kbps
1 TRANSMITTER AT 30kbps
0
-2.0
-4.0
TRANSMITTER OUTPUT VOLTAGE (V)
-6.0
FIGURE 7. TRANSMITTER OUTPUT VOLTAGE vs LOAD
1000 2000 3000 4000 50000
LOAD CAPACITANCE (pF)
CAPACITANCE
= 3.3V, TA = 25°C
CC
V
+
OUT
V
-
OUT
25
20
15
SLEW RATE (V/µs)
10
5
0 1000 2000 3000 4000 5000
FIGURE 8. SLEW RATE vs LOAD CAPACITANCE
8
-SLEW
+SLEW
LOAD CAPACITANCE (pF)
FN6001.4
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Typical Performance Curves V
45
40
35
30
25
20
15
SUPPLY CURRENT (mA)
10
5
0
0 1000 2000 3000 4000 5000
LOAD CAPACITANCE (pF)
FIGURE 9. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
120kbps
= 3.3V, TA = 25°C (Continued)
CC
250kbps
20kbps
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP)
GND
3.5
3.0
2.5
2.0
1.5
1.0
SUPPLY CURRENT (mA)
0.5
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE
NO LOAD
ALL OUTPUTS STATIC
TRANSISTOR COUNT
338
PROCESS
Si Gate CMOS
9
FN6001.4
January 16, 2005
Page 10
Small Outline Plastic Packages (SOIC)
www.BDTIC.com/Intersil
ISL83385E
N
INDEX
AREA
123
-A-
E
-B-
SEATING PLANE
D
A
-C-
0.25(0.010) BM M
H
L
h x 45°
α
e
B
0.25(0.010) C AM BS
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
M
A1
C
0.10(0.004)
M18.3 (JEDEC MS-013-AB ISSUE C)
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.4469 0.4625 11.35 11.75 3
E 0.2914 0.2992 7.40 7.60 4
e 0.050 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.010 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N18 187
α
0° 8° 0° 8° -
NOTESMIN MAX MIN MAX
Rev. 1 6/05
10
FN6001.4
January 16, 2005
Page 11
ISL83385E
www.BDTIC.com/Intersil
Shrink Small Outline Plastic Packages (SSOP)
N
INDEX
AREA
123
-A-
E
-B-
SEATING PLANE
D
A
-C-
0.25(0.010) B
H
α
e
B
0.25(0.010) C AMB
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
M
A1
0.10(0.004)
S
GAUGE
PLANE
M
0.25
0.010
A2
M
L
M20.209 (JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.068 0.078 1.73 1.99
A1 0.002 0.008’ 0.05 0.21
A2 0.066 0.070’ 1.68 1.78
B 0.010’ 0.015 0.25 0.38 9
C 0.004 0.008 0.09 0.20’
D 0.278 0.289 7.07 7.33 3
E 0.205 0.212 5.20’ 5.38 4
e 0.026 BSC 0.65 BSC
C
H 0.301 0.311 7.65 7.90’
L 0.025 0.037 0.63 0.95 6
N20 207
α
0 deg. 8 deg. 0 deg. 8 deg.
NOTESMIN MAX MIN MAX
Rev. 3 11/02
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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11
FN6001.4
January 16, 2005
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