IS62WV25616ALL
®
IS62WV25616BLL
256K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC SRAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V--2.2V V
2.5V--3.6V V
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
DD (IS62WV25616ALL)
DD (IS62WV25616BLL)
DESCRIPTION
The ISSI IS62WV25616ALL/IS62WV25616BLL are high-
speed, low power, 4M bit SRAMs organized as 256K words
by 16 bits. It is fabricated using ISSI's high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields highperformance and low power consumption devices.
When CS1 is HIGH (deselected) or when CS1 is LOW and
both LB and UB are HIGH, the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory. A
data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS62WV25616ALL/IS62WV25616BLL are packaged in
the JEDEC standard 44-Pin TSOP (TYPE II) and 48-pin
mini BGA (6mmx8mm).
ISSI
MAY 2005
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DD
V
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
CS1
OE
WE
UB
LB
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
256K x 16
MEMORY ARRAY
COLUMN I/O
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
1
IS62WV25616ALL, IS62WV25616BLL ISSI
®
PIN CONFIGURATIONS
48- ball mini BGA (6mm x 8mm)
(Package Code B)
1 2 3 4 5 6
A1
OE
UB A3
I/O10A5
A17
I/O
11
I/O12NC
A14
I/O
13
A12
NC
A8
A0
A9
A
B
C
D
E
F
G
H
LB
I/O
I/O
GND
VDD
I/O
I/O
NC
8
9
14
15
A4
A6
A7
A16
A15
A13
A10
A2
CSI I/O
I/O1I/O
I/O
3
I/O
4
I/O
5
WE
A11 NC
NC
VDD
GND
I/O
I/O
44-Pin mini TSOP (Type II)
(Package Code T)
1
A4
A3
2
A2
3
A1
4
A0
5
CS1
6
I/O0
7
I/O1
8
I/O2
9
I/O3
0
2
6
7
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A17
PIN DESCRIPTIONS
A0-A17 Address Inputs
I/O0-I/O15 Data Inputs/Outputs
CS1 Chip Enable Input
OE Output Enable Input
WE Write Enable Input
LB Lower-byte Control (I/O0-I/O7)
UB Upper-byte Control (I/O8-I/O15)
N C No Connection
VDD Power
GND Ground
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV25616ALL, IS62WV25616BLL ISSI
TRUTH TABLE
I/O PIN
Mode
WEWE
WE
WEWE
Not Selected X H X X X High-Z High-Z I
Output Disabled H L H L X High-Z High-Z ICC
Read H L L L H DOUT High-Z ICC
Write L L X L H DIN High-Z ICC
CS1CS1
CS1
CS1CS1
OEOE
OE
OEOE
LBLB
LB
LBLB
UBUB
UB I/O0-I/O7 I/O8-I/O15 VDD Current
UBUB
SB1, ISB2
XXXHH High-Z High-Z ISB1, ISB2
H L H X L High-Z High-Z ICC
H L L H L High-Z DOUT
HLLLL DOUT DOUT
L L X H L High-Z DIN
LLXLL DIN DIN
®
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.2 to VDD+0.3 V
VDD VDD Related to GND –0.2 to VDD+0.3 V
TSTG Storage Temperature –65 to +150 ° C
PT Power Dissipation 1.0 W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
OPERATING RANGE (VDD)
Range Ambient Temperature IS62WV25616ALL IS62WV25616BLL
Commercial 0°C to +70°C 1.65V - 2.2V 2.5V-3.6V
Industrial –40°C to +85°C 1.65V - 2.2V 2.5V-3.6V
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions VDD Min. Max. Unit
VOH Output HIGH Voltage IOH = -0.1 mA 1.65-2.2V 1.4 — V
IOH = -1 mA 2.5-3.6V 2.2 — V
VOL Output LOW Voltage IOL = 0.1 mA 1.65-2.2V — 0.2 V
IOL = 2.1 mA 2.5-3.6V — 0.4 V
VIH Input HIGH Voltage 1.65-2.2V 1.4 VDD + 0.2 V
2.5-3.6V 2.2 VDD + 0.3 V
(1)
VIL
Input LOW Voltage 1.65-2.2V –0.2 0.4 V
2.5-3.6V –0.2 0. 6 V
ILI Input Leakage GND ≤ VIN ≤ VDD –1 1 µA
ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled – 1 1 µA
Notes: 1. VIL (min.) = –1.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
3
IS62WV25616ALL, IS62WV25616BLL ISSI
®
IS62WV25616ALL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter Test Conditions Max. Unit
70
ICC VDD Dynamic Operating VDD = Max., Com. 25 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. 30
ICC1 Operating Supply VDD = Max., CS1 = 0.2V Com. 10 m A
Current WE = VDD-0.2V Ind. 1 0
f=1MHZ
ISB1 TTL Standby Current VDD = Max., Com . 0.35 m A
(TTL Inputs) VIN = VIH or VIL Ind. 0.35
CS1 = VIH , f = 1 MHZ
ULB Control
VDD = Max., VIN = VIH or VIL
OR
CS1 = VIL, f = 0, UB = VIH, LB = VIH
ISB2 CMOS Standby VDD = Max., Com. 1 5 µ A
Current (CMOS Inputs) CS1 ≥ VDD – 0.2V, In d. 1 5
VIN ≥ VDD – 0.2V, or
VIN ≤ 0.2V, f = 0
OR
ULB Control VDD = Max., CS1 = VIL,
VIN ≤ 0.2V, f = 0; UB / LB = VDD – 0.2V
IS62WV25616BLL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter Test Conditions Max. Max. Unit
55 70
ICC VDD Dynamic Operating VDD = Max., Com. 40 35 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. 45 40
ICC1 Operating Supply VDD = Max., CS1 = 0.2V Com. 15 15 m A
Current WE = VDD-0.2V Ind. 15 15
f=1MHZ
ISB1 TTL Standby Current VDD = Max., Com. 0.35 0.35 m A
(TTL Inputs) VIN = VIH or VIL Ind. 0.35 0.35
CS1 = VIH, f = 1 MHZ
OR
ULB Control
VDD = Max., VIN = VIH or VIL
CS1 = VIL, f = 0, UB = VIH, LB = VIH
ISB2 CMOS Standby VDD = Max., C om. 15 15 µ A
Current (CMOS Inputs) CS1 ≥ VDD – 0.2V, Ind. 15 15
VIN ≥ VDD – 0.2V, or
VIN ≤ 0.2V, f = 0
OR
ULB Control VDD = Max., CS1 = VIL,
VIN ≤ 0.2V, f = 0; UB / LB = VDD – 0.2V
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV25616ALL, IS62WV25616BLL ISSI
®
CAPACITANCE
(1)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 8 pF
COUT Input/Output Capacitance VOUT = 0V 10 pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
AC TEST CONDITIONS
IS62WV25616ALL IS62WV25616BLL
Parameter (Unit) (Unit)
Input Pulse Level 0.4V to VDD-0.2V 0.4V to VDD-0.3V
Input Rise and Fall Times 5 ns 5ns
Input and Output Timing VREF VREF
and Reference Level
Output Load See Figures 1 and 2 See Figures 1 and 2
IS62WV25616ALL IS62WV25616BLL
1.65V-2.2V 2.5V - 3.6V
Ω)Ω)
R1(
Ω) 3070 3070
Ω)Ω)
Ω)Ω)
R2(
Ω) 3150 3150
Ω)Ω)
VREF 0.9V 1.5V
VTM 1.8V 2.8V
AC TEST LOADS
R1
VTM
OUTPUT
30 pF
Including
jig and
scope
R2
VTM
OUTPUT
5 pF
Including
jig and
scope
R1
R2
Figure 1 Figure 2
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
5
IS62WV25616ALL, IS62WV25616BLL ISSI
®
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
55 ns 70 ns
Symbol Parameter Min. Max. Min. Max. Unit
tRC Read Cycle Time 5 5 — 70 — ns
tAA Address Access Time — 55 — 70 ns
tOHA Output Hold Time 1 0 — 10 — ns
tACS1 CS1 Access Time — 55 — 70 ns
tDOE OE Access Time — 25 — 35 ns
(2)
tHZOE
tLZOE
(2)
OE to High-Z Output — 20 — 2 5 ns
OE to Low-Z Output 5 — 5 — ns
tHZCS1 CS1 to High-Z Output 0 2 0 0 25 ns
tLZCS1 CS1 to Low-Z Output 10 — 10 — ns
tBA LB, UB Access Time — 55 — 70 ns
tHZB LB, UB to High-Z Output 0 2 0 0 25 ns
tLZB LB, UB to Low-Z Output 0 — 0 — ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
DD-0.2V/VDD-0.3V and output loading specified in Figure 1.
V
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV25616ALL, IS62WV25616BLL ISSI
AC WAVEFORMS
®
READ CYCLE NO. 1
ADDRESS
D
OUT
READ CYCLE NO. 2
ADDRESS
(1,2)
(Address Controlled) (CS1 = OE = VIL, WE = VIH, UB or LB = VIL)
t
RC
t
AA
t
OHA
PREVIOUS DATA VALID
(1,3)
(CS1, OE, AND UB/LB Controlled)
t
AA
t
RC
DATA VALID
t
OHA
t
OHA
OE
t
DOE
t
CS1
t
ACE1
t
LZCE1
LB
,
UB
t
LZB
DOUT
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1, UB, or LB = V
3. Address is valid prior to or coincident with CS1 LOW transition.
HIGH-Z
LZOE
t
BA
IL. WE=VIH.
t
HZCS1
t
DATA VALID
t
HZOE
HZB
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
7
IS62WV25616ALL, IS62WV25616BLL ISSI
®
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,2)
(Over Operating Range)
55 ns 70 ns
Symbol Parameter Min . Max. Min. Max. Unit
tWC Write Cycle Time 55 — 70 — ns
tSCS1 CS1 to Write End 45 — 60 — ns
tAW Address Setup Time to Write End 45 — 60 — ns
tHA Address Hold from Write End 0 — 0 — ns
tSA Address Setup Time 0 — 0 — ns
tPWB LB, UB Valid to End of Write 45 — 60 — ns
tPWE WE Pulse Width 40 — 50 — ns
tSD Data Setup to Write End 25 — 30 — ns
tHD Data Hold from Write End 0 — 0 — ns
(3)
tHZWE
tLZWE
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4V to
DD-0.2V/VDD-0.3V and output loading specified in Figure 1.
V
The internal write time is defined by the overlap of CS1 LOW and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any one can
2.
go inactive to
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
WE LOW to High-Z Output — 20 — 20 ns
(3)
WE HIGH to Low-Z Output 5 — 5 — ns
terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.
8
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV25616ALL, IS62WV25616BLL ISSI
AC WAVEFORMS
WE
DIN
(1,2)
(CS1 Controlled, OE = HIGH or LOW)
t
WC
t
SCS1
t
AW
t
PWE
t
PWB
t
SA
DATA UNDEFINED
t
HZWE
HIGH-Z
t
SD
DATA-IN VALID
t
HA
t
LZWE
t
HD
WRITE CYCLE NO. 1
ADDRESS
CS1
LB, UB
DOUT
®
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 and WE inputs and at
least one of the LB and UB inputs being in the LOW state.
2. WRITE = (CS1) [ (LB) = (UB) ] (WE).
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
t
WC
ADDRESS
OE
t
HA
t
LZWE
t
HD
CS1
WE
LB, UB
DOUT
t
SA
DATA UNDEFINED
t
SCS1
t
AW
t
PWE
t
HZWE
HIGH-Z
t
SD
DIN
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
DATA-IN VALID
1-800-379-4774
9
IS62WV25616ALL, IS62WV25616BLL ISSI
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
t
WC
ADDRESS
OE
t
HA
t
t
LZWE
HD
CS1
WE
LB, UB
DOUT
DIN
t
SA
DATA UNDEFINED
t
SCS1
t
AW
t
PWE
t
HZWE
HIGH-Z
t
SD
DATA-IN VALID
®
WRITE CYCLE NO. 4 (UB/LB Controlled)
ADDRESS
OE
LOW
CS1
WE
UB, LB
t
HZWE
OUT
D
D
IN
DATA UNDEFINED
t
t
WC
ADDRESS 1 ADDRESS 2
t
SA
t
HA
t
t
PBW
WORD 1
HIGH-Z
t
t
SD
DATA
IN
VALID
HD
WC
SA
t
WORD 2
t
SD
PBW
DATA
VALID
t
HA
t
LZWE
t
HD
IN
UB_CSWR4.eps
10
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV25616ALL, IS62WV25616BLL ISSI
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter Test Condition Min. Max. Unit
VDR VDD for Data Retention See Data Retention Waveform 1.2 3.6 V
IDR Data Retention Current V DD = 1.2V, CS1 ≥ VDD – 0.2V — 15 µA
tSDR Data Retention Setup Time See Data Retention Waveform 0 — n s
tRDR Recovery Time See Data Retention Waveform tRC —ns
DATA RETENTION WAVEFORM (CS1 Controlled)
®
GND
V
V
CS1
SDR
t
DD
DR
Data Retention Mode
CS1 ≥ V
DD
- 0.2V
t
RDR
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
11
IS62WV25616ALL, IS62WV25616BLL ISSI
ORDERING INFORMATION
IS62WV25616ALL (1.65V-2.2V)
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No. Package
70 IS62WV25616ALL-70T TSOP
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No. Package
70 IS62WV25616ALL-70TI TSOP
70 IS62WV25616ALL-70BI mini BGA (6mmx8mm)
®
IS62WV25616BLL (2.5V - 3.6V)
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No. Package
55 IS62WV25616BLL-55T TSOP
70 IS62WV25616BLL-70T TSOP
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No. Package
55 IS62WV25616BLL-55TI TSOP
55 IS62WV25616BLL-55TLI TSOP, Lead-free
55 IS62WV25616BLL-55BI mini BGA (6mmx8mm)
55 IS62WV25616BLL-55BLI mini BGA (6mmx8mm), Lead-free
12
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
PACKAGING INFORMATION ISSI
Mini Ball Grid Array
Package Code: B (48-pin)
T op Vie w Bottom View
φ b (48x)
6 5 4 3 2 11 2 3 4 5 6
®
A
B
C
D
D
E
F
G
H
A2
SEATING PLANE
mBGA - 6mm x 8mm
A1
e
D1
A
Notes:
1. Controlling dimensions are in millimeters.
mBGA - 8mm x 10mm
A
B
C
D
E
F
G
H
e
E1E
MILLIMETERS INCHES
Sym. Min. Typ. Max. Min. Typ. Max.
N0.
Leads 48
A — — 1.20 — — 0.047
A1 0.24 — 0.30 0.009 — 0.012
A2 0.60 — — 0.024 — —
D 7.90 — 8.10 0.311 — 0.319
D1 5.25 BSC 0.207 BSC
E 5.90 — 6.10 0.232 — 0.240
E1 3.75 BSC 0.148 BSC
e 0.75 BSC 0.030 BSC
b 0.30 0.35 0.40 0.012 0.014 0.016
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. D
01/15/03
Sym. Min. Typ. Max. Min. Typ. Max.
N0.
Leads 48
A — — 1.20 — — 0.047
A1 0.24 — 0.30 0.009 — 0.012
A2 0.60 — — 0.024 — —
D 9.90 — 10.10 0.390 — 0.398
D1 5.25 BSC 0.207 BSC
E 7.90 — 8.10 0.311 — 0.319
E1 3.75 BSC 0.148 BSC
e 0.75 BSC 0.030 BSC
b 0.30 0.35 0.40 0.012 0.014 0.016
1-800-379-4774
MILLIMETER INCHES
PACKAGING INFORMATION ISSI
Plastic TSOP
Package Code: T (Type II)
®
N/2+1N
E
E1
1
N/2
Notes:
1. Controlling dimension: millimieters,
unless otherwise specified.
2. BSC = Basic lead spacing
between centers.
3. Dimensions D and E1 do not
include mold flash protrusions and
should be measured from the
bottom of the package.
4. Formed leads shall be planar with
respect to one another within
0.004 inches at the seating plane.
D
SEATING PLANE
A
ZD
.
e
b
A1
L
α
C
Plastic TSOP (T - Type II)
Millimeters Inches Millimeters Inches Millimeters Inches
Symbol Min Max Min Max Min Max Min Max Min Max Min Max
Ref. Std.
No. Leads (N) 32 44 50
A — 1.20 — 0.047 — 1.20 — 0.047 — 1.20 — 0.047
A1 0.05 0.15 0.002 0.006 0.05 0.15 0.002 0.006 0.05 0.15 0.002 0.006
b 0.30 0.52 0.012 0.020 0.30 0.45 0.012 0.018 0.30 0.45 0.012 0.018
C 0.12 0.21 0.005 0.008 0.12 0.21 0.005 0.008 0.12 0.21 0.005 0.008
D 20.82 21.08 0.820 0.830 18.31 18.52 0.721 0.729 20.82 21.08 0.820 0.830
E1 10.03 10.29 0.391 0.400 10.03 10.29 0.395 0.405 10.03 10.29 0.395 0.405
E 11.56 11.96 0.451 0.466 11.56 11.96 0.455 0.471 11.56 11.96 0.455 0.471
e 1.27 BSC 0.050 BSC 0.80 BSC 0.032 BSC 0.80 BSC 0.031 BSC
L 0.40 0.60 0.016 0.024 0.41 0.60 0.016 0.024 0.40 0.60 0.016 0.024
ZD 0.95 REF 0.037 REF 0.81 REF 0.032 REF 0.88 REF 0.035 REF
α 0° 5° 0° 5° 0° 5° 0° 5° 0° 5° 0° 5°
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
06/18/03
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