Datasheet IS62U6416LL-20BI, IS62U6416LL-20B, IS62U6416LL-20TI, IS62U6416LL-20T, IS62U6416LL-20KI Datasheet (ISSI)
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IS62U6416LL
IS62U6416LL
ISSI
ISSI
®
®
64K x 16 LOW VOLTAGE,
ULTRA-LOW POWER CMOS STATIC RAM
FEATURES
• Access time: 200 ns
• CMOS low power operation
– 40 mW (typical) operating
– 90 µW (typical) standby
• TTL compatible interface levels
• Single 1.8V-2.7V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in Jedec Std 44-pin SOJ package,
44-pin TSOP (Type II), and 48-pin mini BGA
DESCRIPTION
The ISSI IS62U6416LL is an ultra-low power, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using ISSI's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques yields access times as fast as 200 ns with
low power consumption.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
ADVANCE INFORMATION
DECEMBER 1998
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FUNCTIONAL BLOCK DIAGRAM
A0-A15
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
CE
OE
WE
UB
LB
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
64K x 16
MEMORY ARRAY
COLUMN I/O
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The specification contains ADVANCE INFORMATION. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
1
IS62U6416LL
PIN CONFIGURATIONS
ISSI
®
44-Pin SOJ
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
44-Pin TSOP
44
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A5
43
A6
42
A7
41
OE
40
UB
39
LB
38
I/O15
37
I/O14
36
I/O13
35
I/O12
34
GND
33
Vcc
32
I/O11
31
I/O10
30
I/O9
29
I/O8
28
NC
27
A8
26
A9
25
A10
24
A11
23
NC
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
48-Pin mini BGA (Top View)
1 2 3 4 5 6
A1
OE
UB A3
I/O
10
I/O
11
I/O
12
I/O
A14
13
A12
NC
A8
A0
A5
NC
NC
A4
A6
A7
NC
A15
A13
A10
A9
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
Vcc
I/O
14
I/O
15
NC
A2
N/C
I/O
CE
I/O
I/O
1
I/O
Vcc
3
I/O
GND
4
I/O
I/O
5
I/O
WE
A11 NC
PIN DESCRIPTIONS
A0-A15 Address Inputs
I/O0-I/O15 Data Inputs/Outputs
CE
OE
WE
0
2
LB
UB
NC No Connection
Vcc Power
6
7
GND Ground
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
IS62U6416LL
TRUTH TABLE
ISSI
®
I/O Pin
Mode
Not Selected X H X X X High-Z High-Z ISB1, ISB2
Output Disabled H L H X X High-Z High-Z ICC
Read H L L L H DOUT High-Z ICC
Write L L X L H DIN High-Z ICC
WEWE
WE
WEWE
X L X H H High-Z High-Z
H L L H L High-Z DOUT
HLLLL DOUT DOUT
L L X H L High-Z DIN
LLXLL DIN DIN
CECE
CE
CECE
OEOE
OE
OEOE
LBLB
LB
LBLB
UBUB
UB
UBUB
I/O0-I/O7 I/O8-I/O15 Vcc Current
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0.4 to 1.8V
Input Rise and Fall Times 5 ns
Input and Output Timing and Reference Level 0.9V
Output Load See Figures 1 and 2
(1)
(1)
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2
3
4
5
6
AC TEST LOADS
3070 Ω
1.8V
OUTPUT
100 pF
Including
jig and
scope
Figure 1.
3150 Ω
1.8V
OUTPUT
30 pF
Including
jig and
scope
Figure 2.
3070 Ω
3150 Ω
THEVENIN EQUIVALENT
1554 Ω
OUTPUT 0.91V
Figure 3.
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
3
IS62U6416LL
ISSI
®
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to Vcc +0.5 V
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1.5 W
IOUT DC Output Current (LOW) 20 mA
(1)
Note:
1. Stress greater than those listed under
ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the
device. This is a stress rating only and
functional operation of the device at
these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods
may affect reliability.
OPERATING RANGE
Range Ambient Temperature VCC
Commercial 0°C to +70°C 1.8V (Min.) to 2.7V (Max.)
Industrial –40°C to +85°C 1.8V (Min.) to 2.7V (Max.)
DC ELECTRICAL CHARACTERISTICS (Over Operating Range Unless Otherwise Specified)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = Min., IOH = –0.44 mA 1.6 — V
VOL Output LOW Voltage VCC = Min., IOL = 0.33 mA — 0.4 V
VIH Input HIGH Voltage 1.6 VCC + 0.2 V
(1)
VIL
Input LOW Voltage –0.2 0.4 V
ILI Input Leakage GND ≤ VIN ≤ VCC –1 1 µA
ILO Output Leakage GND ≤ VOUT ≤ VCC, Outputs Disabled –1 1 µA
Note:
IL (min.) = –1.5V for pulse width less than 30 ns.
1. V
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range Unless Otherwise Specified)
-200
Symbol Parameter Test Conditions Min. Max. Unit
ICC Vcc Dynamic Operating VCC = Max., Com. — 25 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. — 40
CE
= VIH
ISB1 TTL Standby Current VCC = Max., Com. — 0.3 mA
(TTL Inputs) VIN = VIH or VIL Ind. — 0.3
CE
≥ VIH , f = 0
ISB2 CMOS Standby VCC = Max., Com. — 5 µA
Current (CMOS Inputs)
CE
≥ VCC – 0.2V, Ind. — 5
VIN ≤ 0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency; f = 0 means no input lines change.
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
IS62U6416LL
ISSI
®
CAPACITANCE
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 8 pF
COUT Input/Output Capacitance VOUT = 0V 10 pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS
(Over Operating Range)
Symbol Parameter Min. Max. Unit
tRC Read Cycle Time 200 — ns
tAA Address Access Time — 200 ns
tOHA Output Hold Time 20 — ns
(1)
(1)
-200
1
2
3
4
5
6
tACE
tDOE
tHZOE
tLZOE
tHZCE
tLZCE
tBA
tHZB
tLZB
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing
reference levels of 0.9V, input pulse levels of 0.4 to 1.8V and output
loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500mV from
steady-state voltage. Not 100% tested.
CE
Access Time — 200 ns
OE
Access Time — 100 ns
(2)
OE
to High-Z Output 0 50 ns
(2)
OE
to Low-Z Output 20 — ns
(2)
CE
to High-Z Output 0 50 ns
(2)
CE
to Low-Z Output 30 — ns
LB, UB
LB, UB
LB, UB
Access Time — 100 ns
to High-Z Output 0 50 ns
to Low-Z Output 20 — ns
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
5
IS62U6416LL
AC WAVEFORMS
ISSI
®
READ CYCLE NO. 1
ADDRESS
D
OUT
READ CYCLE NO. 2
ADDRESS
OE
(1,2)
(Address Controlled) (CE = OE = VIL, UB or LB = VIL)
t
RC
t
AA
t
OHA
PREVIOUS DATA VALID
(1,3)
t
RC
t
AA
t
OHA
DATA VALID
t
OHA
t
DOE
t
CE
t
LZCE
LZOE
t
ACE
LB, UB
t
BA
t
D
OUT
HIGH-Z
Notes:
1.WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = V
3. Address is valid prior to or coincident with CE LOW transition.
LZB
IL.
DATA VALID
t
HZOE
t
HZCE
t
HZB
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
IS62U6416LL
ISSI
®
-200
(1,2)
(Over Operating Range)
WRITE CYCLE SWITCHING CHARACTERISTICS
Symbol Parameter Min. Max. Unit
tWC Write Cycle Time 200 — ns
tSCE
tAW Address Setup Time to Write End 160 — ns
tHA Address Hold from Write End 0 — ns
tSA Address Setup Time 0 — ns
tPWB
tPWE
tSD Data Setup to Write End 160 — ns
tHD Data Hold from Write End 0 — ns
tHZWE
tLZWE
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V,
input pulse levels of 0.4V to 1.8V and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All
signals must be in valid states to initiate a Write, but any one can go inactive to terminate the
Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the
signal that terminates the write.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
CE
to Write End 160 — ns
LB, UB
WE
(3)
WE
(3)
WE
Valid to End of Write 160 — ns
Pulse Width 160 — ns
LOW to High-Z Output — 50 ns
HIGH to Low-Z Output 20 — ns
1
2
3
4
5
6
DATA RETENTION CHARACTERISTICS
Symbol Parameter Test Condition Min. Max. Unit
V
DR
I
DR
t
SDR
t
RDR
Vcc for Data Retention
Data Retention Current VCC = V
Data Retention Set up Time
Recovery Time
CE
≥ VCC – 0.2V 1.5 — V
CE
≥ VCC – 0.2V
See Data Retention Waveform
See Data Retention Waveform t
DR
— 5.0 µA
0— ns
RC
—ns
DATA RETENTION TIMING DIAGRAM
DATA RETENTION MODE
CE ≥ VCC – 0.2V
t
RDR
V
CC
1.8V
V
V
DR
CE
GND
t
SDR
IH
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
7
IS62U6416LL
AC WAVEFORMS
WRITE CYCLE NO. 1
ADDRESS
(1,2)
(
WE
Controlled)
tWC
ISSI
®
LB, UB
WE
WRITE
DIN
DOUT
CE
(1)
tSA
tHZWE
tSCE
tPWB
tAW
tPWE
tSD
UNDEFINED UNDEFINED
tHD
HIGH-ZHIGH-Z
tHA
tLZWE
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
IS62U6416LL
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
ISSI
®
Speed (ns) Order Part No. Package
200 IS62U6416LL-20T Plastic TSOP (Type II)
IS62U6416LL-20K 400-mil Plastic SOJ
IS62U6416LL-20B Mini BGA (6mm x 8mm)
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No. Package
200 IS62U6416LL-20TI Plastic TSOP (Type II)
IS62U6416LL-20KI 400-mil Plastic SOJ
IS62U6416LL-20BI Mini BGA (6mm x 8mm)
NOTICE
Integrated Silicon Solution, Inc., reserves the right to make changes to the products contained in this publication in
order to improve design, performance or reliability. Integrated Silicon Solution, Inc. assumes no responsibility for the
use of any circuits described herein, conveys no license under any patent or other right, and makes no representation
that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating
parameters, and may vary depending upon a user's specific application. While the information in this publication has
been carefully checked, Integrated Silicon Solution, Inc. shall not be liable for any damages arising as a result of any
error or omission.
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Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where
the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to
significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated
Silicon Solution, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been
minimized; (b) the user assumes all such risks; and (c) potential liability of Integrated Silicon Solution, Inc. is adequately
protected under the circumstances.
Copyright 1998 Integrated Silicon Solution, Inc.
Reproduction in whole or in part, without the prior written consent of Integrated Silicon Solution, Inc., is prohibited.
ISSI
Integrated Silicon Solution, Inc.
2231 Lawson Lane
Santa Clara, CA 95054
Fax: (408) 588-0806
Toll Free: 1-800-379-4774
email: sales@issi.com
http://www.issi.com
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
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