Page 1
IS61C1024
®
IS61C1024L
128K x 8 HIGH-SPEED
CMOS STATIC RAM
FEATURES
• High-speed access time: 12, 15, 20, 25 ns
• Low active power: 600 mW (typical)
• Low standby power: 500 µW (typical) CMOS
standby
• Output Enable (OE) and two Chip Enable
(
CE1
and CE2) inputs for ease in applications
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Low power version available: IS61C1024L
• Commercial and industrial temperature ranges
available
ISSI
MAY 1999
DESCRIPTION
The ISSI IS61C1024 and IS61C1024L are very high-speed,
low power, 131,072-word by 8-bit CMOS static RAMs. They
are fabricated using
technology. This highly reliable process coupled with innovative
circuit design techniques, yields higher performance and low
power consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable
inputs,
controls both writing and reading of the memory.
The IS61C1024 and IS61C1024L are available in 32-pin
300-mil SOJ, and TSOP (Type I, 8x20), and sTSOP (Type I,
8 x 13.4) packages.
CE1
and CE2. The active LOW Write Enable (WE)
ISSI
's high-performance CMOS
FUNCTIONAL BLOCK DIAGRAM
A0-A16
VCC
GND
I/O0-I/O7
CE1
CE2
OE
WE
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
512 x 2048
MEMORY ARRAY
COLUMN I/O
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1K
05/12/99
1
Page 2
IS61C1024
IS61C1024L
®
ISSI
PIN CONFIGURATION
32-Pin SOJ
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
PIN DESCRIPTIONS
A0-A16 Address Inputs
CE1
Chip Enable 1 Input
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION
32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H)
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
CE2 Chip Enable 2 Input
OE
WE
Output Enable Input
Write Enable Input
I/O0-I/O7 Input/Output
Vcc Power
GND Ground
OPERATING RANGE
Range Ambient Temperature VCC
Commercial 0°C to +70°C 5V ± 10%
Industrial –40°C to +85°C 5V ± 10%
TRUTH TABLE
Mode
WEWE
WE
WEWE
Not Selected X H X X High-Z ISB1, ISB2
(Power-down) X X L X High-Z ISB1, ISB2
Output Disabled H L H H High-Z ICC1, ICC2
Read H L H L DOUT ICC1, ICC2
Write L L H X DIN ICC1, ICC2
CE1CE1
CE1
CE1CE1
CE2
OEOE
OE
OEOE
I/O Operation Vcc Current
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
Page 3
IS61C1024
IS61C1024L
®
ISSI
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +7.0 V
TBIAS Temperature Under Bias –55 to +125 °C
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1.5 W
IOUT DC Output Current (LOW) 20 mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 5 pF
COUT Output Capacitance VOUT = 0V 7 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
(1,2)
A = 25°C, f = 1 MHz, Vcc = 5.0V.
(1)
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 — V
VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA — 0.4 V
VIH Input HIGH Voltage 2.2 VCC + 0.5 V
VIL Input LOW Voltage
ILI Input Leakage GND ≤ VIN ≤ VCC Com. –2 2 µA
ILO Output Leakage GND ≤ VOUT ≤ VCC Com. –2 2 µA
Note:
1. VIL = –3.0V for pulse width less than 10 ns.
(1)
Ind. –5 5
Outputs Disabled Ind. –5 5
–0.3 0.8 V
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1K
05/12/99
3
Page 4
IS61C1024
IS61C1024L
®
ISSI
IS61C1024 POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Min. Max. Unit
ICC1 Vcc Operating VCC = VCC MAX., CE = VIL Com. — 85 — 85 — 85 — 85 mA
Supply Current IOUT = 0 mA, f = 0 Ind. — 110 — 110 — 110 — 110
ICC2 Vcc Dynamic Operating VCC = VCC MAX., CE = VIL Com. — 170 — 160 — 150 — 140 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. — 180 — 170 — 160 — 150
ISB1 TTL Standby Current VCC = VCC MAX., Com. — 40 — 40 — 40 — 40 mA
(TTL Inputs) VIN = VIH or VIL Ind. — 60 — 60 — 60 — 60
CE1
≥ VIH, f = 0 or
CE2 ≤ VIL, f = 0
ISB2 CMOS Standby VCC = VCC MAX., Com. — 30 — 30 — 30 — 30 mA
Current (CMOS Inputs)
Note:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CE1
≤ VCC – 0.2V, Ind. — 40 — 40 — 40 — 40
CE2 ≤ 0.2V
VIN > VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
IS61C1024L POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-12 ns -15 ns -20 ns -25 ns
(1)
(Over Operating Range)
-15 ns -20 ns -25 ns
Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Unit
ICC1 Vcc Operating VCC = VCC MAX., CE = VIL Com. — 85 — 85 — 85 mA
Supply Current IOUT = 0 mA, f = 0 Ind. — 110 — 110 — 110
ICC2 Vcc Dynamic Operating VCC = VCC MAX., CE = VIL Com. — 160 — 150 — 140 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. — 170 — 160 — 150
ISB1 TTL Standby Current VCC = VCC MAX, Com. — 40 — 40 — 40 mA
(TTL Inputs) VIN = VIH or VIL Ind. — 60 — 60 — 60
CE1
≥ VIH, f = 0 or
CE2 ≤ VIL, f = 0
ISB2 CMOS Standby VCC = VCC MAX., Com. — 500 — 500 — 500 µA
Current (CMOS Inputs)
Note:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CE1
≤ VCC – 0.2V, Ind. — 750 — 750 — 750
CE2 ≤ 0.2V
VIN > VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
Page 5
IS61C1024
IS61C1024L
®
ISSI
READ CYCLE SWITCHING CHARACTERISTICS
(2)
-12
(1)
(Over Operating Range)
-15 ns -20 ns -25 ns
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit
tRC Read Cycle Time 12 — 15 — 20 — 25 — ns
tAA Address Access Time — 12 — 15 — 20 — 25 ns
tOHA Output Hold Time 3 — 3 — 3 — 3 — ns
tACE1
CE1
Access Time — 12 — 15 — 20 — 25 ns
tACE2 CE2 Access Time — 12 — 15 — 20 — 25 ns
tDOE
tLZOE
tHZOE
tLZCE1
tLZCE2
tHZCE
tPU
tPD
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. -12 ns device for IS61C1024 only.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4. Not 100% tested.
OE
Access Time — 6 — 7 — 9 — 9 ns
(3)
OE
to Low-Z Output 0 — 0 — 0 — 0 — ns
(3)
OE
to High-Z Output 0 6 0 6 0 7 0 10 ns
(3)
CE1
to Low-Z Output 2 — 2 — 3 — 3 — ns
(3)
CE2 to Low-Z Output 2 — 2 — 3 — 3 — ns
(3)
CE1
or CE2 to High-Z Output 0 7 0 8 0 9 0 10 ns
(4)
CE1
or CE2 to Power-Up 0 — 0 — 0 — 0 — ns
(4)
CE1
or CE2 to Power-Down — 12 — 12 — 18 — 20 ns
and output loading specified in Figure 1.
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0V to 3.0V
Input Rise and Fall Times 3 ns
Input and Output Timing 1.5V
and Reference Level
Output Load See Figures 1 and 2
AC TEST LOADS
480 Ω
5V
OUTPUT
30 pF
Including
jig and
scope
255 Ω
Figure 1 Figure 2
OUTPUT
5V
5 pF
Including
jig and
scope
480 Ω
255 Ω
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1K
05/12/99
5
Page 6
IS61C1024
IS61C1024L
AC WAVEFORMS
®
ISSI
READ CYCLE NO. 1
ADDRESS
D
OUT
READ CYCLE NO. 2
ADDRESS
OE
(1,2)
PREVIOUS DATA VALID
(1,3)
t
AA
t
OHA
t
RC
t
AA
DATA VALID
t
RC
t
OHA
t
READ1.eps
OHA
t
CE1
CE2
t
LZCE1
t
LZCE2
D
OUT
Notes:
1.WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE,
3. Address is valid prior to or coincident with
HIGH-Z
DOE
t
LZOE
t
ACE1
t
ACE2
CE1
IL, CE2 = VIH.
= V
CE1
LOW and CE2 HIGH transitions.
DATA VALID
t
HZOE
t
HZCE1
t
HZCE2
CE2_RD2.eps
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
Page 7
IS61C1024
IS61C1024L
®
ISSI
WRITE CYCLE SWITCHING CHARACTERISTICS
(3)
-12 ns
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit
(1,2)
(Over Operating Range, Standard and Low Power)
-15 ns -20 ns -25 ns
tWC Write Cycle Time 12 — 15 — 20 — 25 — ns
tSCE1
CE1
to Write End 10 — 12 — 15 — 20 — ns
tSCE2 CE2 to Write End 10 — 12 — 15 — 20 — ns
tAW Address Setup Time to Write End 10 — 12 — 15 — 20 — ns
tHA Address Hold from Write End 0 — 0 — 0 — 0 — ns
tSA Address Setup Time 0 — 0 — 0 — 0 — ns
(4)
tPWE
WE
Pulse Width 10 — 10 — 12 — 15 — ns
tSD Data Setup to Write End 7 — 8 — 10 — 12 — ns
tHD Data Hold from Write End 0 — 0 — 0 — 0 — ns
(5)
tHZWE
tLZWE
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. The internal write time is defined by the overlap of
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
3. -12 ns device for IS61C1024 only.
4. Tested with OE HIGH.
5. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
WE
LOW to High-Z Output — 7 — 7 — 10 — 12 ns
(5)
WE
HIGH to Low-Z Output 2 — 2 — 2 — 2 — ns
CE1
LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1K
05/12/99
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Page 8
IS61C1024
IS61C1024L
AC WAVEFORMS
WRITE CYCLE NO. 1
(CE Controlled, OE is HIGH or LOW)
t WC
®
ISSI
(1 )
ADDRESS
CE1
CE2
WE
D
OUT
D
IN
WRITE CYCLE NO. 2
VALID ADDRESS
t SA
t SCE1
t SCE2
t AW
t PWE1
t PWE2
t HZWE
DATA UNDEFINED
(OE is HIGH During Write Cycle)
t WC
HIGH-Z
(1,2)
t SD
DATAIN VALID
t HA
t LZWE
t HD
CE2_WR1.eps
ADDRESS
VALID ADDRESS
t HA
OE
CE1
CE2
LOW
HIGH
t AW
t PWE1
WE
t HZWE
HIGH-Z
D
OUT
t SA
DATA UNDEFINED
t SD
D
IN
Notes:
1. The internal write time is defined by the overlap of
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to
the rising or falling edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE = V
IH.
CE1
LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
DATAIN VALID
t LZWE
t HD
CE2_WR2.eps
8
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
Page 9
IS61C1024
IS61C1024L
®
ISSI
WRITE CYCLE NO. 3
ADDRESS
LOW
OE
CE1
CE2
D
WE
OUT
D
LOW
HIGH
IN
(OE is LOW During Write Cycle)
VALID ADDRESS
t
AW
t
SA
DATA UNDEFINED
t
HZWE
t
WC
t
PWE2
(1)
HIGH-Z
t
SD
DATAIN VALID
t
HA
t
LZWE
t
HD
CE2_WR3.eps
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1K
05/12/99
9
Page 10
IS61C1024
IS61C1024L
®
ISSI
IS61C1024 STANDARD VERSION
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No. Package
12 IS61C1024-12J 300-mil Plastic SOJ
12 IS61C1024-12K 400-mil Plastic SOJ
12 IS61C1024-12H sTSOP (Type I)
12 IS61C1024-12T TSOP (Type I)
15 IS61C1024-15J 300-mil Plastic SOJ
15 IS61C1024-15K 400-mil Plastic SOJ
15 IS61C1024-15H sTSOP (Type I)
15 IS61C1024-15T TSOP (Type I)
20 IS61C1024-20J 300-mil Plastic SOJ
20 IS61C1024-20K 400-mil Plastic SOJ
20 IS61C1024-20H sTSOP (Type I)
20 IS61C1024-20T TSOP (Type I)
25 IS61C1024-25J 300-mil Plastic SOJ
25 IS61C1024-25K 400-mil Plastic SOJ
25 IS61C1024-25H sTSOP (Type I)
25 IS61C1024-25T TSOP (Type I)
IS61C1024 STANDARD VERSION
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No. Package
12 IS61C1024-12JI 300-mil Plastic SOJ
12 IS61C1024-12KI 400-mil Plastic SOJ
12 IS61C1024-12HI sTSOP (Type I)
12 IS61C1024-12TI TSOP (Type I)
15 IS61C1024-15JI 300-mil Plastic SOJ
15 IS61C1024-15KI 400-mil Plastic SOJ
15 IS61C1024-15HI sTSOP (Type I)
15 IS61C1024-15TI TSOP (Type I)
20 IS61C1024-20JI 300-mil Plastic SOJ
20 IS61C1024-20KI 400-mil Plastic SOJ
20 IS61C1024-20HI sTSOP (Type I)
20 IS61C1024-20TI TSOP (Type I)
25 IS61C1024-25JI 300-mil Plastic SOJ
25 IS61C1024-25KI 400-mil Plastic SOJ
25 IS61C1024-25HI sTSOP (Type I)
25 IS61C1024-25TI TSOP (Type I)
IS61C1024L LOW POWER VERSION
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No. Package
15 IS61C1024L-15J 300-mil Plastic SOJ
IS61C1024L-15K 400-mil Plastic SOJ
IS61C1024L-15H sTSOP (Type I)
IS61C1024L-15T TSOP (Type I)
20 IS61C1024L-20J 300-mil Plastic SOJ
IS61C1024L-20K 400-mil Plastic SOJ
IS61C1024L-20H sTSOP (Type I)
IS61C1024L-20T TSOP (Type I)
25 IS61C1024L-25J 300-mil Plastic SOJ
IS61C1024L-25K 400-mil Plastic SOJ
IS61C1024L-25H sTSOP (Type I)
IS61C1024L-25T TSOP (Type I)
IS61C1024L LOW POWER VERSION
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No. Package
15 IS61C1024L-15JI 300-mil Plastic SOJ
IS61C1024L-15KI 400-mil Plastic SOJ
IS61C1024L-12HI sTSOP (Type I)
IS61C1024L-15TI TSOP (Type I)
20 IS61C1024L-20JI 300-mil Plastic SOJ
IS61C1024L-20KI 400-mil Plastic SOJ
IS61C1024L-12HI sTSOP (Type I)
IS61C1024L-20TI TSOP (Type I)
25 IS61C1024L-25JI 300-mil Plastic SOJ
IS61C1024L-25KI 400-mil Plastic SOJ
IS61C1024L-12HI sTSOP (Type I)
IS61C1024L-25TI TSOP (Type I)
10
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1J
11/03/98
Page 11
IS61C1024
IS61C1024L
®
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR028-1K
05/12/99
®
ISSI
Integrated Silicon Solution, Inc.
2231 Lawson Lane
Santa Clara, CA 95054
Tel: 1-800-379-4774
Fax: (408) 588-0806
E-mail: [email protected]
www.issi.com
11
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