Synchronous Controller in 8-Pin Package
Operating with single 5V or 12V supply voltage
Internal 200KHz Oscillator
(400KHz for IRU3037A)
Soft-Start Function
Fixed Frequency Voltage Mode
500mA Peak Output Drive Capability
Protects the output when control FET is shorted
SOIC 8-Lead also available LEAD-FREE
APPLICATIONS
DDR memory source sink Vtt application
Low cost on-board DC to DC such as 5V to 3.3V,
2.5V or 1.8V
Graphic Card
Hard Disk Drive
TYPICAL APPLICATION
12V
C3
1uF
C4
1uF
DESCRIPTION
The IRU3037 controller IC is designed to provide a low
cost synchronous Buck regulator for on-board DC to DC
converter applications. With the migration of today’s ASIC
products requiring low supply voltages such as 1.8V and
lower, together with currents in excess of 3A, traditional
linear regulators are simply too lossy to be used when
input supply is 5V or even in some cases with 3.3V
input supply. The IRU3037 together with dual N-channel
MOSFETs such as IRF7313, provide a low cost solution
for such applications. This device features an internal
200KHz oscillator (400KHz for "A" version), under-voltage lockout for both Vcc and Vc supplies, an external
programmable soft-start function as well as output under-voltage detection that latches off the device when an
output short is detected.
5V
L1
C2
10TPB100M,
100uF, 55m
1uH
ς
C1
47uF
VccVc
HDrv
SS/SD
Comp
U1
IRU3037
Gnd
LDrv
Fb
R5
1.24K, 1%
C8
0.1uF
C9
2200pF
R4
24k
Figure 1 - Typical application of IRU3037 or IRU3037A.
PACKAGE ORDER INFORMATION
TA (°C) DEVICE PACKAGE FREQUENCY
0 To 70IRU3037CF 8-Pin Plastic TSSOP (F) 200KHz
0 To 70IRU3037CS 8-Pin Plastic SOIC NB (S) 200KHz
0 To 70IRU3037ACF 8-Pin Plastic TSSOP (F) 400KHz
0 To 70IRU3037ACS 8-Pin Plastic SOIC NB (S) 400KHz
Q1
1/2 of IRF7313
D05022P-562, 5.6uH, 5.3A
Q2
1/2 of IRF7313
R3
249, 1%
L2
1.5V/5A
C7
2x 6TPC150M,
150uF, 40m
ς
Rev. 2.9
12/30/04
www.irf.com
1
Page 2
IRU3037/IRU3037A & (PbF)
ABSOLUTE MAXIMUM RATINGS
Vcc Supply Voltage .................................................. 25V
Vc Supply Voltage ...................................................... 30V (not rated for inductive load)
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 125°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device.
PACKAGE INFORMATION
8-PIN PLASTIC TSSOP (F) 8-PIN PLASTIC SOIC (S)
Fb
Vcc
LDrv
Gnd
1
2
3
4
θJA=124°C/W
8
7
6
5
SS/SD
Comp
Vc
HDrv
1
Fb
2
Vcc
3
LDrv
4
GndHDrv
θJA=160°C/W
8
7
6
5
SS/SD
Comp
Vc
(Also available LEAD-FREE)
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc=5V, Vc=12V and TA=0 to 70°C. Typical values refer
to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient
temperature.
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Reference Voltage
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
Transconductance
Oscillator
Frequency
Ramp-Amplitude Voltage
V
Output Drivers
Rise Time
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
PIN DESCRIPTIONS
PIN# PIN SYMBOL PIN DESCRIPTION
1
Fb
This pin is connected directly to the output of the switching regulator via resistor divider to
provide feedback to the Error amplifier.
SS=3V, Fb=1V
IFB1
SS=0V, Fb=1V
IFB2
gm
IRU3037
Freq
IRU3037A
RAMP
CL=1500pF
Tr
C
L=1500pF
Tf
TDB
TON
Fb=1V, Freq=200KHz
Fb=1.5V
TOFF
410
180
345
1.225
50
85
0
-0.1
-64
600
200
400
1.25
50
50
150
90
0
830
220
440
1.275
100
100
250
95
µA
µA
µmho
KHz
V
ns
ns
ns
%
%
2
Vcc
This pin provides biasing for the internal blocks of the IC as well as power for the low side
driver. A minimum of 1µF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
3
4
LDrv
Gnd
Output driver for the synchronous power MOSFET.
This pin serves as the ground pin and must be connected directly to the ground plane. A
high frequency capacitor (0.1 to 1µF) must be connected from V5 and V12 pins to this pin
for noise free operation.
5
HDrv
Output driver for the high side power MOSFET. Connect a diode, such as BAT54 or 1N4148,
from this pin to ground for the application when the inductor current goes negative (Source/
Sink), soft-start at no load and for the fast load transient from full load to no load.
6
Vc
This pin is connected to a voltage that must be at least 4V higher than the bus voltage of
the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A
minimum of 1µF, high frequency capacitor must be connected from this pin to ground to
provide peak drive current capability.
7
Comp
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
8
SS / SD
This pin provides soft-start for the switching regulator. An internal current source charges
an external capacitor that is connected from this pin to ground which ramps up the output
of the switching regulator, preventing it from overshooting as well as limiting the input
current. The converter can be shutdown by pulling this pin below 0.5V.
Rev. 2.9
12/30/04
www.irf.com
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IRU3037/IRU3037A & (PbF)
BLOCK DIAGRAM
3V
20uA
SS/SD
8
POR
1.25V
25K
Fb
Comp 7
25K
1
64uA Max
Error Amp
Vcc
4.0V
Vc
3.5V
0.5V
Ct
0.2V
0.2V
Oscillator
Error Comp
FbLo Comp
POR
Bias
Generator
S
R
Reset Dom
Q
Figure 2 - Simplified block diagram of the IRU3037.
3V
1.25V
POR
6
Vc
5
HDrv
2
Vcc
3
LDrv
Gnd
4
THEORY OF OPERATION
Introduction
The IRU3037 is a fixed frequency, voltage mode synchronous controller and consists of a precision reference voltage, an error amplifier, an internal oscillator, a
PWM comparator, 0.5A peak gate driver, soft-start and
shutdown circuits (see Block Diagram).
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier; this is
the amplified error signal from the sensed output voltage
and the reference voltage.
This voltage is compared to a fixed frequency linear
sawtooth ramp and generates fixed frequency pulses of
variable duty-cycle, which drives the two N-channel external MOSFETs.The timing of the IC is provided through
an internal oscillator circuit which uses on-chip capacitor to set the oscillation frequency to 200 KHz (400 KHz
for “A” version).
Soft-Start
The IRU3037 has a programmable soft-start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start sequence initiates when the Vc and Vcc rise above their
threshold (3.3V and 4.2V respectively) and generates
the Power On Reset (POR) signal. Soft-start function
operates by sourcing an internal current to charge an
external capacitor to about 3V. Initially, the soft-start function clamps the E/A’s output of the PWM converter. As
the charging voltage of the external capacitor ramps up,
the PWM signals increase from zero to the point the
feedback loop takes control.
Short-Circuit Protection
The outputs are protected against the short-circuit. The
IRU3037 protects the circuit for shorted output by sensing the output voltage (through the external resistor divider). The IRU3037 shuts down the PWM signals, when
the output voltage drops below 0.6V (0.4V for IRU3037A).
The IRU3037 also protects the output from over-voltaging
when the control FET is shorted. This is done by turning
on the sync FET with the maximum duty cycle.
Under-Voltage Lockout
The under-voltage lockout circuit assures that the
MOSFET driver outputs remain in the off state whenever
the supply voltage drops below set parameters. Lockout
occurs if Vc or Vcc fall below 3.3V and 4.2V respectively. Normal operation resumes once Vc and Vcc rise
above the set values.
4
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Rev. 2.9
12/30/04
Page 5
APPLICATION INFORMATION
IRU3037/IRU3037A & (PbF)
Design Example:
The following example is a typical application for IRU3037,
the schematic is Figure 18 on page 14.
VIN = 5V
VOUT = 3.3V
IOUT = 4A
∆VOUT = 100mV
fS = 200KHz
Output Voltage Programming
Output voltage is programmed by reference voltage and
external voltage divider. The Fb pin is the inverting input
of the error amplifier, which is internally referenced to
1.25V (0.8V for IRU3037A). The divider is ratioed to provide 1.25V at the Fb pin when the output is at its desired
value. The output voltage is defined by using the following equation:
R6
VOUT = VREF3
When an external resistor divider is connected to the
output as shown in Figure 3.
1 +
( )
IRU3037
Figure 3 - Typical application of the IRU3037 for
programming the output voltage.
Equation (1) can be rewritten as:
VOUT
R6 = R5 3
Choose R5 = 1Kς
This will result to R6 = 1.65Kς
If the high value feedback resistors are used, the input
bias current of the Fb pin could cause a slight increase
in output voltage. The output voltage set point can be
more accurate by using precision resistor.
( )
VREF
---(1)
R5
Fb
- 1
V
OUT
R
6
R
5
Soft-Start Programming
The soft-start timing can be programmed by selecting
the soft start capacitance value. The start up time of the
converter can be calculated by using:
tSTART = 753Css (ms) ---(2)
Where:
CSS is the soft-start capacitor (µF)
For a start-up time of 7.5ms, the soft-start capacitor will
be 0.1µF. Choose a ceramic capacitor at 0.1µF.
Shutdown
The converter can be shutdown by pulling the soft-start
pin below 0.5V. The control MOSFET turns off and the
synchronous MOSFET turns on during shutdown.
Boost Supply Vc
To drive the high-side switch it is necessary to supply a
gate voltage at least 4V greater than the bus voltage.
This is achieved by using a charge pump configuration
as shown in Figure 18. The capacitor is charged up to
approximately twice the bus voltage. A capacitor in the
range of 0.1µF to 1µF is generally adequate for most
applications. In application, when a separate voltage
source is available the boost circuit can be avoided as
shown in Figure 1.
Input Capacitor Selection
The input filter capacitor should be based on how much
ripple the supply can tolerate on the DC input line. The
larger capacitor, the less ripple expected but consider
should be taken for the higher surge current during the
power-up. The IRU3037 provides the soft-start function
which controls and limits the current surge. The value of
the input capacitor can be calculated by the following
formula:
IIN3∆t
CIN = ---(3)
Where:
CIN is the input capacitance (µF)
IIN is the input current (A)
∆t is the turn on time of the high-side switch (µs)
∆V is the allowable peak to peak voltage ripple (V)
∆V
Rev. 2.9
12/30/04
www.irf.com
5
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IRU3037/IRU3037A & (PbF)
Assuming the following:
∆V = 1%(VIN), Efficiency(η) = 90%
1
∆t = D 3
O3 IO
V
IIN =
η 3 VIN
∆t = 3.3µs
fS
IIN = 2.93A
By using equation (3), CIN = 193.3µF
For higher efficiency, low ESR capacitor is recommended.
Choose two 100µF capacitors.
The Sanyo TPB series PosCap capacitor 100µF, 10V
with 55mς ESR is a good choice.
Output Capacitor Selection
The criteria to select the output capacitor is normally
based on the value of the Effective Series Resistance
(ESR). In general, the output capacitor must have low
enough ESR to meet output ripple and load transient
requirements, yet have high enough ESR to satisfy stability requirements. The ESR of the output capacitor is
calculated by the following relationship:
ESR [ ---(4)
∆VO
∆IO
Where:
∆VO = Output Voltage Ripple
∆IO = Output Current
∆VO=100mV and ∆IO=4A
Results to ESR=25mς
The Sanyo TPC series, PosCap capacitor is a good
choice. The 6TPC150M 150µF, 6.3V has an ESR 40mς.
Selecting two of these capacitors in parallel, results to
an ESR of ≅ 20mς which achieves our low ESR goal.
The capacitor value must be high enough to absorb the
inductor's ripple current. The larger the value of capacitor, the lower will be the output ripple voltage.
Inductor Selection
The inductor is selected based on output power, operating frequency and efficiency requirements. Low inductor
value causes large ripple current, resulting in the smaller
size, but poor efficiency and high output noise. Generally, the selection of inductor value can be reduced to
desired maximum ripple current in the inductor (∆i). The
optimum point is usually found between 20% and 50%
ripple of the output current.
For the buck converter, the inductor value for desired
operating ripple current can be determined using the following relation:
IN - VOUT = L3 ; ∆t = D3 ; D =
V
L = (VIN - VOUT)3 ---(5)
∆i
∆t
VOUT
V IN3∆ i3f S
1
fS
VOUT
VIN
Where:
V
IN = Maximum Input Voltage
VOUT = Output Voltage
∆i = Inductor Ripple Current
fS = Switching Frequency
∆t = Turn On Time
D = Duty Cycle
If ∆i = 20%(IO), then the output inductor will be:
L = 7µH
The Toko D124C series provides a range of inductors in
different values, low profile suitable for large currents,
10µH, 4.2A is a good choice for this application. This
will result to a ripple approximately 14% of output current.
Power MOSFET Selection
The IRU3037 uses two N-Channel MOSFETs. The selections criteria to meet power transfer requirements is
based on maximum drain-source voltage (V
DSS), gate-
source drive voltage (VGS), maximum output current, Onresistance RDS(ON) and thermal management.
The MOSFET must have a maximum operating voltage
(VDSS) exceeding the maximum input voltage (VIN).
The gate drive requirement is almost the same for both
MOSFETs. Logic-level transistor can be used and caution should be taken with devices at very low VGS to prevent undesired turn-on of the complementary MOSFET,
which results a shoot-through current.
The total power dissipation for MOSFETs includes conduction and switching losses. For the Buck converter
the average inductor current is equal to the DC load current. The conduction loss is defined as:
The RDS(ON) temperature dependency should be considered for the worst case operation. This is typically given
in the MOSFET data sheet. Ensure that the conduction
losses and switching losses do not exceed the package
ratings or violate the overall thermal budget.
6
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Rev. 2.9
12/30/04
Page 7
IRU3037/IRU3037A & (PbF)
For this design, IRF7301 is a good choice. The device
provides low on-resistance in a compact SOIC 8-Pin
package.
The IRF7301 has the following data:
VDSS = 20V
ID = 5.2A
RDS(ON) = 0.05ς
The total conduction losses will be:
PCON(TOTAL)=PCON(Upper Switch)+PCON(Lower Switch)
PCON(TOTAL) = ILOAD3 RDS(ON)3θ
2
θ = 1.5 according to the IRF7301 data sheet for
1508C junction temperature
PCON(TOTAL) = 1.2W
The switching loss is more difficult to calculate, even
though the switching transition is well understood. The
reason is the effect of the parasitic components and
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. With a
linear approximation, the total switching loss can be expressed as:
VDS(OFF)
PSW = ILOAD ---(6)
2
tr + tf
T
33
Where:
V
DS(OFF) = Drain to Source Voltage at off time
tr = Rise Time
tf = Fall Time
T = Switching Period
ILOAD = Load Current
These values are taken under a certain condition test.
For more detail please refer to the IRF7301 data sheet.
By using equation (6), we can calculate the switching
losses.
SW = 0.186W
P
Feedback Compensation
The IRU3037 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensation circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 458).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 1808 (see Figure 5). The Reso-
nant frequency of the LC filter expressed as follows:
1
FLC = ---(7)
2π3 LO3CO
Figure 5 shows gain and phase of the LC filter. Since we
already have 1808 phase shift just from the output filter,
the system risks being unstable.
Gain
0dB
-40dB/decade
Phase
8
0
The switching time waveform is shown in figure 4.
DS
V
90%
10%
GS
V
d
t
d
t
(ON)
(OFF)
r
t
f
t
Figure 4 - Switching time waveforms.
From IRF7301 data sheet we obtain:
tr = 42ns
tf = 51ns
Rev. 2.9
12/30/04
The IRU3037’s error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback
the transconductance properties of the E/A become evident and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 6.
www.irf.com
LC
F
Frequency
-180
LC
F
8
Figure 5 - Gain and phase of LC filter.
Frequency
7
Page 8
IRU3037/IRU3037A & (PbF)
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general the output capacitor’s ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
The ESR zero of the output capacitor expressed as follows:
FESR = ---(8)
2π3 ESR 3 Co
V
OUT
1
R
6
Fb
Comp
R
E/A
5
V
REF
Gain(dB)
Ve
C
9
R
4
H(s) dB
Frequency
F
Z
Figure 6 - Compensation network without local
feedback and its asymptotic gain plot.
The transfer function (Ve / V
H(s) = gm3 3 ---(9)
()
R6 + R5
R5
OUT) is given by:
1 + sR4C9
sC9
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
|H(s)| = gm3 3 R4 ---(10)
FZ = ---(11)
2 π3 R4 3C 9
R5
R63R5
1
The gain is determined by the voltage divider and E/A's
transconductance gain.
Where:
IN = Maximum Input Voltage
V
VOSC = Oscillator Ramp Voltage
Fo = Crossover Frequency
FESR = Zero Frequency of the Output Capacitor
FLC = Resonant Frequency of the Output Filter
R5 and R6 = Resistor Dividers for Output Voltage
Programming
gm = Error Amplifier Transconductance
To cancel one of the LC filter poles, place the zero before the LC filter resonant frequency pole:
FZ≅ 75%FLC
FZ≅ 0.75 3 ---(13)
1
2π LO3 CO
For:
Lo = 10µH
Co = 300µF
FZ = 2.17KHz
R4 = 86.6Kς
Using equations (11) and (13) to calculate C9, we get:
C9 = 698pF
Choose C9 = 680pF
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
used to supress the switching noise. The additional pole
is given by:
1
FP =
2π3 R43
C93 CPOLE
C9 + CPOLE
First select the desired zero-crossover frequency (Fo):
Fo > FESR and FO[ (1/5 ~ 1/10)3 fS
Use the following equation to calculate R4:
VOSC
R4 = ---(12)
VIN
Fo3FESR
2
FLC
333
R5 + R6
R5
8
1
gm
www.irf.com
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
CPOLE =
for FP <<
1
π3R43fS -
fS
2
1
C9
≅
π3R 4 3f S
1
Rev. 2.9
12/30/04
Page 9
IRU3037/IRU3037A & (PbF)
For a general solution for unconditionally stability for any
type of output capacitors, in a wide range of ESR values
we should implement local feedback with a compensation network. The typically used compensation network
for voltage-mode controller is shown in Figure 7.
V
Z
IN
Gain(dB)
OUT
C
10
R
8
R
6
Fb
R
5
V
REF
R
7
E/A
C
12
C
11
Z
f
Ve
Comp
H(s) dB
F
F
1
Z
2
Z
F
2
P
Frequency
F
3
P
Figure 7 - Compensation network with local
feedback and its asymptotic gain plot.
In such configuration, the transfer function is given by:
Ve
VOUT
1 - gmZf
=
1 + gmZIN
The error amplifier gain is independent of the transconductance under the following condition:
gmZf >> 1 and gmZIN >>1 ---(14)
By replacing Z
former function can be expressed as:
H(s)= 3
sR6(C12+C11)
As known, transconductance amplifier has high impedance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the amplifier will not be able to swing its output voltage over the
necessary range.
The compensation network has three poles and two zeros and they are expressed as follows:
IN and Zf according to Figure 7, the trans-
1
(1+sR7C11)3[1+sC10(R6+R8)]
C123C11
1+sR7
[()]
3(1+sR8C10)
C12+C11
FP1 = 0
FP2 =
FP3 = ≅
FZ1 =
FZ2 = ≅
1
8 3C 10
2π3R
1
123C11
2 π3R 7 3
C
()
C12+C11
1
2π3R
7 3C 11
1
2π3C103(R6 + R8)
1
2 π3 R7 3C 12
1
2 π3C 103R6
Cross Over Frequency:
FO = R73C103 3 ---(15)
VIN
VOSC
1
2 π3 Lo3Co
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Lo = Output Inductor
Co = Total Output Capacitors
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (14) regarding transconductance error amplifier.
1) Select the crossover frequency:
Fo < F
2) Select R7, so that R7 >>
ESR and Fo [ (1/10 ~ 1/6)3 fS
2
gm
3) Place first zero before LC’s resonant frequency pole.
FZ1 ≅ 75% FLC
C11 =
1
2π 3 FZ13 R7
4) Place third pole at the half of the switching frequency.
fS
FP3 =
2
C12 =
2π 3 R7 3 FP3
1
C12 > 50pF
If not, change R7 selection.
5) Place R7 in (15) and calculate C10:
2π 3 Lo 3 Fo 3 Co
C10[ 3
R7
VOSC
VIN
Rev. 2.9
12/30/04
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IRU3037/IRU3037A & (PbF)
6) Place second pole at the ESR zero.
FP2 = FESR
R8 =
2π 3 C103 FP2
1
1
Check if R8 >
gm
If R8 is too small, increase R7 and start from step 2.
7) Place second zero around the resonant frequency.
FZ2 = FLC
R6 = - R8
2π 3 C103 FZ2
1
8) Use equation (1) to calculate R5.
R5 = 3 R6
VREF
VOUT - VREF
These design rules will give a crossover frequency approximately one-tenth of the switching frequency. The
higher the band width, the potentially faster the load transient speed. The gain margin will be large enough to
provide high DC-regulation accuracy (typically -5dB to -
12dB). The phase margin should be greater than 458 for
overall stability.
IC Quiescent Power Dissipation
Power dissipation for IC controller is a function of applied voltage, gate driver loads and switching frequency.
The IC's maximum power dissipation occurs when the
IC operating with single 12V supply voltage (Vcc=12V
and Vc≅24V) at 400KHz switching frequency and maxi-
mum gate loads.
Figures 9 and 10 show voltage vs. current, when the
gate drivers loaded with 470pF, 1150pF and 1540pF capacitors. The IC's power dissipation results to an excessive temperature rise. This should be considered when
using IRU3037A for such application.
Layout Consideration
The layout is very important when designing high frequency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
Start to place the power components, make all the connection in the top layer with wide, copper filled areas.
The inductor, output capacitor and the MOSFET should
be close to each other as possible. This helps to reduce
the EMI radiated by the power traces due to the high
switching currents through them. Place input capacitor
directly to the drain of the high-side MOSFET, to reduce
the ESR replace the single input capacitor with two parallel units. The feedback part of the system should be
kept away from the inductor and other noise sources,
and be placed close to the IC. In multilayer PCB use
one layer as power ground plane and have a control circuit ground (analog ground), to which all signals are referenced. The goal is to localize the high current path to
a separate loop that does not interfere with the more
sensitive analog control function. These two grounds
must be connected together on the PC board layout at a
single point.
Figure 8 shows a suggested layout for the critical components, based on the schematic on page 14.
PGndPGnd
C1
Vin
L1
D
D
D
2
3
1
Analog Gnd
C
5
C2A, BC7A, B
1
2
U1
6
C4
IRU3037
PGnd
7
C9
R4
8
C8
Q1
PGnd
5678
4
3
45
3
2
C3
R5
R6
1
Single Point
Analog Gnd
Connect to
Power Ground plane
Analog Gnd
Vou t
L2
Figure 8 - Suggested layout.
(Topside shown only)
10
www.irf.com
Rev. 2.9
12/30/04
Page 11
IRU3037/IRU3037A & (PbF)
TYPICAL PERFORMANCE CHARACTERISTICS
IR U 3037A
V cc vs. Icc
@ 470PF, 1150PF and 1540P F G ate Load
14
12
10
8
6
Icc ( m A)
4
2
0
02468101214
Vcc ( V)
Figure 9 - Vcc vs. Icc
CLOAD=1540pF
CLOAD=470pF
TA = 258C
LOAD=1150pF
C
IRU3037A
TA = 258C
Vc vs. Ic
@470PF, 1150PF and 1540PF Gate Load
30
25
20
15
Ic (ma)
10
5
0
0 2 4 6 8 101214161820222426
Vc (V)
Figure 10 - Vc vs. Ic
CLOAD=1540pF
CLOAD=1150pF
CLOAD=470pF
Rev. 2.9
12/30/04
www.irf.com
11
Page 12
IRU3037/IRU3037A & (PbF)
e
TYPICAL PERFORMANCE CHARACTERISTICS
IRU3037
Output V oltage
1.3
1.28
Max
1.26
Volts
1.24
Min
1.22
1.2
-40°C0°C+50°C+100°C+15 0°C
Ou tput VoltageSpec Max.Spec Min.
Figure 11 - Output VoltageFigure 12 - Output Frequency
IRU3037
Output Frequency
240
230
220
210
200
Kilo Hertz
190
180
170
160
-40°C0°C+50°C+100°C+150°C
Os cillation Frequenc ySpec Max.Spec Min.
Max
Min
I RU3 0 3 7
Maximum Duty Cycle
92.0%
90.0%
88.0%
86.0%
Percent Duty Cycl
84.0%
82.0%
80.0%
-40 °C - 25° C0°C+25° C +50°C +75°C +100°C +125°C +15 0°C
Max Du ty Cy c le
Figure 13 - Maximum Duty Cycle
12
www.irf.com
Rev. 2.9
12/30/04
Page 13
IRU3037/IRU3037A & (PbF)
TYPICAL PERFORMANCE CHARACTERISTICS
IRU3037A
Output V oltage
820
Max
810
800
790
milli Volts
780
770
760
-40°C -25°C0°C+25°C +50°C +75°C +100°C +150°C
Output VoltageSpec Max.Spec Min.
Min
IRU3037A
Output Frequency
460
440
420
400
380
Kilo Hertz
360
340
320
300
-40°C -25°C0°C + 25°C +50°C +75°C + 100°C + 150°C
Os cillation FrequencySpec Max.S pec Min.
Max
Min
Figure 15 - Output FrequencyFigure 14 - Output Voltage
IRU3037 / IRU3037A
Trans conductance ( GM )
1000
900
800
700
600
500
micro Mho's
400
300
200
100
0
-40°C-25°C0°C+25°C+50°C+75°C+100°C
Positive load GMNegative load GM
Figure 16 - Transconductance
I RU303 7 / I RU303 7A
Rise Time / Fall Time
CL = 1500pF
50
45
40
35
30
25
nano Seconds
20
15
10
5
0
-40°C-25°C0°C+25°C+50°C+75°C+100 °C
Ri se TimeFall time
Figure 17 - Rise Time and Fall Time
Rev. 2.9
12/30/04
www.irf.com
13
Page 14
IRU3037/IRU3037A & (PbF)
TYPICAL APPLICATION
Single Supply 5V Input
D1
1N4148
D3
C8
0.1uF
C9
680pF
105K
R4
C3
1uF
1N4148
VccVc
SS/SD
IRU3037
Comp
HDrv
U1
LDrv
Gnd
C4
1uF
Fb
D2
1N4148
C5
0.1uF
R5
1K, 1%
Q1
1/2 of IRF7301
D05022P-103, 10uH, 4.3A
Q2
1/2 of IRF7301
R6
1.65K, 1%
C2
2x 10TPB100ML,
100uF, 55m
ς
L2
L1
1uH
5V
C1
47uF
Tantalum
3.3V
@ 4A
C7
2x 6TPC150M,
150uF, 40m
ς
Figure 18 - Typical application of IRU3037 in an on-board DC-DC converter
using a single 5V supply.
14
www.irf.com
Rev. 2.9
12/30/04
Page 15
TYPICAL APPLICATION
Dual Supply, 5V Bus and 12V Bias Input
5V
12V
C7
0.1uF
C8
2200pF
14K
R2
C4
1uF
Vcc
SS/SD
IRU3037
Comp
Vc
U1
Gnd
C1
1uF
HDrv
LDrv
Fb
R3
1K
1%
IRU3037/IRU3037A & (PbF)
C2
10TPB100M, 100uF,
55m
Q1
1/2 of IRF7752
CTX5-2P, 3.5uH @ 2.5A
Q2
1/2 of IRF7752
R1
1K, 1%
L1
1uH
, 1.5A rms
ς
L2
L2
CTX5-2P, 3.5uH @ 2.5A
CTX10-5P, 5.7uH @ 2.5A
C1
47uF
IRU1206-18
C6
6TPB150M, 150uF, 55m
C6
6TPB150M, 150uF, 55mς (Qty 2)
6TPB150M, 150uF, 55m
1.8V/1A
C3
47uF
2.5V/2A
ς
(Qty 1)
ς
C9
10TPB100M, 100uF,
, 1.5A rms
55m
ς
C13
0.1uF
C14
2200pF
14K
R5
C10
1uF
Vcc
SS/SD
IRU3037
Comp
Vc
U2
Gnd
HDrv
LDrv
C11
1uF
Q3
1/2 of IRF7752
Q4
1/2 of IRF7752
Fb
R6
1K, 1%
R4
1.65K, 1%
L3
CTX5-1P, 3.4uH @ 2A
C12
6TPB150M, 150uF, 55m
3.3V/1.8A
ς
Figure 19 - Typical application of IRU3037 or IRU3037A in an on-board DC-DC converter providing the Core,
GTL+, and Clock supplies for the Pentium II microprocessor.
Rev. 2.9
12/30/04
www.irf.com
15
Page 16
IRU3037/IRU3037A & (PbF)
TYPICAL APPLICATION
1.8V to 7.5V / 0.5A Boost Converter
Vpwr (1.5V Min)
Vc/Vcc
R2
10K
R3
20K
R1
20K
Q1
2N2222
Q2
2N2222
C10
100pF
C4
0.01uF
R4
25K
C5
1uF
C5
0.1uF
SS/SD
Fb
R5R6
1K, 1%
Comp
U1
IRU3037
Vcc
LDrv
C8
1uF
5K, 1%
Vc
L1
1uH (CoilTronics UP2B-1R0)
C1
2x 68uF
Q3
IRF7402
HDrv
Gnd
D1
1N5817
V
OUT
(7.5V / 0.5A)
C9
2x 47uF
Gnd
Figure 20 - Typical application of IRU3037 as a boost converter.
8-Lead SOIC IRU3037CS order IRU3037CS
8-Lead SOIC IRU3037ACS order IRU3037ACS
8-Lead TSSOP IRU3037CF order IRU3037CF
8-Lead TSSOP IRU3037ACF order IRU3037ACF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, CA 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903
Data and specifications subject to change without notice. 1/6/2004
Leadfree Part
8-Lead SOIC IRU3037CS order IRU3037CSPbF
8-Lead SOIC IRU3037ACS order IRU3037ACSPbF
8-Lead TSSOP IRU3037CF not available
8-Lead TSSOP IRU3037ACF not available
Visit us at www.irf.com for sales contact information
Rev. 2.9
12/30/04
www.irf.com
21
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