Page 1
Data Sheet No. PD94122
IRU1015
1.5A LOW DROPOUT POSITIVE
ADJUSTABLE REGULATOR
FEATURES
Guaranteed < 1.3V Dropout at Full Load Current
Fast Transient Response
1% Voltage Reference Initial Accuracy
Output Current Limiting
Built-In Thermal Shutdown
APPLICATIONS
486DX4 Supply Voltage
P55 I/O Supply Voltage
VGA & Sound Card Applications
Low Voltage High Speed Termination Applications
Standard 3.3V Chip Set and Logic Applications
TYPICAL APPLICATION
5V
C1
1500uF
Vin
3
DESCRIPTION
The IRU1015 is a low dropout three-terminal adjustable
regulator with minimum of 1.5A output current capability. This product is specifically designed to provide well
regulated supply for low voltage IC applications such as
486DX4 processor, P55C I/O supply as well as high
speed bus termination and low current 3.3V logic supply. The IRU1015 is also well suited for other applications such as VGA and sound card. The IRU1015 is
guaranteed to have <1.3V dropout at full load current
making it ideal to provide well regulated outputs of 2.5V
to 3.3V with 4.75V to 7V input supply.
1015app1-1.1
Figure 1 - Typical application of IRU1015 in a 5V to 3.3V regulator
Note: P55C is trademark of Intel Corp.
IRU1015
Vout
Adj
2
R1
121
1
R2
200
3.3V / 1.5A
C2
1500uF
PACKAGE ORDER INFORMATION
Tj (°C) 3-PIN PLASTIC 3-PIN PLASTIC 2-PIN PLASTIC
TO-220 (T) TO-263 (M) TO-252 (D-Pak)
0 To 150 IRU1015CT IRU1015CM IRU1015CD
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IRU1015
ABSOLUTE MAXIMUM RATINGS
Input Voltage (Vin) .................................................... 7V
Power Dissipation ..................................................... Internally Limited
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 150°C
PACKAGE INFORMATION
3-PIN PLASTIC TO-220 (T) 3-PIN PLASTIC TO-263 (M) 2-PIN PLASTIC TO-252 (D-Pak)
Tab is
Vout
FRONT VIEW
FRONT VIEW
3
2
1
Vin
Vout
Adj
Tab is
Vout
3
Vin
Vout
1
Adj
Tab is
Vout
FRONT VIEW
3
Vin
1
Adj
θJT=2.7°C/W θJA=60°C/W θJA=35°C/W for 1" Square pad θJA=70°C/W for 0.5" Square pad
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Cin=1µF, Cout=10µF, and Tj=0 to 150!C.
Typical values refer to Tj=25!C.
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Reference Voltage Vref Io=10mA, Tj=25!C, (Vin-Vo)=1.5V 1.238 1.250 1.262 V
Io=10mA, (Vin-Vo)=1.5V 1.225 1.250 1.275
Line Regulation Io=10mA, 1.3V<(Vin-Vo)<7V 0.2 %
Load Regulation (Note 1) Vin=3.3V, Vadj=0, 10mA<Io<1.5A 0.4 %
Dropout Voltage (Note 2) ∆Vo Note 2, Io=1.5A 1.1 1.3 V
Current Limit Vin=3.3V, dVo=100mV 1.6 A
Minimum Load Current Vin=3.3V, Vadj=0V 5 10 mA
(Note 3)
Thermal Regulation 30ms Pulse, Vin-Vo=3V, Io=1.5A 0.01 0.02 %/W
Ripple Rejection f=120Hz, Co=25µF Tantalum,
Io=0.75A, Vin-Vo=3V 60 70 dB
Adjust Pin Current Iadj Io=10mA, Vin-Vo=1.5V, Tj=25!C,
Io=10mA, Vin-Vo=1.5V 55 120 µA
Adjust Pin Current Change Io=10mA, Vin-Vo=1.5V, Tj=25!C 0.2 5 µA
Temperature Stability Vin=3.3V, Vadj=0V, Io=10mA 0.5 %
Long Term Stability Tj=125!C, 1000Hrs 0.3 1 %
RMS Output Noise Tj=25!C, 10Hz<f<10KHz 0.003 %Vo
Note 1: Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data.
Note 2: Dropout voltage is defined as the minimum differential voltage between Vin and Vout required to maintain regulation at Vout. It is measured when the output
voltage drops 1% below its nominal value.
2
Note 3: Minimum load current is defined as the mini-
mum current required at the output in order for the output voltage to maintain regulation. Typically the resistor
dividers are selected such that it automatically main-
tains this current.
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PIN DESCRIPTIONS
PIN # PIN SYMBOL PIN DESCRIPTION
1
Adj
A resistor divider from this pin to the Vout pin and ground sets the output voltage.
IRU1015
2
3
Vout
Vin
The output of the regulator. A minimum of 10µF capacitor must be connected from this pin
to ground to insure stability.
The input pin of the regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum drop out
voltage during the load transient response. This pin must always be 1.3V higher than Vout
in order for the device to regulate properly.
BLOCK DIAGRAM
Vin 3
CURRENT
LIMIT
2 Vout
+
1.25V
+
THERMAL
SHUTDOWN
Figure 2 - Simplified block diagram of the IRU1015
APPLICATION INFORMATION
Introduction
The IRU1015 adjustable Low Dropout (LDO) regulator is
a three-terminal device which can easily be programmed
with the addition of two external resistors to any voltages within the range of 1.25 to 5.5 V.This regulator unlike the first generation of the three-terminal regulators
such as LM117 that required 3V differential between the
input and the regulated output, only needs 1.3V differential to maintain output regulation. This is a key requirement for today’s microprocessors that need typically
3.3V supply and are often generated from the 5V supply. Another major requirement of these microproces-
1015blk1-1.0
sors is the need to switch the load current from zero to
full load in tens of nanoseconds at their pins, which
translates to an approximately 300 to 500ns current step
at the regulator. In addition, the output voltage tolerances are sometimes tight and they include the transient response as part of the specification.
The IRU1015 is specifically designed to meet the fast
current transient needs as well as provide an accurate
initial voltage, reducing the overall system cost with the
need for fewer output capacitors.
1 Adj
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IRU1015
Output Voltage Setting
The IRU1015 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
R2
V
OUT = VREF ×
oo
o1 +
oo
Where:
REF = 1.25V Typically
V
IADJ = 50µA Typically
R1 and R2 as shown in figure 3:
Vin
IRU1015
pp
p + IADJ × R2
pp
R1
Vou tVin
Vou t
regulator and not to the load. In fact, if R1 is connected
to the load side, the effective resistance between the
regulator and the load is gained up by the factor of (1+R2/
R1), or the effective resistance will be, Rp(eff)=Rp*(1+R2/
R1). It is important to note that for high current applications, this can represent a significant percentage of the
overall load regulation and one must keep the path from
the regulator to the load as short as possible to minimize this effect.
PARASITIC LINE
RESISTANCE
Rp
Vin
Vou tVin
IRU1015
Adj
IAdj = 50uA
Vre f
R1
R2
1015app2-1. 0
Figure 3 - Typical application of the IRU1015
for programming the output voltage.
The IRU1015 keeps a constant 1.25V between the output pin and the adjust pin. By placing a resistor R1 across
these two pins a constant current flows through R1, adding to the Iadj current and into the R2 resistor producing
a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will
be added to the 1.25V to set the output voltage. This is
summarized in the above equation. Since the minimum
load current requirement of the IRU1015 is 10mA, R1 is
typically selected to be 121Ω resistor so that it automatically satisfies the minimum current requirement.
Notice that since Iadj is typically in the range of 50µA it
only adds a small error to the output voltage and should
only be considered when a very precise output voltage
setting is required. For example, in a typical 3.3V application where R1=121Ω and R2=200Ω the error due to
Iadj is only 0.3% of the nominal set point.
Load Regulation
Since the IRU1015 is only a three-terminal device, it is
not possible to provide true remote sensing of the output
voltage at the load. Figure 4 shows that the best load
regulation is achieved when the bottom side of R2 is
connected to the load and the top side of R1 resistor is
connected directly to the case or the Vout pin of the
Adj
R1
R2
1015app3-1.0
R
L
Figure 4 - Schematic showing connection
for best load regulation
Stability
The IRU1015 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for microprocessor applications use standard electrolytic capacitors with a
typical ESR in the range of 50 to 100mΩ and an output
capacitance of 500 to 1000µF. Fortunately as the capacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1015 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100µF aluminum electrolytic capacitor such as Sanyo MVGX series, Panasonic FA series as well as the Nichicon PL
series insures both stability and good transient response.
Thermal Design
The IRU1015 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction temperatures in the range of 150!C, it is recommended that the
selected heat sink be chosen such that during maximum continuous load operation the junction temperature is kept below this number. The example below
4
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06/29/01
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IRU1015
shows the steps in selecting the proper regulator heat
sink for an AMD 486DX4-120 MHz processor.
Assuming the following specifications:
VIN = 5V
OUT = 3.45V
V
I
OUT(MAX) = 1.2A
TA = 35!C
The steps for selecting a proper heat sink to keep the
junction temperature below 135°C is given as:
1) Calculate the maximum power dissipation using:
D = IOUT × (VIN - VOUT)
P
P
D = 1.2 × (5 - 3.45) = 1.86W
2) Select a package from the regulator data sheet and
record its junction to case (or Tab) thermal resistance.
Selecting TO-220 package gives us:
θJC = 2.7!C/W
3) Assuming that the heat sink is black anodized, calculate the maximum Heat sink temperature allowed:
Assume, θcs=0.05°C/W (heat-sink-to-case thermal
resistance for black anodized)
TS = TJ - PD × (θJC + θCS)
TS = 135 - 1.86 × (2.7 + 0.05) = 129!C
4) With the maximum heat sink temperature calculated
in the previous step, the heat-sink-to-air thermal re-
sistance (θ
SA) is calculated by first calculating the
temperature rise above the ambient as follows:
∆T = TS - TA = 129 - 35 = 94!C
∆T = Temperature Rise Above Ambient
94
∆T
θSA = = = 50!C/W
PD
1.86
Air Flow (LFM)
0 100
Thermalloy 6041PB No HS Required
AAVID 574602 No HS Required
Note: For further information regarding the above companies and their latest product offerings and application
support contact your local representative or the numbers listed below:
AAVID...............PH# (603) 528 3400
Thermalloy.........PH# (214) 243-4321
Designing for Microprocessor Applications
As it was mentioned before the IRU1015 is designed
specifically to provide power for the new generation of
the low voltage processors requiring voltages in the range
of 2.5V to 3.6V generated by stepping down the 5V
supply. These processors demand a fast regulator that
supports their large load current changes. The worst case
current step seen by the regulator is anywhere in the
range of 1 to 7A with the slew rate of 300 to 500ns which
could happen when the processor transitions from “Stop
Clock” mode to the “Full Active” mode. The load current
step at the processor is actually much faster, in the order of 15 to 20ns, however, the de-coupling capacitors
placed in the cavity of the processor socket handle this
transition until the regulator responds to the load current
levels. Because of this requirement the selection of high
frequency low ESR and low ESL output capacitor is
imperative in the design of these regulator circuits.
Figure 5 shows the effects of a fast transient on the
output voltage of the regulator. As shown in this figure,
the ESR of the output capacitor produces an instanta-
neous drop equal to the (∆VESR=ESR*∆I) and the ESL
effect will be equal to the rate of change of the output
current times the inductance of the capacitor (∆VESL
=L*∆I/∆t). The output capacitance effect is a droop in
the output voltage proportional to the time it takes for
the regulator to respond to the change in the current,
(∆VC = ∆t * ∆I / C ) where ∆t is the response time of the
regulator.
5) Next, a heat sink with lower θsa than the one calcu-
lated in step 4 must be selected. One way to do this
is to simply look at the graphs of the "Heat Sink Temp
Rise Above the Ambient" vs. the "Power Dissipation"
and select a heat sink that results in lower temperature rise than the one calculated in the previous step.
The following heat sinks from AAVID and Thermalloy
meet this criteria.
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IRU1015
V
ESR
V
ESL
LOAD
CURRENT
T
1015plt1-1.0
LOAD CURRENT RISE TIME
V
C
Figure 5 - Typical regulator response to the
fast load current step
An example of a regulator design to meet the AMD specification for 486DX4-120MHz is given below.
Assume the specification for the processor as shown in
Table 1:
Type of Vout Imax Max Allowed
Processor Nominal Output Tolerance
AMD 486DX4 3.45 V 1.2 A ±150 mV
Table 1 - GTL+ specification for Pentium Pro
The first step is to select the voltage step allowed in the
output due to the output capacitor’s ESR:
1) Assuming the regulator’s initial accuracy plus the re-
sistor divider tolerance is ≈ ±86mV (±2.5% of 3.45V
nominal), then the total step allowed for the ESR and
the ESL, is -64mV.
2) With the output capacitance being 1500µF:
∆Vc = = = 1.6mV
∆t × ∆I 2 × 1.2
C 1500
Where:
∆t = 2µs is the regulator response time
To set the output voltage, we need to select R1 and R2:
3) Assuming R1 = 121Ω, 1%
R2 =
VOUT
oo
o - 1
oo
VREF
pp
p× 121 =
pp
3.45
oo
o - 1
oo
1.25
pp
p× 121 = 213Ω
pp
Select R2 = 215Ω, 1%
Selecting both R1 and R2 resistors to be 1% tolerance results in the least amount of error introduced
by the resistor dividers leaving a ≈ ±2.5% error bud-
get for the IRU1015 reference which is well within the
initial accuracy of the device.
Finally, the input capacitor is selected as follows:
4) Assuming that the input voltage can drop 150mV before the main power supply responds, and that the
main power supply response time is ≈ 50ms, then
the minimum input capacitance for a 1.2A load step
is given by:
1.2 × 50
CIN = = 400µF
0.15
Assuming that the ESL drop is -10mV, the remaining
ESR step will be -54mV. Therefore the output capacitor ESR must be:
ESR ≤
54
1.2
= 45mΩ
The Sanyo MVGX series is a good choice to achieve
both price and performance goals. The 6MV1500GX,
1500µF, 6.3V has an ESR of less than 36mΩ typical. Selecting a single capacitor achieves our design
goal.
The next step is to calculate the drop due to the capacitance discharge and make sure that this drop in
voltage is less than the selected ESL drop in the
previous step.
6
The ESR should be less than:
ESR =
(VIN - VOUT - ∆V - VDROP)
∆I
Where:
V
DROP L Input voltage drop allowed in step 4
∆V L Maximum regulator dropout voltage
∆I L Load current step
ESR = = 0.167Ω
(5 - 3.45 - 1.2 - 0.15)
1.2
Select a single 1500µF the same type as the output
capacitors exceeds our requirements.Figure 6 shows
the completed schematic for our example.
Rev. 1.1
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Page 7
5V
C1
1500uF
IRU1015
Adj
Vou tVin
R1
121
1%
R2
215
1%
3.45V
C2
1500uF
1015app4-1 .1
Figure 6 - Final schematic for the regulator design
IRU1015
Layout Consideration
The output capacitors must be located as close to the
Vout terminal of the device as possible. It is recommended to use a section of a layer of the PC board as a
plane to connect the Vout pin to the output capacitors to
prevent any high frequency oscillation that may result
from excessive trace inductance.
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06/29/01
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IRU1015
Notes
8
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 02/01
Rev. 1.1
06/29/01
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