Tolerant to negative transient voltage, dV/dt immune
•
Gate drive supply range from 10 V to 20 V
•
Undervoltage lockout for both channels
•
3.3 V and 5 V input logic compatible
•
Matched propagation delay for both channels
•
Logic and power ground +/- 5 V offset
•
Lower di/dt gate driver for better noise immunity
•
Output source/sink current capability 1.4 A/1.8 A
•
RoHS compliant
•
Description
The IRS2184/IRS21844 are high voltage, high speed power MOSFET and
IGBT drivers with dependent high-side
and low-side referenced output channels. Proprietary HVIC and latch
immune CMOS technologies enable
ruggedized monolithic construction.
The logic input is compatible with standard CMOS or LSTTL output, down to 3.3
V logic. The output drivers feature a
high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V.
Feature Comparison
Part
2181COM
21814
2183Internal 400COM
21834
2184Internal 400COM
21844
Packages
8-Lead PDIP
IRS2184
8-Lead SOIC
IRS2184S
Input
logic
HIN/LINnonone
HIN/LINyes
IN/SDyes
Crossconduction
prevention
logic
Deadtime
(ns)
Program 400-5000VSS/COM
Program 400-5000VSS/COM
14-Lead PDIP
IRS21844
Ground Pins
VSS/COM
14-Lead SOIC
IRS21844S
ton/t
off
(ns)
180/220
180/220
680/270
Typical Connection
V
CC
V
IN
SD
(Refer to Lead Assignments for correct
configuration).These diagrams show
electrical connections only. Please refer
to our Application Notes and DesignTips
for proper circuit board layout.
IN
SD
V
CC
HO
B
V
S
LOCOM
IRS2184
V
CC
IN
SD
V
SS
up to 600 V
R
DT
TO
LOAD
up to 600 V
HO
V
V
CC
B
V
IN
SD
DT
V
S
COM
SS
LO
IRS21844
TO
LOAD
www.irf.com1
Page 2
IRS2184/IRS21844(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
SymbolDefinitionMin.Max.Units
V
B
V
S
V
HO
V
CC
V
LO
DT Programmable deadtime pin voltage (IRS21844 only) VSS - 0.3 V
V
IN
V
SS
dVS/dt Allowable offset supply voltage transient — 50 V/ns
P
D
RthJ
T
J
T
S
T
L
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential.
SymbolDefinitionMin.Max.Units
VB High-side floating supply absolute voltage VS + 10VS + 20
V
S
V
HO
V
CC
V
LO
V
IN
DT Programmable deadtime pin voltage (IRS21844 only) V
V
SS
T
A
Note 2: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
High-side floating absolute voltage -0.3 620 (Note 1)
High-side floating supply offset voltage VB - 20 VB + 0.3
High-side floating output voltage VS - 0.3 VB + 0.3
Low-side and logic fixed supply voltage -0.3 20 (Note 1)
Low-side output voltage -0.3 VCC + 0.3
Logic input voltage (IN & SD) VSS - 0.3 V
Logic ground (IRS21844 only)V
- 20V
CC
(8-lead PDIP)—1.0
Package power dissipation @ TA ≤ +25 °C
(14-lead PDIP)—1.6
(8-lead SOIC)—0.625
(14-lead SOIC)—1.0
(8-lead PDIP)—125
Thermal resistance, junction to ambient
A
(8-lead SOIC)—200
(14-lead PDIP)—75
(14-lead SOIC)—120
Junction temperature—150
Storage temperature-50150
Lead temperature (soldering, 10 seconds)—300
High-side floating supply offset voltage Note 2 600
High-side floating output voltage V
S VB
Low-side and logic fixed supply voltage 10 20
Low-side output voltage 0 V
Logic input voltage (IN & SD)V
SymbolDefinition Min. Typ.Max. Units Test Conditions
t
on
t
off
t
sdShut-down propagation delay
MTonDelay matching, HS & LS turn-on—090
MToffDelay matching, HS & LS turn-off—04 0
t
t
DT
MDTDeadtime matching = DT
Static Electrical Characteristics
V
BIAS
parameters are referenced to V
Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
SymbolDefinitionMin. T yp. Max. Units T est Conditions
V
V
V
SD,TH+SD input positive going threshold2.5
V
SD,TH-SD input negative going threshold
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Turn-on propagation delay—680900VS = 0 V
Turn-off propagation delay—270400VS = 0 V or 600 V
—180270
ns
Turn-on rise time—4060
r
Turn-off fall time—2035
f
Deadtime: LO turn-off to HO turn-on(DT
HO turn-off to LO turn-on (DT
- DT
LO - HO
HO-LO
LO-HO) &
280400520RDT= 0 Ω
HO-LO)
456µsRDT = 200 kΩ
—050 RDT=0 Ω
ns
—0600 RDT = 200 kΩ
(VCC, VBS) = 15 V, VSS = COM, DT= VSS and TA = 25 °C unless otherwise specified. The VIL, V
/COM and are applicable to the respective input leads: IN and SD. The VO, IO, and
SS
Logic “1” input voltage for HO & logic “0” for LO2.5——
IH
Logic “0” input voltage for HO & logic “1” for LO——0.8
IL
——
V
µA
High level output voltage, V
Low level output voltage, V
BIAS
O
- V
O
——
— — 1.4 IO = 0 A
——0.2IO = 20 mA
0.8
Offset supply leakage current——50VB = VS = 600 V
Quiescent VBS supply current2060150
Quiescent VCC supply current0.41.01.6mA
Logic “1” input bias current — 25 60 IN = 5 V, SD = 0 V
Logic “0” input bias current — — 5.0 IN = 0 V, SD = 5 V
VCC and VBS supply undervoltage positive going
threshold
VCC and V
supply undervoltage negative going
BS
threshold
8.08.99.8
7.48.29.0
µA
V
Hysteresis0.30.7—
Output high short circuit pulsed current1.41.9—
A
Output low short circuit pulsed current1.82 .3—
VS = 0 V
and I
IH,
IN
VCC = 10 V to 20 V
V
= 0 V or 5 V
IN
VO = 0 V,
PW ≤ 10 µs
VO = 15 V,
PW ≤ 10 µs
www.irf.com3
Page 4
Functional Block Diagrams
2184
IN
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
IRS2184/IRS21844(S)PbF
VB
UV
HV
LEVEL
SHIFTER
PULSE
FILTER
DETECT
R
Q
R
S
HO
VS
SD
DT
VCC
LO
COM
+5V
DEADTIME
VSS/COM
LEVEL
SHIFT
DELAY
UV
DETECT
VB
UV
PULSE
FILTER
DETECT
DETECT
R
Q
R
S
HO
VS
VCC
UV
LO
21844
HV
LEVEL
IN
DEADTIME
+5V
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
SHIFTER
SD
LEVEL
SHIFT
DELAY
COM
VSS/COM
VSS
www.irf.com4
Page 5
IRS2184/IRS21844(S)PbF
Lead Definitions
Symbol Description
IN
SD
DT Programmable deadtime lead, referenced to VSS. (IRS21844 only)
VSS Logic ground (IRS21844 only)
V
B
HO High-side gate drive output
V
S
V
CC
LO Low-side gate drive output
COM Low-side return
Lead Assignments
Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO
(referenced to COM for IRS2184 and VSS for IRS21844)
Logic input for shutdown (referenced to
COM for IRS2184 and VSS for IRS21844)
High-side floating supply
High-side floating supply return
Low-side and logic fixed supply
1
IN
2
SD
3
COM
4
LO
V
8
B
HO
7
V
6
S
V
5
CC
1
IN
2
SD
3
COM
4
LO
8-Lead PDIP8-Lead SOIC
IRS2184PbFIRS2184SPbF
V
HO
V
14
13
B
12
11
S
10
9
8
1
IN
2
SD
3
VSS
4
DT
5
COM
6
LO
7
V
CC
1
IN
2
SD
3
VSS
4
DT
5
COM
6
LO
7
V
CC
14-Lead PDIP14-Lead SOIC
IRS21844PbFIRS21844SPbF
V
V
HO
V
V
HO
V
CC
B
S
8
B
7
6
S
5
14
13
12
11
10
9
8
www.irf.com5
Page 6
IRS2184/IRS21844(S)PbF
IN
SD
IN(LO)
50%
50%
IN(HO)
HO
LO
LO
HO
t
on
t
r
90%90%
10%10%
Figure 1. Input/Output Timing DiagramFigure 2. Switching Time Waveform Definitions
50%50%
IN
SD
50%
t
sd
HO
90%
LO
Figure 3. Shutdown Waveform Definitions
HO
LO
DT
LO-HO
MDT=
10%
90%
DT
Figure 4. Deadtime Waveform Definitions
LO-HO
t
off
90%
- DT
DT
HO-LO
HO-LO
10%
t
f
IN
(LO)
LO
50%
HO
10%
MT
90%
50%
IN
(HO)
MT
HOLO
Figure 5. Delay Matching Waveform Definitions
www.irf.com6
Page 7
IRS2184/IRS21844(S)PbF
Turn-on Propagation Delay (ns)
Turn-on Propagation Delay (ns)
Turn-off Propagation Delay (ns)
1400
1200
1000
Max.
800
Typ.
600
400
-50-250255075100 125
Temperature (oC)
Figure 6A. Turn-On Propagation Delay
vs. Temperature
700
600
500
400
Max.
300
Typ.
200
100
-50-250255075100 125
Temperature (oC)
1400
1200
Max.
1000
Typ.
800
600
400
101214161820
Supply Voltage (V)
Figure 6B. Turn-On Propagation Delay
vs. Supply Voltage
700
600
500
Max.
400
Typ.
300
200
100
101214161820
Supply Voltage (V)
Figure 7A. Turn-Off Propagation Delay
vs. Temperature
Figure 7B. Turn-Off Propagation Delay
vs. Supply Voltage
www.irf.com7
Page 8
IRS2184/IRS21844(S)PbF
SD Propagation Delay (ns)
Turn-On Rise Time (ns)
SD Propagation Delay (ns)
Turn-On Rise Time (ns)
500
400
300
Max.
200
Typ.
100
0
-50-250255075100 125
Temperature (oC)
Figure 8A. SD Propagation Delay
vs. Temperature
120
100
80
60
Max
40
Typ.
20
0
-50-250255075100 125
Temperature (oC)
500
400
Max.
300
Typ.
200
100
0
101214161820
Supply Voltage (V)
Figure 8B. SD Propagation Delay
vs. Supply Voltage
120
100
Max.
80
60
Typ.
40
20
0
101214161820
Supply Voltage (V)
Figure 9A. Turn-On Rise Time vs.
Temperature
Figure 9B. Turn-On Rise Time vs. Supply
Voltage
www.irf.com8
Page 9
IRS2184/IRS21844(S)PbF
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
Deadtime (ns)
80
60
40
Max.
Typ
20
0
-50-250255075100 125
Temperature (oC)
Figure 10A. Turn-Off Fall Time vs.
Temperature
1100
900
700
Max.
500
Typ.
Min.
300
80
60
Max.
40
Typ.
20
0
101214161820
Supply Voltage (V)
Figure 10B. Turn-Off Fall Time vs. Supply
Voltage
1100
900
700
Max.
Typ.
500
Min.
300
100
-50 -250255075100 125
Temperature (oC)
Figure 11A. Deadtime vs. Temperature
100
101214161820
Supply Voltage (V)
Figure 11B. Deadtime vs. Supply Voltage
www.irf.com9
Page 10
IRS2184/IRS21844(S)PbF
Input Voltage (V)
Input Voltage (V)
7
6
s)
5
µ
4
3
2
Deadtime (
1
0
050100150200
RDT (KΩ)
Figure 11C. Deadtime vs. R
DT
6
5
4
3
Max.
2
1
Max.
Typ.
Min.
6
5
4
3
Min.
2
1
0
-50-250255075100125
Temperature (oC)
Figure 12A. Logic "1" Input Voltage
vs. Temperature
6
5
4
3
2
Max.
1
0
101214161820
V
Supply Voltage (V)
BAIS
Figure 12B. Logic "1" Input Voltage
vs. Supply Voltage
0
-50-250255075100125
Temperature (oC)
Figure 13A. Logic "0" Input Voltage
vs. Temperature
www.irf.com10
Page 11
IRS2184/IRS21844(S)PbF
SD Input Negative Going Threshold (V)
SD Input threshold (+) (V)
Figure 14B. SD input positive going threshold (+)
Figure12A. SD input positive going threshold (+)
6
5
4
3
2
Max.
1
0
101214161820
Supply Voltage (V)
Figure 13B. Logic "0" Input Voltage
vs. Supply Voltage
6
5
4
3
Max.
6
5
4
3
Max.
2
1
-50-250255075100125
Temperature (oC)
Figure 14A.
vs. Temperature
5
4
3
2
2
1
101214161820
V
Supply Voltage (V)
CC
vs. Supply Voltage
www.irf.com11
1
Max.
0
-50-250255075100125
Temperature (oC)
Figure 15A. SD Input Negative Going
Threshold vs. Temperature
Page 12
IRS2184/IRS21844(S)PbF
SD Input Negative Going Threshold (V)
Figure 15B. SD Input Negative Going Threshold
5
4
3
2
1
Max.
0
101214161820
Supply Voltage (V)
vs. Supply Voltage
5.0
4.0
3.0
2.0
Max
1.0
0.0
101214161820
V
Supply Voltage (V)
BIAS
5.0
4.0
3.0
2.0
Max.
1.0
0.0
-50-250255075100125
Temperature (oC)
Figure 16A. High Level Output Voltage
vs. Temperature (Io = 0 mA)
0.5
0.4
0.3
Max.
0.2
0.1
Low Level Output (V)
0.0
-50-250255075100 125
Temperature (oC)
Figure 16B. High Level Output Voltage
vs. Supply Voltage (Io = 0 mA)
www.irf.com12
Figure 17A. Low Level Output vs. Temperature
Page 13
IRS2184/IRS21844(S)PbF
0.5
0.4
0.3
Max.
0.2
0.1
Low Level Output (V)
0.0
101214161820
Supply Voltage (V)
Figure 17B. Low Level Output vs. Supply Voltage
A)
500
400
300
200
100
Max.
0
Offset Supply Leakage Current (µ
100200300400500600
VB Boost Voltage (V)
A)
500
400
300
200
100
Max.
0
-50-250255075100 125
Offset Supply Leakage Current (µ
Temperature (oC)
Figure 18A. Offset Supply Leakage
Current vs. Temperature
250
A)
µ
200
150
100
Supply Current (
50
BS
V
0
-50-250255075100 125
Temperature (oC)
Max.
Typ.
Min.
Figure 18B. Offset Supply Leakage
Current vs. VB Boost Voltage
Figure 19A. VBS Supply Current
vs. Temperature
www.irf.com13
Page 14
IRS2184/IRS21844(S)PbF
Supply Current
(mA)
Supply Current
(mA)
250
A)
200
µ
150
100
Supply Current (
50
BS
V
0
101214161820
VBS Floating Supply Voltage (V)
Figure 19B. VBS Supply Current
vs. VBS Floating Supply Voltage
5
4
3
2
1
CC
V
0
101214161820
VCC Supply Voltage (V)
Max.
Typ.
Min.
Max.
Typ.
Min
5
4
3
2
Max.
Typ.
1
CC
Min.
V
0
-50-250255075100125
Temperature (oC)
Figure 20A. VCC Supply Current
vs. Temperature
A)
120
µ
100
80
60
Max.
40
Typ.
20
0
Logic "1" Input Bias Current (
-50-250255075100 125
Temperature (oC)
Figure 20B. VCC Supply Current
vs. VCC Supply Voltage
Figure 21A. Logic "1" Input Bias Current
vs. Temperature
www.irf.com14
Page 15
IRS2184/IRS21844(S)PbF
UV Threshold (+) (V)
Undervoltage Threshold (+)
Logic "0" Input Bias Current (µA)
Logic "0" Input Bias Current
(µA)
120
A)
µ
(
100
80
60
Max.
40
Typ.
20
Logic "1" Input Bias Current
0
101214161820
Supply Voltage (V)
Figure 21B. Logic "1" Input Bias Current
vs. Supply Voltage
6
Max
5
4
3
2
1
0
101214161820
Supply Voltage (V)
Figure 22B. Logic “0” Input Bias Curremt
vs. Voltage
6
5
Max
4
3
2
1
0
-50-250255075100125
Temperature (°C)
Figure 22A. Logic “0” Input Bias Curremt
vs. Temperature
12
11
Max.
10
Typ.
9
Min.
8
BS
7
and V
CC
6
V
-50-250255075100 125
Temperature (oC)
Figure 23. VCC and V
BS
vs. Temperature
www.irf.com15
Page 16
IRS2184/IRS21844(S)PbF
Undervoltage Threshold (-)
Output Source Current (A)
Output Source Current (A)
(A)
12
11
10
Max.
9
Typ.
UVThreshold (-) (V)
8
BS
Min.
7
and V
CC
6
V
-50-250255075100 125
Temperature (oC)
Figure 24. VCC and V
5
4
3
2
Typ.
1
Min.
0
101214161820
BS
vs. Temperature
Supply Voltage (V)
5
4
3
Typ.
2
Min.
1
0
-50-250255075100125
Temperature (oC)
Figure 25A. Output Source Current
vs. Temperature
5.0
4.0
3.0
Typ.
2.0
Min.
1.0
-50-250255075100 125
Temperature (oC)
www.irf.com16
Figure 25B. Output Source Current
vs. Supply Voltage
Figure 26A. Output Sink Current
vs. Temperature
Page 17
IRS2184/IRS21844(S)PbF
Output Sink Current (A)
Figure 28. IRS2181 vs. Frequency (IRFBC30),
20
Figure 29. IRS2181 vs. Frequency (IRFBC40),
5
4
3
2
Typ.
1
Min.
0
101214161820
Supply Voltage (V)
Figure 26B. Output Sink Current
vs. Supply Voltage
140
120
C)
100
o
80
60
Temperature (
40
140v
70v
0v
140
120
C)
100
o
80
60
Temprature (
40
20
1101001000
Frequency (kHz)
Figure 27. IRS2181 vs. Frequency (IRFBC20),
R
=33 W, VCC=15 V
gate
140
120
C)
o
100
80
60
Temperature (
40
140v
70v
0v
140v
70v
0v
20
1101001000
Frequency (kHz)
R
=22 W, VCC=15 V
gate
www.irf.com17
20
1101001000
Frequency (kHz)
R
=15 W, VCC=15 V
gate
Page 18
IRS2184/IRS21844(S)PbF
Figure 30. IRS2181 vs. Frequency (IRFPE50),
Figure 31. IRS21814 vs. Frequency (IRFBC20),
Figure 32. IRS21814 vs. Frequency (IRFBC30),
Figure 33. IRS21814 vs. Frequency (IRFBC40),
140
120
C)
o
100
80
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=10 Ω, VCC=15 V
gate
140
120
C)
o
100
80
60
Temperature (
40
20
1101001000
Frequency (kHz)
140v
70v
0v
140
120
C)
o
100
80
60
Temperature (
40
140v
70v
0v
20
1101001000
Frequency (kHz)
R
=33 Ω, VCC=15 V
gate
140
120
C)
o
100
140v
70v
0v
140v
70v
0v
80
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=22 Ω, VCC=15 V
gate
www.irf.com18
R
=15 Ω, VCC=15 V
gate
Page 19
IRS2184/IRS21844(S)PbF
Figure 34. IRS21814 vs. Frequency (IRFPE50),
Figure 35. IRS2181s vs. Frequency (IRFBC20),
Figure 36. IRS2181s vs. Frequency (IRFBC30),
Figure 37. IRS2181s vs. Frequency (IRFBC40),
gate
140v 70v
140
120
C)
o
100
70v
0v
80
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=10 Ω, VCC=15 V
gate
140
120
C)
o
100
80
140v
70v
0v
140
120
C)
o
100
80
60
Temperature (
40
140v
70v
0v
20
1101001000
Frequency (kHz)
R
=33 Ω, VCC=15 V
gate
140
120
C)
o
100
0v
80
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=22 Ω, VCC=15 V
gate
www.irf.com19
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=15 Ω, VCC=15 V
Page 20
IRS2184/IRS21844(S)PbF
Figure 39. IRS21814s vs. Frequency (IRFBC20),
Figure 40. IRS21814s vs. Frequency (IRFBC30),
Figure 41. IRS21814s vs. Frequency (IRFBC40),
o
C)
140
140V 70V 0V
120
C)
o
100
80
60
Tempreture (
40
20
1101001000
Frequency (kHz)
Figure 38. IRS2181s vs. Frequency (IRFPE50),
R
=10 Ω, VCC=15 V
gate
140
120
100
80
60
40
20
1101001000
Frequency (kHz)
140v
70v
0v
140
120
C)
o
100
80
60
Temperature (
40
140v
70v
0v
20
1101001000
Frequency (kHz)
R
=33 Ω, VCC=15 V
gate
140
120
C)
o
100
80
140v
70v
0v
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=22 Ω, VCC=15 V
gate
www.irf.com20
R
=15 Ω, VCC=15 V
gate
Page 21
IRS2184/IRS21844(S)PbF
Figure 42. IRS21814s vs. Frequency (IRFPE50),
140v 70v
140
0v
120
C)
o
100
80
60
Temperature (
40
20
1101001000
Frequency (kHz)
R
=10 Ω, VCC=15 V
gate
www.irf.com21
Page 22
Cast Outlines
IRS2184/IRS21844(S)PbF
A
E
DB
5
87
6
6X
0.25 [ . 010 ]
65
H
4312
0.25 [ . 010 ] A
e
8X b
e1
A1
A
CAB
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONT ROLLING DI MENSION: MILLIMETER
3. D IMENSIONS A RE SHOW N IN MI L LIMETERS [ INCHES].
4. OUTLINE CONFORMS T O JED EC OUT L INE MS-012AA.
C
0.10 [ . 004 ]
8-Lead PDIP
6.46 [. 2 55]
3X 1.27 [. 05 0]
y
8-Lead SOIC
01-3003 01
DIM
FOOTPRINT
8X 0.72 [. 02 8]
8X 1.78 [. 07 0]
MINMAX
.0532
A
A1
b
c .0075 .0098 0.190.25
D
E
e
e1
H
K
L
y
.0688
.0040
.0098
.020
.013
.1968
.189
.1574
.1497
.050 BASIC
.025 BASIC0.635 BASIC
.2284
.2440
.0099
.0196
.016
.050
0°
K x 4 5°
8X L
8X c
7
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF L EAD FOR SOLDERING TO
A SUBSTRATE.