Datasheet irlz24ns Datasheet

Page 1
PD - 91358E
IRLZ24NS/L
l Logic-Level Gate Drive l Advanced Process Technology
l Surface Mount (IRLZ24NS) l Low-profile through-hole (IRLZ24NL) l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier
G
HEXFET® Power MOSFET
D
V
R
DS(on)
= 55V
DSS
= 0.06Ω
ID = 18A
S
utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
2
Pak is a surface mount power package capable of
The D accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on­resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of
2
D Pak
TO-262
its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRLZ24NL) is available for low­profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 18 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 13 A I
DM
PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 45 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns T
J
T
STG
Pulsed Drain Current  72
Linear Derating Factor 0.30 W/°C Gate-to-Source Voltage ±16 V Single Pulse Avalanche Energy 68 mJ Avalanche Current 11 A Repetitive Avalanche Energy 4.5 mJ
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 3.3 Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40
°C/W
°C
5/12/98
Page 2
IRLZ24NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.061 ––– V/°C Reference to 25°C, ID = 1mA
J
––– ––– 0.060 VGS = 10V, ID = 11A
Static Drain-to-Source On-Resistance
––– ––– 0.075 Ω VGS = 5.0V, ID = 11A
––– ––– 0.105 VGS = 4.0V, ID = 9.0A Gate Threshold Voltage 1. 0 ––– 2 .0 V VDS = VGS, ID = 250µA Forward Transconductance 8.3 ––– ––– S VDS = 25V, ID = 11A
Drain-to-Source Leakage Current
––– ––– 25 VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
µA
nA
VGS = 16V
Total Gate Charge ––– ––– 15 ID = 11A Gate-to-Source Charge ––– ––– 3.7 nC VDS = 44V Gate-to-Drain ("Miller") Charge ––– ––– 8.5 VGS = 5.0V, See Fig. 6 and 13  Turn-On Delay Time ––– 7.1 ––– VDD = 28V Rise Time ––– 74 ––– ID = 11A Turn-Off Delay Time ––– 20 ––– RG = 12Ω, VGS = 5.0V
ns
Fall Time ––– 29 ––– RD = 2.4Ω, See Fig. 10  Internal Source Inductance 7.5
––– –––
Between lead,
nH
and center of die contact Input Capacitance ––– 480 ––– VGS = 0V Output Capacitance ––– 130 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 61 ––– ƒ = 1.0MHz, See Fig. 5
Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
18
72
showing the
A
p-n junction diode. Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V Reverse Recovery Time ––– 60 90 ns TJ = 25°C, IF = 11A Reverse Recovery Charge ––– 130 200 nC di/dt = 100A/µs Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

D
G
S
Notes:
I
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
= 25V, starting TJ = 25°C, L = 790µH
DD
RG = 25Ω, I
= 11A. (See Figure 12)
AS
≤ 11A, di/dt ≤ 290A/µs, V
SD
DD
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRLZ24N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
≤ V
(BR)DSS
,
Page 3
IRLZ24NS/L
)
A
)
A
A
A
100
VGS TOP 15V 12V 10V
8.0V
6.0V
4.0V
3.0V BOTTOM 2.5V
10
1
D
I , D rain -to -S o u rc e Curre n t (A)
2.5V 20µs PULSE WIDTH
T = 25°C
0.1
0.1 1 10 100
V , Dra in-t o-So u rc e V o ltage (V
DS
J
Fig 1. Typical Output Characteristics
100
T = 25°C
J
T = 175°C
J
10
100
VGS TOP 15V 12V 10V
8.0V
6.0V
4.0V
3.0V BOTTOM 2.5V
10
2.5V
1
D
I , D rain -to -S o u rc e Curre n t (A)
20µs PULSE WIDTH T = 175°C
0.1
0.1 1 10 100
V , Dra in-t o-So u rc e V o ltage (V
DS
J
Fig 2. Typical Output Characteristics
3.0
I = 18 A
D
2.5
2.0
1.5
(Norm alized)
1
D
I , Dra in-to -S o urc e C u rre nt (A )
0.1 2345678910
V , Gate -to-S o urce V oltage (V)
GS
V = 15V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
1.0
0.5
DS(on)
R , D r ain -to- S ou r c e On Resi s tan c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
V = 10 V
GS
Vs. Temperature
Page 4
IRLZ24NS/L
)
A
)
A
A
)
A
g
800
600
400
V = 0V, f = 1M Hz
GS
C = C + C , C S H O RTE D
is s gs gd d s
C = C
rss g d
C = C + C
oss ds gd
C
iss
C
oss
C, Capacitance (pF)
200
C
rss
0
1 10 100
V , Drai n-to -So urce Voltage (V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
15
I = 11 A
V , G a te -to -S o u rc e Vo lta g e (V)
12
GS
D
9
6
3
V = 44 V
DS
V = 28 V
DS
FOR TEST CIRCU IT
0
048121620
Q , T o ta l Ga te C h a rge (nC
G
SE E F IG U R E 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OP ER A T IO N IN T HIS A R E A L IMITE D BY R
DS(on)
T = 175°C
J
10
SD
I , R ev er se D r a in Curre nt ( A )
1
0.4 0.8 1.2 1.6 2.0
V , Source-to-Drain Voltage (V)
SD
T = 25°C
J
V = 0V
GS
Fig 7. Typical Source-Drain Diode
100
10
D
I , D rain C u rr ent ( A )
T = 25 °C
C
T = 17 5 °C
J
le Pulse
Sin
1
1 10 100
V , Dra in-t o-Sou r ce Vo ltage (V
DS
Fig 8. Maximum Safe Operating Area
10µs
100µs
1ms
10ms
Page 5
IRLZ24NS/L
A
20
16
12
8
D
I , D ra in C u rre n t (A mp s )
4
0
25 50 75 100 125 150 175
T , Case Temperature (°C)
C
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
5.0V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
-
DD
D = 0.50
thJC
1
0.20
0.10
0.05
0.02
0.01
0.1
Th e rma l R es p o ns e (Z )
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGL E P ULS E (THERM AL RESPONSE)
No tes :
1. D u ty fa cto r D = t / t
2. Pe a k T = P x Z + T
t , Rec tangular Pulse Duration (sec)
1
DM
J
P
DM
t
1
t
2
2
1
thJ C
C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
Page 6
IRLZ24NS/L
A
)
D.U.T .
I
AS
L
0.01Ω
+
V
DD
-
R
5.0 V
V
DS
G
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
V
DS
I
AS
Fig 12b. Unclamped Inductive Waveforms
140
120
100
80
60
40
20
AS
V = 25 V
E , S ingle Pu lse A valanc he E n ergy (m J)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C
J
I TOP 4.5A
7.8 A BOTTO M 11A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same T ype as D.U.T .
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T .
3mA
I
G
Current Sampling Resistors
I
+
-
D
Fig 13b. Gate Charge Test Circuit
V
DS
Page 7
IRLZ24NS/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P.W.
Period
+
+
V
DD
-
VGS=10V
*
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Diode Recovery
dv/dt
Fig 14. For N-Channel HEXFETS
di/dt
V
DD
I
SD
Page 8
IRLZ24NS/L
A
D2Pak Package Outline
10.54 (.415)
1.40 (.055) MAX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A ­2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10) M B A M
Part Marking Information
D2Pak
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS 1 - G ATE 2 - D RAIN 3 - S OU R CE
10.16 (.400) REF.
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350) REF.
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082) 2X
2.54 (.100) 2X
INTERNATIONAL RE CTIFIER LOG O
A S SEMBLY LO T CO D E
F530S
9246
9 B 1 M
PART NUM B ER
DATE CODE (YYW W ) YY = YEAR WW = WEEK
Page 9
Package Outline
TO-262 Outline
IRLZ24NS/L
Part Marking Information
TO-262
Page 10
IRLZ24NS/L
Tape & Reel Information
D2Pak
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
1.60 (.063)
1.50 (.059)
0.3 68 (.0145)
0.3 42 (.0135)
FEED D IRECTION
1.85 (.073)
1.65 (.065)
TRL
10.90 (.429)
10.70 (.421)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COM FO R M S TO E IA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HU B.
4. INCLUDES FLAN GE DISTORTION @ OUTER EDGE.
11.60 (.457)
11.40 (.449)
1.75 (.069)
1.25 (.049)
16.10 (.634)
15.90 (.626)
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.4 0 (1.039)
24.40 (.961 )
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362) MIN.
30.40 (1.197) MAX .
4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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http://www.irf.com/ Data and specifications subject to change without notice. 5/98
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