l Logic Level Gate Drive
l Ultra Low On-Resistance
l Surface Mount (IRLR3410)
l Straight Lead (IRLU3410)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
G
D
V
= 100V
DSS
R
DS(on)
= 0.105Ω
ID = 17A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
D - P AK
TO-252AA
I-PAK
TO-251AA
The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
Absolute Maximum Ratings
ParameterMax.Units
ID @ TC = 25°CContinuous Drain Current, VGS @ 10V17
ID @ TC = 100°CContinuous Drain Current, VGS @ 10V12A
I
DM
PD @TC = 25°CPower Dissipation79W
V
GS
E
AS
I
AR
E
AR
dv/dtPeak Diode Recovery dv/dt 5.0V/ns
T
J
T
STG
Pulsed Drain Current 60
Linear Derating Factor0.53W/°C
Gate-to-Source Voltage ± 16V
Single Pulse Avalanche Energy150mJ
Avalanche Current9.0A
Repetitive Avalanche Energy7.9mJ
Operating Junction and-55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds300 (1.6mm from case )
and center of die contact
Input Capacitance–––800 –––VGS = 0V
Output Capacitance–––160 –––pFVDS = 25V
Reverse Transfer Capacitance–––90–––ƒ = 1.0MHz, See Fig. 5
Forward Turn-On TimeIntrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%
= 25V, starting TJ = 25°C, L = 3.1mH
= 9.0A. (See Figure 12)
AS
≤ 9.0A, di/dt ≤ 540A/µs, V
DD
≤ V
(BR)DSS
Uses IRL530N data and test conditions
,
This is applied for I-PAK, L
center of die contact
of D-PAK is measured between lead and
S
G
G
D
S
D
S
Page 3
IRLR/U3410
A
A
)
A
A
100
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
10
1
D
I , D ra in-to -S o u rc e C u rre nt ( A )
2.5V
20µs PU LS E WIDTH
T = 25°C
0.1
0.1110100
V , D rain-to-Source V oltage (V)
DS
J
Fig 1. Typical Output Characteristics
100
T = 25°C
J
T = 175°C
J
10
100
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
10
2.5V
1
D
I , D ra in-to -S o u rc e C u rre nt ( A )
20µs PU LS E WIDTH
T = 175°C
0.1
0.1110100
V , D rain-to-Source V oltage (V)
DS
J
Fig 2. Typical Output Characteristics
3.0
I = 1 5A
D
2.5
2.0
1.5
(N o rmaliz e d)
1
D
I , Drain-to-Source Current (A)
0.1
2345678910
V , Ga te -to - S o u rc e Vo ltage (V
GS
V = 50V
DS
20µs PULSE W IDTH
Fig 3. Typical Transfer Characteristics
1.0
0.5
DS(on)
R , D ra in -to -S o u rc e On Res is ta nc e
0.0
-60 -40 -20 020 40 60 80 100 120 140 160 180
T , Junction Tem pe rature (°C)
J
Fig 4. Normalized On-Resistance
V = 10 V
GS
Vs. Temperature
www.irf.com3
Page 4
IRLR/U3410
A
A
A
A
1400
1200
1000
800
600
C, Capacitance (pF)
400
200
0
110100
V = 0V, f = 1 MHz
GS
C = C + C , C S HORTE D
iss g s gd d s
C = C
rss g d
C = C + C
oss d s g d
C
iss
C
oss
C
rss
V , D rain-to-Source V oltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
15
I = 9.0A
V , Ga te-to -Sou rc e V olta g e ( V )
12
GS
D
9
6
3
V = 80 V
DS
V = 50 V
DS
V = 20 V
DS
FOR TEST CIRCUIT
0
0 1020304050
Q , To ta l Gate Cha rg e (n C)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
O P E R A T IO N IN TH IS AREA L IM IT E D
BY R
DS(on)
T = 175°C
J
10
SD
I , Reverse Drain Current (A)
1
0.40.60.81.01.21.4
V , So urce-to-Drain Voltage (V)
SD
T = 25°C
J
V = 0V
Fig 7. Typical Source-Drain Diode
GS
100
10µs
10
D
I , Drain Current (A)
T = 25°C
C
T = 175°C
J
Single Pulse
1
1101001000
V , D rain-to-Source V oltage (V)
DS
100µs
1ms
10ms
Fig 8. Maximum Safe Operating Area
Forward Voltage
4www.irf.com
Page 5
IRLR/U3410
20
15
10
D
I , Drain Current (A)
5
0
255075100125150175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
thJC
D = 0.50
1
0.20
0.10
P
1 2
DM
t
1
t
2
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response (Z )
Notes:
1. Duty factor D = t / t
2. Peak T =Px Z+ T
0.01
0.000010.00010.0010.010.1 1
t , Rectangular Pulse Duration (sec)
1
JDMthJCC
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRLR/U3410
A
A
15V
DRIVER
+
-
V
DD
R
V
G
10V
DS
L
D.U.T
I
AS
Ω
t
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
350
300
250
200
150
100
50
AS
V = 25 V
E , Single Pulse Avalanche Energy (mJ)
DD
0
255075100125150175
Starting T , Junction Tem perature (°C)
J
I
TO P 3.7A
6.4A
BOTTO M 9.0A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
5.0 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T .
3mA
I
G
Current Sampling Resistors
I
D
+
Fig 13b. Gate Charge Test Circuit
V
DS
-
6www.irf.com
Page 7
IRLR/U3410
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P.W.
Period
+
+
V
DD
-
VGS=10V
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFETS
www.irf.com7
Page 8
IRLR/U3410
A
Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
- A -
5.46 (.215)
5.21 (.205)
4
6.22 (.245)
1.02 (.040)
1.64 (.025)
1.52 (.060)
1.15 (.045)
1.14 (.045)
2X
0.76 (.030)
2.28 (.090)
1 2 3
5.97 (.235)
0.89 (.035)
3X
0.64 (.025)
0.25 (.010) M A M B
4.57 (.180)
Part Marking Information
TO-252AA (D-PARK)
- B -
1.27 (.050)
0.88 (.035)
2.38 (.094)
2.19 (.086)
10.42 (.410)
9.40 (.370)
NOTES:
1 DIMENSIONING & TOLERANC ING PE R AN SI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 C ONFORMS TO JED E C OUT LINE T O-25 2 AA.
4 DIMENSIONS SHOW N ARE BEFORE SOLDER DIP,
SOLDER D IP MAX. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
0.51 (.020)
MIN .
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - G ATE
2 - D RAIN
3 - S OURCE
4 - D RAIN
E XAM PL E : T HIS IS A N IR F R1 2 0
W ITH A SS E MB L Y
LO T CO D E 9 U 1 P
INTERNATIONAL
R EC T IF IER
L OG O
IRFR
120
FIRST PORTION
OF PART NUMBER
9 U 1 P
ASSEMBLY
L OT C O DE
SECOND PORTION
OF PART NUMBER
8www.irf.com
Page 9
Package Outline
R
TO-251AA Outline
Dimensions are shown in millimeters (inches)
IRLR/U3410
6.73 (.265)
6.35 (.250)
5.46 (.215)
5.21 (.205)
1.52 (.060)
1.15 (.045)
- B -
2.28 (.090)
1.91 (.075)
1.14 (.045)
3X
0.76 (.030)
2.28 (.090)
2X
- A -
4
1 2 3
6.22 (.245)
5.97 (.235)
9.65 (.380)
8.89 (.350)
0.89 (.035)
3X
0.64 (.025)
0.25 (.010) M A M B
Par t Marking Infor mation
TO-251AA (I-PARK)
1.27 (.050)
0.88 (.035)
2.38 (.094)
2.19 (.086)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
NOTES:
1 DIMEN S IONING & TOLER AN C ING PER AN S I Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 C ONFORMS TO JED EC OUTLINE TO -252AA.
4 DIMENSIONS SHOW N ARE BEFORE SOLDER DIP,
SO LDE R DIP MAX. +0 .1 6 (.006 ) .
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - G ATE
2 - D RAIN
3 - S OURCE
4 - D RAIN
EXAMPLE : THIS IS AN IRFU120
WITH ASSEMBLY
L OT C O DE 9 U1 P
INTERNATIONAL
R E CTI F IE R
L O GO
IR F U
120
FIRST POR TION
OF PART NUMBE
9U 1P
ASSEMBLY
L O T C OD E
SECOND PORTION
OF PART NUMBER
www.irf.com9
Page 10
IRLR/U3410
Tape & Reel Information
TO-252AA
TR
16 . 3 ( .641 )
15 . 7 ( .619 )
12 .1 ( .476 )
11 .9 ( .469 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIM ETERS ( INCHES ).
3. OU TLINE CONFORM S TO EIA-481 & EIA-541.
13 INCH
FEED DIRECTION
8.1 ( .318 )
7.9 ( .312 )
TRR
TRL
16 .3 ( .641 )
15 .7 ( .619 )
FEED DIRECTION
16 m m
NOTES :
1. OUTLINE CONFO RM S TO EIA-481.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: 171 (K&H Bldg.) 30-4 Nishi-ikebukuro 3-chome, Toshima-ku, Tokyo Japan Tel: 81 33 983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 16907 Tel: 65 221 8371
Data and specifications subject to change without notice.5/98
10www.irf.com
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