Datasheet irlr2908 Datasheet

Page 1
PD - 94501
g
AUTOMOTIVE MOSFET
IRLR2908 IRLU2908
Features
l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax
G
Description
Specifically designed for Automotive applications, this HEXFET ® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175°C junction operating temperature, low RθJC, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.\
The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C
@ TC = 100°C
I
D
@ TC = 25°C
I
D
I
DM
PD @TC = 25°C
V
GS
E
AS
E
(tested)
AS
I
AR
E
AR
dv/dt T
J
T
STG
Conti n uous Drai n Cur r e nt, V Conti n uous Drai n Cur r e nt, V Conti n uous Drai n Cur r e nt, V Pulsed Drain Current
Maximum Power Dissipation W Linear D er ating Factor W/°C
Gate-to-Source Volt age V Single Puls e Avalanche En er gy (Therm ally Limited )
le Pulse Avalanche Energy Tested Va lu e
Sin Avalanche Current Repetitive A v alanch e Energy
Peak Di od e R ec overy dv /dt Operating Junction and °C Stor ag e Temperat ur e Ra ng e
Soldering Temperature, for 10 seconds
c
c
@ 10V (Si licon Limited)
GS
@ 10V (See Fi g. 9)
GS
(Package Limited)
@ 10V
GS
i
h
e
d
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
R
θJA
Junction-to-Case ––– 1.3 °C/W Junction-to-Ambient (PCB Mount)
Junction-to-Ambient ––– 110
j
www.irf.com 1
HEXFET® Power MOSFET
D
V
= 80V
DSS
R
DS(on)
= 28mΩ
ID = 30A
S
D-Pak
IRLR2908
Max.
39 28
30 150 120
0.77
± 16
180 250
See Fig.12a,12b,15,16
2.3
-55 to + 175
300 (1. 6m m fr o m case )
––– 40
I-Pak
IRLU2908
A
mJ
A
mJ
V/ns
02/13/03
Page 2
IRLR2908/IRLU2908
/
Static @ TJ = 25°C (unless o therwi se specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
∆ΒV
DSS
R
DS(on)
V
GS(th)
gfs Forwa r d Tra nscond uc tance 35 – –– ––– S I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff.
oss
Drain-t o-Source Breakdown Voltage 80 ––– ––– V
∆T
Breakdown Vol t age Temp. Co ef f icient ––– 0.085 ––– V/°C
J
Static Drai n-to-Sou rce On-Re s istance ––– 22.5 28
––– 25 30
Gate Threshold Volt age 1.0 ––– 2.5 V
Drain-t o-Source Leakage Current ––– ––– 20 µA
––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 200 nA Gate-to-Source Reverse Leaka ge ––– ––– -200 Total Gate Charge ––– 22 33 nC Gate-to-Source Charge ––– 6.0 9.1 Gate -t o - D rain ("Miller") Char g e ––– 11 17 Turn- On D elay Time ––– 12 ––– ns Rise Time –––95––– Turn-Off Del a y Time ––– 36 ––– Fall Time –––55––– Internal D rain Inductance ––– 4.5 ––– nH Betwee n lead,
Internal Sour ce Inductance ––– 7.5 ––– from packag e
Input Capacitance ––– 1890 ––– pF Output Cap acitance ––– 260 ––– Reverse Transfer Capacitance ––– 35 ––– Output Capacitance ––– 1920 ––– Output Cap acitance ––– 170 ––– Effective Output Capacitance ––– 310 –––
Conditions
VGS = 0V, ID = 250µA Referen ce to 25°C, I V
mΩ
= 10V, ID = 23A
GS
V
= 4.5V, ID = 20A
GS
= VGS, ID = 250µA
V
DS
= 25V, ID = 23A
V
DS
V
= 80V, VGS = 0V
DS
= 80V, VGS = 0V, TJ = 125°C
V
DS
V
= 16V
GS
= -16V
V
GS
= 23A
I
D
VDS = 64V V
= 4.5V
GS
V
= 40V
DD
I
= 23A
D
R
= 8.3Ω
G
f
= 4.5V
V
GS
6mm (0.25in.)
and center of die contact V
= 0V
GS
V
= 25V
DS
ƒ = 1.0MHz , See Fig . 5 V
= 0V, VDS = 1.0V, ƒ = 1.0MHz
GS
V
= 0V, VDS = 64V, ƒ = 1. 0M Hz
GS
VGS = 0V, VDS = 0V to 64V
= 1mA
D
f
f
D
G
S
Diode Characteristics
Parameter Min. Typ. Max. Units
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes through are on page 11
Conti n uous Source Curren t ––– ––– 39 (Body Diode) A
Pulsed Source Current ––– ––– 150 (Body Diode)
c
Diode Forward Voltage ––– ––– 1.3 V Reverse Reco very Time ––– 75 110 ns Reverse Recovery Char ge ––– 210 310 nC Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
HEXFET® is a registered trademark of International Rectifier.
MOSFET symbol showing the
integral reve r s e p-n junct ion diode.
TJ = 25°C, IS = 23A, VGS = 0V T
= 25°C, IF = 23A, VDD = 25V
J
di/dt = 100A/µs
Conditions
D
G
S
f
f
2 www.irf.com
Page 3
IRLR2908/IRLU2908
1000
TOP 15V
)
100
A
(
t
n
e
r
r
u C e
c
r
u
o S
-
o
t
-
n
i
a
r D
,
D
I
10
1
0.1
BOTTOM 2.5V
VGS 10V
4.5V
4.0V
3.5V
3.0V
2.7V
2.5V
20µs PULSE WIDTH Tj = 25°C
0.01
0.01 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
1000
)
Α
(
t
n
e
r
100
r
u C e
c
r
u
o S
-
o
t
-
n
i
a
r D
,
D
I
10
TJ = 175°C
TJ = 25°C
V
= 25V
DS
20µs PULSE WIDTH
1
2 3 4 5
VGS, Gate-t o-Source Voltage (V)
) A
(
t
n
e
r
r
u C e
c
r
u
o S
-
o
t
-
n
i
a
r D
, I
1000
TOP 15V
100
BOTTOM 2.5V
10
1
D
VGS 10V
4.5V
4.0V
3.5V
3.0V
2.7V
2.5V
20µs PULSE WIDTH Tj = 175°C
0.1
0.01 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
60
) S
(
50
e
c
n
a
t
c
40
u
d
n
o
c
s
30
n
a
r T
d
r
a
20
w
r
o F
,
S
10
F
G
0
0 10 20 30 40 50 60
TJ = 25°C
TJ = 175°C
VDS = 10V 20µs PULSE WIDTH
ID, Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
www.irf.com 3
Page 4
IRLR2908/IRLU2908
100000
10000
) F
p
(
e
c
n
a
t
i
1000
c
a
p
a C
, C
100
10
V
= 0V, f = 1 MHZ
GS
C
= C
iss rss oss
= C
= C
gs
gd
ds
C C
1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000.00
) A
(
100.00
t
n
e
r
r
u C n
i
a
r D e
s
r
e
v
e R
,
D S
I
10.00
1.00
0.10
TJ = 175°C
TJ = 25°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD, Source-to-Drain Voltage (V)
+ Cgd, C
+ C
gd
C
iss
C
oss
C
rss
SHORTED
ds
V
GS
= 0V
) V
( e
g
a
t
l
o V
e
c
r
u
o S
-
o
t
-
e
t
a G
, V
5.0 ID= 23A
4.0
3.0
2.0
S
1.0
G
0.0
0 5 10 15 20 25
VDS= 64V VDS= 40V VDS= 16V
Q
Total G ate Charge (nC)
G
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA
) A
(
t
100
n
e
r
r
u C e
c
r
10
u
o S
-
o
t
-
n
i
a
r D
1
,
Tc = 25°C
D
I
Tj = 175°C Single Pulse
0.1
1 10 100 1000
LIMITED BY RDS(on)
100µsec
10msec
VDS, Drain-to-Source Voltage (V)
1msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRLR2908/IRLU2908
40
35
30
) A
(
t
25
n
e
r
r
u C
20
n
i
a
r
15
D
,
D
I
10
5
0
25 50 75 100 125 150 175
TC , Case Temper ature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
10
3.0
e
c
n
a
t
s
i
s
e R n O e
c
r
u
o S
-
o
t
-
n
i
a
r D
,
)
n
o
( S D
R
ID = 38A V
= 4.5V
GS
2.5
2.0
)
d
e
z
i
1.5
l
a m
r
o N
(
1.0
0.5
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
)
C
1
J
h
t
Z (
e
s
n
o
p
s
e R
l
a m
r
e
h T
0.001
D = 0.50
0.20
0.10
0.1
0.01
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
0.05
0.02
0.01 SINGLE PULSE
( THERMAL RESPONSE )
P
DM
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
t
1
t
2
t1 , Rectangular Pulse Dur ation (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com 5
Page 6
IRLR2908/IRLU2908
A
15V
DRIVER
+
V
DD
-
R
G
20V
V
V
DS
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
400
)
J m
( y
g
r
e
300
n E
e
h
c
n
a
l
a
200
v A
e
s
l
u P
e
l
g
100
n
i S
,
S A
E
0
25 50 75 100 125 150 175
TOP 9.3A
BOTTOM23A
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
2.5
I
D
16A
) V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
( e
g
2.0
a
t
l
o V
d
l
o
h
s
1.5
e
r
h
t e
t
a G
)
h
1.0
t
( S G
V
0.5
-75 -50 -25 0 25 50 75 100 125 150 175 200
ID = 250µA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage vs. Temperature
6 www.irf.com
Page 7
1000
IRLR2908/IRLU2908
Duty Cycle = Singl e Pulse
100
) A
(
t
n
e
r
r
u C
10
e
h
c
n
a
l
a
v A
1
0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
200
TOP Single Pulse BOTTOM 10% Duty Cycle
)
J m
150
( y
g
r
e
n E
e
100
h
c
n
a
l
a
v A
,
50
R A
E
0
25 50 75 100 125 150 175
ID = 23A
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T every part type.
2. Safe operation in Avalanche is allowed as long asT not exceeded.
. This is validated for
jmax
jmax
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
·f
av
D (ave)·tav
thJC
www.irf.com 7
is
Page 8
IRLR2908/IRLU2908
Reverse Recovery Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
D.U.T
+
-
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance Current Transformer
-
+
V
DD
R
G
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
-
Re-Applied Voltage
Inductor Curent
* V
GS
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P.W.
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
+
V
DD
-
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
8 www.irf.com
Page 9
TO-252AA (D-Pak) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
5.46 (.215)
5.21 (.205)
1.02 (.040)
1.64 (.025)
1.52 (.060)
1.15 (.045)
1.14 (.045)
2X
0.76 (.030)
2.28 (.090)
- A -
4
1 2 3
3X
4.57 (. 180)
1.27 (. 050)
0.88 (. 035)
6.22 (.245)
5.97 (.235)
- B -
0.89 (.035)
0.64 (.025)
0.25 (.010) M A M B
IRLR2908/IRLU2908
2.38 (.094)
2.19 (.086)
10.4 2 ( . 4 10 )
9.40 (.370)
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSIO N : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
0.51 (.020) MIN.
0.58 (. 023)
0.46 (. 018)
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
TO-252AA (D-Pak) Part Marking Information
Notes: This part marking information applies to devices produced before 02/26/2001
EXAMPLE:
Notes: T his part marking information applies to devices produced after 02/26/2001
EXAMPLE:
www.irf.com 9
THIS IS AN IRFR120 WITH ASSEMBLY LOT CODE 9U1P
THIS IS AN IRFR120 WITH ASSEMBLY
LOT CODE 1234 AS SE MBLE D ON WW 16, 1999 IN THE ASSEMBL Y LINE "A"
INTERNATIONAL
RECTIFIER
LOGO
AS S E MB L Y LOT CODE
INTERNAT IONAL
RECTIFIER
LOGO
ASSEMBLY LOT CODE
IRFU120
9U 1P
IRF U120
916A
DATE CODE
016
3412
YE AR = 0 WE E K = 16
PART NUMBE R
DATE CODE YEAR 9 = 1999 WEEK 16 LINE A
Page 10
IRLR2908/IRLU2908
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
5.46 (.215)
5.21 (.205)
1.52 (.060)
1.15 (.045)
- A -
4
1 2 3
1.27 (.050)
0.88 (.035)
6.22 (.245)
5.97 (.235)
2.38 (.094)
2.19 (.086)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
- B -
2.28 (.090)
1.91 (.075)
1.14 (.045)
3X
0.76 (.030)
2.28 (.090)
9.65 (.380)
8.89 (.350)
0.89 (.035)
3X
0.64 (.025)
0.25 (.010) M A M B
2X
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M , 1 982 . 2 CONTROLLI NG DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
I-Pak (TO-251AA) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE:
Notes: T his part marking information applies to devices produced after 02/26/2001
THIS IS AN IRFR120 WITH ASSEMBLY LOT CODE 9U1P
INTERNAT IONAL
RECTIFIER
LOGO
AS S E MB L Y LOT CODE
IRF U120
016
9U 1P
DATE CODE YEAR = 0 WEEK = 16
EXAMPLE:
THIS IS AN IRFR120 WIT H AS SE MB L Y LOT CODE 5678 AS SEMBLE D ON WW 19, 1999 IN T HE ASSEMBLY LINE "A"
INTERNAT IONAL
RECT IFIER
LOGO
AS S E MB L Y LOT CODE
IRF U120
56
919A
78
PART NUMBE R
DATE CODE YE AR 9 = 1999 WE E K 1 9 LINE A
10 www.irf.com
Page 11
IRLR2908/IRLU2908
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
FEED DIRECTION
8.1 ( .318 )
7.9 ( .312 )
16 mm
16.3 ( .641 )
15.7 ( .619 )
FEED DIRECTION
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11).Limited by T
this value.
I
≤ 23A, di/dt ≤ 400A/µs, V
SD
, starting TJ = 25°C, L = 0.71mH, RG = 25Ω, I
Jmax
DD
≤ V
(BR)DSS
, TJ ≤ 175°C.
= 23A, VGS =10V. Part not recommended for use above
AS
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.C
eff. is a fixed capacitance that gives the same charging time as C
oss
Limited by T
, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
Jmax
oss
while V
is rising from 0 to 80% V
DS
DSS
.
This value determined from sample failure population. 100% tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer
to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/03
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