Datasheet IRLR2905ZPBF Specification

PD - 95848C

AUTOMOTIVE MOSFET

IRLR2905Z IRLU2905Z

HEXFET® Power MOSFET

Features

O Logic Level O Advanced Process Technology O Ultra Low On-Resistance O 175°C Operating Temperature O Fast Switching O Repetitive Avalanche Allowed up to Tjmax

G

Description

Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.

Absolute Maximum Ratings

Parameter Units

ID @ TC = 25°C

ID @ TC = 100°C

@ TC = 25°C

I

D

I

DM

PD @TC = 25°C

V

GS

E

AS (Thermally limited)

E

(Tested )

AS

I

AR

E

AR

T

J

T

STG

Continuous Drain Current, V

Continuous Drain Current, V Pulsed Drain Current

Power Dissipation W

Linear Derating Factor W/°C Gate-to-Source Voltage V

Single Pulse Avalanche Energy

Single Pulse Avalanche Energy Tested Value

Avalanche Current

Repetitive Avalanche Energy

Operating Junction and

Storage Temperature Range °C

Soldering Temperature, for 10 seconds

Mounting Torque, 6-32 or M3 screw

c

c

@ 10V (Silicon Limited)

GS

@ 10V

GS

@ 10V (Package Limited)

GS

d

h

g

Thermal Resistance

Parameter Typ. Max. Units

R

θ

JC

R

θ

JA

R

θ

JA

Junction-to-Case

Junction-to-Ambient (PCB mount)

Junction-to-Ambient ––– 110

j

i

HEXFET® is a registered trademark of International Rectifier.

www.irf.com 1

D

V

= 55V

DSS

R

S

®

D-Pak

IRLR2905Z

DS(on)

ID = 42A

= 13.5mΩ

I-Pak

IRLU2905Z

Max.

60

43

42

240

110

0.72

± 16

57

85

See Fig.12a, 12b, 15, 16

-55 to + 175

300 (1.6mm from case )

y

10 lbf

in (1.1Nym)

––– 1.38

––– 50 °C/W

A

mJ

A

mJ

8/28/09

IRLR/U2905Z

/

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

V

(BR)DSS

ΔV

(BR)DSS

R

DS(on)

V

GS(th)

gfs Forward Transconductance 25 ––– ––– S I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

C

eff.

oss

Source-Drain Ratings and Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Drain-to-Source Breakdown Voltage 55 ––– ––– V

ΔT

Breakdown Voltage Temp. Coefficient ––– 0.053 ––– V/°C

J

Static Drain-to-Source On-Resistance ––– 11 13.5

––– ––– 20

––– ––– 22.5

mΩ

Gate Threshold Voltage 1.0 ––– 3.0 V

Drain-to-Source Leakage Current ––– ––– 20 μA

––– ––– 250

Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Source Reverse Leakage ––– ––– -200

Total Gate Charge ––– 23 35

Gate-to-Source Charge ––– 8.5 ––– nC

Gate-to-Drain ("Miller") Charge ––– 12 –––

Turn-On Delay Time ––– 14 –––

Rise Time ––– 130 –––

Turn-Off Delay Time ––– 24 ––– ns

Fall Time ––– 33 –––

Internal Drain Inductance ––– 4.5 ––– Between lead,

nH 6mm (0.25in.)

Internal Source Inductance ––– 7.5 ––– from package

Input Capacitance ––– 1570 –––

Output Capacitance ––– 230 –––

Reverse Transfer Capacitance ––– 130 ––– pF

Output Capacitance ––– 840 –––

Output Capacitance ––– 180 –––

Effective Output Capacitance ––– 290 –––

Parameter Min. Typ. Max. Units

Continuous Source Current ––– ––– 42

(Body Diode) A Pulsed Source Current ––– ––– 240

(Body Diode) Diode Forward Voltage ––– ––– 1.3 V

Reverse Recovery Time ––– 22 33 ns

Reverse Recovery Charge ––– 14 21 nC

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

c

Conditions

VGS = 0V, ID = 250μA

Reference to 25°C, I

V

= 10V, ID = 36A

GS

VGS = 5.0V, ID = 30A

V

= 4.5V, ID = 15A

GS

= 1mA

D

e

e e

VDS = VGS, ID = 250μA

V

= 25V, ID = 36A

DS

= 55V, VGS = 0V

V

DS

V

= 55V, VGS = 0V, TJ = 125°C

DS

VGS = 16V

V

= -16V

GS

= 36A

I

D

= 44V

V

DS

VGS = 5.0V

e

VDD = 28V

I

= 36A

D

R

= 15 Ω

G

VGS = 5.0V

and center of die contact

e

D

G

S

VGS = 0V

V

= 25V

DS

ƒ = 1.0MHz

VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

V

= 0V, VDS = 44V, ƒ = 1.0MHz

GS

V

= 0V, VDS = 0V to 44V

GS

f

Conditions

MOSFET symbol

showing the integral reverse

p-n junction diode. T

= 25°C, IS = 36A, VGS = 0V

J

TJ = 25°C, IF = 36A, VDD = 28V di/dt = 100A/μs

e

2 www.irf.com

IRLR/U2905Z

1000

) A

( t n e

r

100

u C e

c

r u o S

o

t

-

10

n

i a

r D

,

D

I

1

0.1 1 10 100

3.0V

≤

Tj = 25°C

TOP 10V

BOTTOM 3.0V

60μs PULSE WIDTH

VDS, Drain-to-Source Voltage (V)

1000.0

VGS

9.0V

7.0V

5.0V

4.5V

4.0V

3.5V

1000

) A

( t n e

r

100

u C e

c

r u o S

o

t

-

10

n

i a

r D

,

D

I

3.0V

≤

TOP 10V

BOTTOM 3.0V

60μs PULSE WIDTH

Tj = 175°C

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

60

VGS

9.0V

7.0V

5.0V

4.5V

4.0V

3.5V

DS

TJ = 25°C

TJ = 175°C

= 8.0V

)

Α

(

t n e

r

100.0

u C e

c

r u o S

o

t

-

10.0

n

i a

r D

,

D

I

1.0

2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0

V

= 10V

DS

≤

60μs PULSE WIDTH

VGS, Gate-to-Source Voltage (V)

TJ = 25°C

TJ = 175°C

) S

(

50

e c n a

t c

40

u d n o c s

30

n a

r T

d

r a

20

w

r o F , s

10

f G

V

380μs PULSE WIDTH

0

0 1020304050

ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics

Fig 4. Typical Forward Transconductance

Vs. Drain Current

www.irf.com 3

IRLR/U2905Z

2500

2000

) F p

(

1500

e c n a

t

i c a p

1000

a C

, C

500

0

1 10 100

V

= 0V, f = 1 MHZ

GS

C

= C

gs

gd

ds

Ciss

Coss

Crss

+ Cgd, C

+ C

iss

C

rss

C

oss

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000.0

) A

( t

100.0

n e

r

r u

C n

i a

r

10.0

D e

s

r e v e

R ,

D S

I

TJ = 175°C

TJ = 25°C

1.0

0.1

0.2 0.6 1.0 1.4 1.8 2.2

VSD, Source-to-Drain Voltage (V)

12

SHORTED

ds

gd

ID= 36A

) V

10

( e

g a

t

l o

8

V e

c

r u

6

o S

o

t

e

t

4

a G

,

S G

2

V

0

0 1020304050

VDS= 44V

VDS= 28V VDS= 11V

Q

Total Gate Charge (nC)

G

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

V

GS

= 0V

1000

) A

( t

100

n e

r

r u

C e

c

r u

10

o S

o

t

n

i a

r D

1

,

D

I

Tc = 25°C Tj = 175°C Single Pulse

0.1 1 10 100 1000

OPERATION IN THIS AREA LIMITED BY RDS(on)

V

, Drain-toSource Voltage (V)

DS

100μsec

1msec

10msec

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

IRLR/U2905Z

τ

60

LIMITED BY PACKAGE

50

) A

(

40

t n e

r

r u

C

30

n

i a

r D

,

20

D

I

10

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Fig 9. Maximum Drain Current Vs.

Case Temperature

10

2.0

e c n a

t s

i s e

R n O

)

e

d

c

e

r

z

u

i

l

o

a

S

-

m

r

o

t

o

n

N

i

( a

r D

,

) n o

( S D

R

ID = 30A

V

= 5.0V

GS

1.5

1.0

0.5

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

Fig 10. Normalized On-Resistance

Vs. Temperature

)

C

1

J h

t

Z (

e s n o p s e

R l a

m

r e h T

0.001

D = 0.50

0.20

0.1

0.10

0.05

τ

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

1E-006 1E-005 0.0001 0.001 0.01

J

τ

J

τ

1

τ

1

Ci= τi/Ri

R

1

2

R

1

2

τ

2

τ

2

Ri (°C/W) τi (sec)

τ

C

0.765 0.000269

0.6141 0.001614

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRLR/U2905Z

A

15V

L

D.U.T

I

AS

0.01

t

p

Ω

R

V

20V

V

DS

G

GS

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

DRIVER

+

-

V

DD

240

) J

m

( y

200

g

r e n E

e

160

h c n a

l a v

120

A e

s

l u P

80

e

l g n

i S

40

, S A

E

0

25 50 75 100 125 150 175

I

TOP

6.2A

BOTTOM

Starting TJ, Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

D

4.3A

36A

10 V

Q

GS

V

G

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

.2μF

12V

V

GS

Fig 13b. Gate Charge Test Circuit

Q

GD

Charge

50KΩ

.3μF

D.U.T.

3mA

I

G

Current Sampling Resistors

3.0

) V

( e

g

2.5

a

t

l o V

d

l o h s

2.0

e

r h

t e

t a

G

) h

1.5

t

( S G

+

V

DS

-

V

1.0

-75 -50 -25 0 25 50 75 100 125 150 175

ID = 250μA

TJ , Temperature ( °C )

I

D

Fig 14. Threshold Voltage Vs. Temperature

6 www.irf.com

IRLR/U2905Z

1000

Duty Cycle = Single Pulse

100

) A

( t n e

r

r u

C

10

e h c n a

l a v A

1

0.1

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02

0.01

0.05

0.10

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

Allowed avalanche Current vs avalanche pulsewidth, tav assuming ΔTj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax

60

TOP Single Pulse

50

) J

m

( y

g

40

r e n E

e h

30

c n a

l a v

20

A ,

R A

E

10

BOTTOM 1% Duty Cycle ID = 36A

Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T

. This is validated for

jmax

every part type.

2. Safe operation in Avalanche is allowed as long asT

jmax

not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. P

= Average power dissipation per single

D (ave)

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ΔT = Allowable rise in junction temperature, not to exceed

T

(assumed as 25°C in Figure 15, 16).

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Fig 16. Maximum Avalanche Energy

Vs. Temperature

jmax

t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see figure 11)

thJC

P

= 1/2 ( 1.3·BV·Iav) = DT/ Z

D (ave)

I

2DT/ [1.3·BV·Zth]

av =

E

AS (AR)

= P

·f

av

D (ave)·tav

thJC

www.irf.com 7

is

IRLR/U2905Z





Reverse Recovery Current

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

V

DD

Re-Applied Voltage

+

-

Period

P.W.

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

R

D.U.T.

D

+

V

DD

-

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 18b. Switching Time Waveforms

8 www.irf.com

D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

IRLR/U2905Z

2.38 (.094)

2.19 (.086)

10.42 (.410)

9.40 (.370)

NOTES:

1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.

2 CONTROLLING DIMENSION : INCH.

3 CONFORMS TO JEDEC OUTLINE TO-252AA.

4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

5.46 (.215)

5.21 (.205)

1.02 (.040)

1.64 (.025)

1.52 (.060)

1.15 (.045)

1.14 (.045)

2X

0.76 (.030)

2.28 (.090)

6.73 (.265)

6.35 (.250)

- A -

4

1 2 3

1.27 (.050)

0.88 (.035)

6.22 (.245)

5.97 (.235)

- B -

0.89 (.035)

3X

0.64 (.025)

0.25 (.010) M A M B

4.57 (.180)

D-Pak (TO-252AA) Part Marking Information

Notes : T hi s part mar k i ng infor mati on appli es to devices pr oduced before 02/26 /20 0 1

EXAMPLE:

THIS IS AN IRFR120 WIT H AS S E MB LY LOT CODE 9U1P

INTERNAT IONAL

RECTIF IER

LOGO

ASSEMBLY LOT CODE

IRFU120

016

9U 1P

1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

0.51 (.020) MIN.

0.58 (.023)

0.46 (.018)

LEAD ASSIGNMENTS

1 - GATE

2 - DRAIN

3 - SOURCE

4 - DRAIN

DAT E CODE YEAR = 0 WEEK = 16

Notes : This part marking information applies to devices produced after 02/26/2001

EXAMPLE:

THIS IS AN IRFR120 WIT H AS S E MB LY

LOT CODE 1234 ASS EMBLED ON WW 16, 1999 IN THE AS SEMBLY LINE "A"

INTERNAT IONAL

RECTIF IER

LOGO

AS S E M B L Y LOT CODE

IRFU120

916A

PAR T NUMB ER

DATE CODE

3412

YEAR 9 = 1999 WE EK 16 LINE A

www.irf.com 9

IRLR/U2905Z

I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

5.46 (.215)

5.21 (.205)

1.52 (.060)

1.15 (.045)

- B -

2.28 (.090)

1.91 (.075)

1.14 (.045)

3X

0.76 (.030)

2.28 (.090)

6.73 (.265)

6.35 (.250)

- A -

4

1 2 3

3X

2X

1.27 (.050)

0.88 (.035)

6.22 (.245)

5.97 (.235)

9.65 (.380)

8.89 (.350)

0.89 (.035)

0.64 (.025)

0.25 (.010) M A M B

2.38 (.094)

2.19 (.086)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

NOTES:

1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.

2 CONTROLLING DIMENSION : INCH.

3 CONFORMS TO JEDEC OUTLINE TO-252AA.

4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018)

I-Pak (TO-251AA) Part Marking Information

Notes : T hi s part mar k i ng i nfor mati on applies to devices produced befor e 02/26 /2001

LEAD ASSIGNMENTS

1 - GATE

2 - DRAIN

3 - SOURCE

4 - DRAIN

EXAMPLE:

THIS IS AN IRFR 120 WITH ASSEMBLY LOT CODE 9U1P

INTERNAT IONAL

RECTIF IER

LOGO

AS S E M B L Y LOT CODE

IRF U120

016

9U 1P

DATE CODE YEAR = 0 WE EK = 1 6

Notes : This part marking information applies to devices produced after 02/26/2001

EXAMPLE:

THIS IS AN IRFR 120 WITH ASSEMBLY LOT CODE 5678 ASS EMBL E D ON WW 19, 1999 IN T HE ASS EMBLY LINE "A"

INTERNAT IONAL

RECTIF IER

LOGO

AS S E MB L Y LOT CODE

IRF U120

56

919A

78

PAR T NUMBER

DATE CODE YEAR 9 = 1999 WE E K 1 9 LINE A

10 www.irf.com

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TR

TRR

IRLR/U2905Z

TRL

12.1 ( .476 )

11.9 ( .469 )

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

FEED DIRECTION

Notes:

Repetitive rating; pulse width limited by



max. junction temperature. (See fig. 11).

 Limited by T

RG = 25Ω, I

, starting TJ = 25°C, L = 0.089mH

Jmax

= 36A, VGS =10V. Part not

AS

recommended for use above this value.

 Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

16.3 ( .641 )

15.7 ( .619 )

 C

as C  Limited by T

8.1 ( .318 )

7.9 ( .312 )

16 mm

eff. is a fixed capacitance that gives the same charging time

oss

while V

is rising from 0 to 80% V

DS

, see Fig.12a, 12b, 15, 16 for typical repetitive

Jmax

16.3 ( .641 )

15.7 ( .619 )

FEED DIRECTION

DSS

.

avalanche performance.  This value determined from sample failure population. 100% tested to this value in production.  When mounted on 1" square PCB (FR-4 or G-10 Material) .

For recommended footprint and soldering techniques refer to

application note #AN-994

 R

is measured at TJ approximately 90°C

θ

Data and specifications subject to change without notice.

This product has been designed for the Automotive [Q101] market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.8/09

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