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PD- 91334E
IRLR/U2905
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Ultra Low On-Resistance
l Surface Mount (IRLR2905)
l Straight Lead (IRLU2905)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
G
D
V
= 55V
DSS
R
S
= 0.027Ω
DS(on)
ID = 42A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per
silicon area. This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for
D - Pak
TO -252AA
I-P a k
TO-251AA
through-hole mounting applications. Power dissipation levels up to 1.5 watts
are possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 42
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 30 A
I
DM
PD @TC = 25°C Power Dissipation 110 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 160
Linear Derating Factor 0.71 W/°C
Gate-to-Source Voltage ± 16 V
Single Pulse Avalanche Energy 210 mJ
Avalanche Current 25 A
Repetitive Avalanche Energy 11 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
R
θJA
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Junction-to-Case ––– 1.4
Case-to-Ambient (PCB mount)** ––– 50 °C/W
Junction-to-Ambient ––– 110
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IRLR/U2905
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0. 070 ––– V/°C Reference to 25°C, ID = 1mA
J
––– ––– 0.027 VGS = 10V, ID = 25A
Static Drain-to-Source On-Resistance
––– ––– 0.030 W VGS = 5.0V, ID = 25A
––– ––– 0.040 VGS = 4.0V, ID = 21A
Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 21 –– – –– – S VDS = 25V, ID = 25A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
VDS = 55V, VGS = 0V
µA
VGS = 16V
nA
Total Gate Charge ––– ––– 48 ID = 25A
Gate-to-Source Charge ––– ––– 8.6 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 25 VGS = 5.0V, See Fig. 6 and 13
Turn-On Delay Time ––– 11 ––– VDD = 28V
Rise Time ––– 84 –– –
Turn-Off Delay Time ––– 26 ––– RG = 3.4Ω, VGS = 5.0V
ns
ID = 25A
Fall Time ––– 15 –– – RD = 1.1Ω, See Fig. 10
Internal Drain Inductance ––– 4.5 –––
Internal Source Inductance –– – 7.5 –––
Between lead,
nH
6mm (0.25in.)
from package
and center of die contact
Input Capacitance ––– 1700 ––– VGS = 0V
Output Capacitance ––– 400 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
42
160
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 25A, VGS = 0V
Reverse Recovery Time ––– 80 120 ns TJ = 25°C, IF = 25A
Reverse RecoveryCharge ––– 210 320 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
= 25V, starting TJ = 25°C, L =470µH
DD
RG = 25Ω, I
I
≤ 25A, di/dt ≤ 270A/µs, V
SD
= 25A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
,
Caculated continuous current based on maximum allowable
junction temperature; Package limitation current = 20A.
This is applied for I-PAK, L
of D-PAK is measured between
S
lead and center of die contact.
Uses IRLZ44N data and test conditions.
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
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D
S
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IRLR/U2905
)
A
)
A
A
A
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
T = 25°C
1
0.1 1 10 100
V , Dra in-t o-Sou rc e Voltage (V
DS
1000
J
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
T = 175°C
1
0.1 1 10 100
V , Dra in-t o-Sou rc e Voltage (V
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I = 41 A
D
2.5
T = 25°C
GS
J
T = 175°C
J
V = 25V
DS
20µs PULSE WIDTH
100
10
D
I , Dra in-to -S o urc e C u rre nt (A )
1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
V , G a te-to -So u rce V o ltage (V)
Fig 3. Typical Transfer Characteristics
2.0
1.5
(N ormali z ed)
1.0
0.5
DS (on)
R , D ra in-to -S o u rc e O n R e s is ta nc e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
V = 10 V
GS
Vs. Temperature
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IRLR/U2905
)
A
g
g
g
)
A
)
A
)
A
g
2800
2400
2000
1600
1200
C, Capacitance (pF)
800
400
0
1 10 100
V = 0V , f = 1 M Hz
GS
C = C + C , C S H O RTE D
is s
C = C
C = C + C
C
iss
C
oss
C
rss
V , Drain -to -Sou rc e Voltage (V
DS
s gd ds
d
rs s
oss ds
d
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
15
I = 25 A
V , G a te -to -S o u rc e Vo ltag e (V)
12
GS
D
9
6
3
V = 44 V
DS
V = 28 V
DS
FOR TEST CIRCU IT
0
0 10203040506070
Q , T o ta l Gate Cha rge (nC
G
SE E F IG U R E 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OP ER A TION IN TH IS A REA LIMITE D
BY R
DS(on)
100
T = 175°C
J
T = 25 °C
SD
I , R ev er se D r a in Curre nt (A)
10
0.4 0.8 1.2 1.6 2.0 2.4
V , Source-to-Drain Voltage (V
SD
J
V = 0V
Fig 7. Typical Source-Drain Diode
GS
100
10
D
I , Drain Current (A)
T = 25 °C
C
T = 17 5 °C
J
Sin
le Puls e
1
1 10 100
V , Dra in-t o-Sou rc e Voltage (V
DS
Fig 8. Maximum Safe Operating Area
10µs
100µs
1ms
10ms
Forward Voltage
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50
(
)
LIMITED BY PACKAGE
40
30
20
D
I , Drain Current (A)
10
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
IRLR/U2905
R
D.U.T.
t
d(off)tf
D
V
DS
V
GS
R
G
5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
Fig 10b. Switching Time Waveforms
+
V
DD
-
10
thJC
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1
SINGLE PULSE
THERMAL RESPONSE
t , Rectangular Pulse Duration (sec)
1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
P
DM
t
1
1 2
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRLR/U2905
A
A
)
15V
DRIVER
+
-
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
500
400
300
200
100
AS
V = 25 V
E , S ingle Pu lse A valanc he E n ergy (m J)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C
J
I
TOP 10A
17 A
BOTTO M 25A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
+
V
-
D
Fig 13b. Gate Charge Test Circuit
DS
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Page 7
IRLR/U2905
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
+
-
VGS=10V
V
DD
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFETS
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IRLR/U2905
A
P ackage Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
- A -
5.46 (.215)
5.21 (.205)
4
6.22 (.245)
1.02 (.04 0)
1.64 (.02 5)
1.52 (.060)
1.15 (.045)
1.14 (.045)
2X
0.76 (.030)
2.28 (.090)
1 2 3
5.97 (.235)
0.89 (.035 )
3X
0.64 (.025 )
0.25 (.010) M A M B
4.57 (.180)
P art Marking Inf ormation
TO-252AA (D-PARK)
- B -
1.27 (.050)
0.88 (.035)
2.38 (.09 4)
2.19 (.08 6)
10.42 (.410 )
9.40 (.370)
NOTES:
1 DIMEN S ION ING & TOLE R ANC ING PER ANSI Y14.5M, 1982 .
2 CONTROLLING DIMENSION : INCH.
3 CON FORM S TO JE DEC O UT LINE TO-2 52 AA.
4 DIMENSIONS SHOW N A RE BEFORE SOLDER DIP,
SOLDER DIP MA X. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
0.51 (.020)
M IN.
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - G AT E
2 - D RAIN
3 - S OURCE
4 - D RAIN
EXAMPLE : THIS IS AN IRFR120
W ITH ASSEMBLY
LO T CO D E 9 U 1P
INTERNATIO NAL
REC TIF IE R
L O G O
IRFR
120
FIRST PORTION
OF PART NUMBER
9U 1P
ASSEMBLY
LOT COD E
SECOND PORTION
OF PART NUMBER
8 www.irf.com
Page 9
Pac kage Outline
R
TO-251AA Outline
Dimensions are shown in millimeters (inches)
IRLR/U2905
6.73 (.265)
6.35 (.250)
5.46 (.215)
5.21 (.205)
1.52 (.060)
1.15 (.045)
- B -
2.28 (.090)
1.91 (.075)
1.14 (.045)
3X
0.76 (.030)
2.28 (.090)
- A -
4
1 2 3
3X
2X
1.27 (.050)
0.88 (.035)
6.22 (.245)
5.97 (.235)
9.65 (.380)
8.89 (.350)
0.89 (.035)
0.64 (.025)
0.25 ( .010) M A M B
Part Marking Information
TO-251AA (I-PARK)
2.38 (.094)
2.19 (.086)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 C O NFOR MS TO JEDEC O UTLINE TO -25 2A A.
4 D IM EN SION S SHO W N A R E BE FO RE SO LDE R D IP ,
S O LD E R DIP MAX. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMEN TS
1 - G A T E
2 - D R A IN
3 - SOURCE
4 - D R A IN
EXA M P LE : THIS IS AN IRF U 12 0
WITH ASSEMBLY
LO T CO D E 9U 1 P
INTERNATIONAL
REC TIF IE R
LOGO
IR FU
120
FIR S T PO R TIO N
OF PART N UM BE
9U 1P
ASSEMBLY
LOT CO D E
SECOND PORTION
OF PART NUMBER
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IRLR/U2905
Tape & Reel Information
TO-252AA
Dimensions are shown in millimeters (inches)
TR
1 6 .3 ( .6 4 1 )
1 5 .7 ( .6 1 9 )
12.1 ( .476 )
11.9 ( .469 )
NOT ES :
1. CO NTRO LLING DIMENSIO N : MILLIMET ER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OU TL INE C O N F O R MS TO E IA-481 & EIA-541.
13 INCH
FEED DIRECTION
8.1 ( .318 )
7.9 ( .312 )
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
FEED DIRECTION
16 m m
NOTES :
1. OUTL INE C O N FOR MS T O E IA-48 1.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 12/00
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