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PD- 91363E
IRLR024N
IRLU024N
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Surface Mount (IRLR024N)
l Straight Lead (IRLU024N)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
G
D
V
= 55V
DSS
R
S
DS(on)
ID = 17A
= 0.065Ω
Description
Fifth Generation HEXFET® Power MOSFETs from International Rectifier
utilize advanced processing techniques to achieve the lowest possible onresistance per silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient device for use in
a wide variety of applications.
The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for
through-hole mounting applications. Power dissipation levels up to 1.5 watts
are possible in typical surface mount applications.
D-Pak I-Pak
IRLR024N IRLU024N
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 17
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 12 A
I
DM
PD @TC = 25°C Power Dissipation 45 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 72
Linear Derating Factor 0.3 W/°C
Gate-to-Source Voltage ± 16 V
Single Pulse Avalanche Energy 68 mJ
Avalanche Current 11 A
Repetitive Avalanche Energy 4.5 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
R
θJA
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Junction-to-Case ––– 3.3
Case-to-Ambient (PCB mount)** ––– 50 °C/W
Junction-to-Ambient ––– 110
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IRLR/U024N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0. 061 ––– V/°C Reference to 25°C, ID = 1mA
J
––– ––– 0.065 VGS = 10V, ID = 10A
Static Drain-to-Source On-Resistance
––– ––– 0.080 Ω VGS = 5.0V, ID = 10A
––– ––– 0.110 VGS = 4.0V, ID = 9.0A
Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 8.3 ––– ––– S VDS = 25V, ID = 11A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
VDS = 55V, VGS = 0V
µA
VGS = 16V
nA
Total Gate Charge ––– ––– 15 ID = 11A
Gate-to-Source Charge ––– ––– 3.7 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 8.5 VGS = 5.0V, See Fig. 6 and 13
Turn-On Delay Time ––– 7.1 ––– VDD = 28V
Rise Time ––– 74 –––
Turn-Off Delay Time ––– 20 –– – RG = 12Ω, VGS = 5.0V
ns
ID = 11A
Fall Time ––– 29 ––– RD = 2.4Ω, See Fig. 10
Internal Drain Inductance ––– 4.5 –––
Internal Source Inductance –– – 7.5 –––
Between lead,
nH
6mm (0.25in.)
from package
and center of die contact
Input Capacitance ––– 480 ––– VGS = 0V
Output Capacitance ––– 130 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 61 ––– ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
17
72
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V
Reverse Recovery Time ––– 60 9 0 ns TJ = 25°C, IF = 11A
Reverse RecoveryCharge ––– 130 200 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
V
= 25V, starting TJ = 25°C, L = 790µH
DD
RG = 25Ω, I
I
≤ 11A, di/dt ≤ 290A/µs, V
SD
= 11A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
,
This is applied for I-PAK, L
of D-PAK is measured between
S
lead and center of die contact
Uses IRLZ24N data and test conditions.
TJ ≤ 175°C
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D
S
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IRLR/U024N
)
A
)
A
)
A
A
100
VGS
TOP 15V
12V
10V
8.0 V
6.0 V
4.0 V
3.0 V
BOTTOM 2.5V
10
1
D
I , D ra in-to -Sou rc e C u rre nt ( A )
2.5V
20µs PULSE WIDTH
T = 2 5°C
0.1
0.1 1 10 100
V , Drain-to-Source Voltage (V
DS
100
T = 25°C
J
10
J
T = 175°C
J
100
VGS
TOP 15V
1 2V
1 0V
8 .0V
6 .0V
4 .0V
3 .0V
BOTTOM 2.5V
10
2.5V
1
D
I , D rain -to -S o u rc e Cu rre n t (A )
20µs PULSE WIDTH
T = 175°C
0.1
0.1 1 10 100
V , Dra in -to -So u rc e V o ltage (V
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I = 1 8A
17 A
D
2.5
2.0
1.5
1
D
I , Dra in-to- So u rce C urre n t (A)
0.1
2345678910
V , Gate -to-S o urce Vo ltage (V
GS
V = 15V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
(Norm alized)
1.0
0.5
DS(on)
R , Drain -to -Sou rc e O n Res is tan c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , J unc tion T emp e rature (°C )
J
Fig 4. Normalized On-Resistance
V = 1 0 V
GS
Vs. Temperature
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IRLR/U024N
)
A
g
g
g
)
A
)
A
)
A
g
800
600
400
V = 0V, f = 1MHz
GS
C = C + C , C S H O RT E D
is s
C = C
C = C + C
C
iss
C
oss
s gd d s
rss
d
oss ds
d
C, Capacitance (pF)
200
C
rss
0
1 10 100
V , Dra in -to -S our c e V o ltage (V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
15
I = 11 A
V , G a te-to -S o u rc e Vo ltag e (V )
12
GS
D
9
6
3
V = 4 4 V
DS
V = 2 8 V
DS
FOR TEST C IRCUIT
0
0 4 8 12 16 20
Q , T ota l Ga te Ch a rge (nC
G
SEE FIG URE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OP E R A T ION IN TH IS A R E A LIM ITE D
BY R
DS (on)
T = 175°C
J
10
SD
I , Re v ers e D ra in Curre n t (A )
1
0.4 0.8 1.2 1.6 2.0
V , So u rc e-to -Dra in Vo ltage (V
SD
T = 25°C
J
V = 0V
Fig 7. Typical Source-Drain Diode
GS
100
10
D
I , D rain C urrent (A )
T = 2 5°C
C
T = 175°C
J
Sin
le P u ls e
1
1 10 100
V , D ra in- to-S o ur ce V o ltage (V
DS
Fig 8. Maximum Safe Operating Area
10µs
100µs
1ms
10ms
Forward Voltage
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IRLR/U024N
R
D.U.T.
D
+
V
DD
-
20
15
V
DS
V
GS
R
G
5V
10
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
I , Drain Current (A)
5
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
Fig 9. Maximum Drain Current Vs.
°
10%
V
GS
t
d(on)tr
t
d(off)tf
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
thJC
1
0.20
0.10
0.05
0.02
0.01
0.1
Thermal Response (Z )
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SING L E PU L SE
(THE RMAL RESPONSE)
Notes:
1. Duty fac tor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J
DM
P
12
thJC
DM
t
1
t
2
C
A
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLR/U024N
A
A
)
15V
DRIVER
+
-
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
140
120
100
80
60
40
20
AS
V = 25 V
E , S ingle Pu lse A valanc he E n ergy (m J)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C
J
I
TOP 4.5A
7.8 A
BOTTO M 11A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
+
V
-
D
Fig 13b. Gate Charge Test Circuit
DS
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IRLR/U024N
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
+
-
VGS=10V
V
DD
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
Fig 14. For N-Channel HEXFET
V
I
SD
®
MOSFETs
DD
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IRLR/U024N
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
5.46 (.215)
5.21 (.205)
1.02 (.04 0)
1.64 (.02 5)
1.52 (.060)
1.15 (.045)
1.14 (.045)
2X
0.76 (.030)
2.28 (.090)
6.73 (.265)
6.35 (.250)
- A -
4
1 2 3
1.27 (.050)
0.88 (.035)
6.22 (.245)
5.97 (.235)
- B -
0.89 (.035 )
3X
0.64 (.025 )
0.25 (.010) M A M B
4.57 (.180)
2.38 (.09 4)
2.19 (.08 6)
10.42 (.410 )
9.40 (.370)
NOTES:
1 DIME N SIONING & T O LER ANCING P ER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 C ONFO RMS TO JE DEC O U T LIN E TO-2 52AA .
4 DIMENSIONS SHOW N A RE BEFORE SOLDER DIP,
SOLD E R D IP M AX. +0.16 (.0 06).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
0.51 (.020)
M IN .
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - GA TE
2 - D R AIN
3 - S O U R CE
4 - D R AIN
D-Pak (TO-252AA) Part Marking Information
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Page 9
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
IRLR/U024N
5.46 (.215)
5.21 (.205)
1.52 (.060)
1.15 (.045)
- B -
2.28 (.090)
1.91 (.075)
1.14 (.045)
3X
0.76 (.030)
2.28 (.090)
2X
6.73 (.265)
6.35 (.250)
- A -
4
1 2 3
1.27 (.050)
0.88 (.035)
6.22 (.245)
5.97 (.235)
9.65 (.380)
8.89 (.350)
0.89 (.035)
3X
0.64 (.025)
0.25 (.010) M A M B
2.38 (.094)
2.19 (.086)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CO NTR O LLING DIME N SION : IN C H .
3 CO NFORM S T O J EDEC OUT LIN E T O- 252A A .
4 DIMENSIO N S SHOW N AR E B EFO R E S OLD ER DIP,
S O LDER D IP MA X. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - G AT E
2 - D RAIN
3 - S OURC E
4 - D RAIN
I-Pak (TO-251AA) Part Marking Information
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IRLR/U024N
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
1 6 .3 ( .6 4 1 )
1 5 .7 ( .6 1 9 )
12.1 ( .47 6 )
11.9 ( .46 9 )
NOT ES :
1. CO NTRO LLING DIMENSIO N : MILLIMET ER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OU TL INE C O N F O R MS T O E IA-481 & EIA-541.
13 IN CH
FEED DIRECTION
8.1 ( .318 )
7.9 ( .312 )
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
FEED DIRECTION
16 m m
NOTES :
1. OU TL INE CONFO R MS T O E IA - 4 8 1.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
Data and specifications subject to change without notice. 2/10
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