Datasheet irlp3803 Datasheet

PD - _____

PRELIMINARY

IRLP3803

HEXFET® Power MOSFET

Logic-Level Gate Drive
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated

Description

Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.

The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because of its isolated mounting
hole.

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 120
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 83 A
I

DM

PD @TC = 25°C Power Dissipation 150 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt 1.8 V/ns
T

J

T

STG

Pulsed Drain Current  470

Linear Derating Factor 1.0 W/°C
Gate-to-Source Voltage ±20 V
Single Pulse Avalanche Energy 610 mJ
Avalanche Current 71 A
Repetitive Avalanche Energy 15 mJ

Operating Junction and -55 to + 175
Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Mounting torque, 6-32 or M3 screw. 10 lbf•in (1.1N•m)

V

DSS

R

DS(on)

ID = 120A

= 30V

= 0.006Ω

Thermal Resistance

R

θJC

R

θCS

R

θJA

Junction-to-Case –––– –––– 1.0
Case-to-Sink, Flat, Greased Surface –––– 0.24 –––– °C/W
Junction-to-Ambient –––– –––– 40

Parameter Min. Typ. Max. Units

8/4/95

IRLP3803

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance

––– ––– 0.006 VGS = 10V, ID = 71A
––– ––– 0.011 VGS = 4.5V, ID = 59A

Ω

Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 55 ––– ––– S VDS = 25V, ID = 71A

Drain-to-Source Leakage Current

Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V

––– ––– 25 VDS = 30V, VGS = 0V
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C

µA

nA

Total Gate Charge ––– ––– 140 ID = 71A
Gate-to-Source Charge ––– ––– 41 nC VDS = 24V
Gate-to-Drain ("Miller") Charge ––– ––– 78 VGS = 4.5V, See Fig. 6 and 13
Turn-On Delay Time ––– 14 ––– VDD = 15V
Rise Time ––– 230 ––– ID = 71A
Turn-Off Delay Time ––– 29 ––– RG = 1.3Ω, VGS = 4.5V

ns
Fall Time ––– 35 ––– RD = 0.20Ω, See Fig. 10
Internal Drain Inductance ––– 5.0 –––

Internal Source Inductance ––– 13 –––

Between lead,
6mm (0.25in.)

nH

from package

and center of die contact
Input Capacitance ––– 5000 ––– VGS = 0V
Output Capacitance ––– 1800 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 880 ––– ƒ = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

V

DD

RG = 25Ω, I

I

SD

TJ ≤ 175°C

Continuous Source Current MOSFET symbol
(Body Diode) showing the
Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.

––– ––– 120

––– ––– 470

Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 71A, VGS = 0V
Reverse Recovery Time ––– 120 180 ns TJ = 25°C, IF = 71A
Reverse RecoveryCharge ––– 450 680 nC di/dt = 100A/µs

Pulse width ≤ 300µs; duty cycle ≤ 2%.

= 15V, starting TJ = 25°C, L = 180µH

= 71A. (See Figure 12)

AS

≤ 71A, di/dt ≤ 130A/µs, V

DD

≤ V

(BR)DSS

,

Caculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4

A

IRLP3803

A

A

A

A

10000

VGS
TOP 15V
12V
10V

8.0V

1000

6.0V

4.0V

3.0V
BOTTOM 2.0V

100

10

1

D

0.1

I , Drain-to-Source Current (A)

0.01

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

2.0V

20µs PULSE WIDTH
T = 25°C

J

Fig 1. Typical Output Characteristics,

TJ = 25oC

1000

T = 25°C

J

T = 175°C

100

J

10000

VGS
TOP 15V
12V
10V

8.0V

1000

6.0V

4.0V

3.0V
BOTTOM 2.0V

100

10

1

D

0.1

I , Drain-to-Source Current (A)

2.0V

20µs PULSE WIDTH
T = 175°C

0.01

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

J

Fig 2. Typical Output Characteristics,

TJ = 175oC

2.0

I = 120A

D

1.5

10

1

0.1

D

I , Drain-to-Source Current (A)

0.01

2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0

V , Gate-to-Sourc e Voltage (V)

GS

V = 25V

DS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

1.0

(Normalized)

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature (°C)

J

Fig 4. Normalized On-Resistance

Vs. Temperature

V = 10V

GS

IRLP3803

A

A

A

A

10000

8000

6000

4000

C, Capacitance (pF)

2000

0

1 10 100

V = 0V, f = 1MHz

GS

C = C + C , C SHORTED

iss gs gd ds

C = C

rss gd

C

iss

C = C + C

oss ds gd

C

oss

C

rss

V , Drain-to-Source Voltage (V)

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

15

I = 71A

D

12

9

6

3

GS

V , Gate-to-Source Voltage (V)

V = 24V

DS

V = 15V

DS

FOR TEST CIRCUIT

0

0 40 80 120 160 200

Q , Total Gate Charge (nC)

G

SEE FIGURE 13

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

OPERATION IN THIS AREA LIMITED
BY R

DS(on)

10µs

T = 175°C

J

100

T = 25°C

J

SD

I , Reverse Drain Current (A)

10

0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2

V , Source-to-Drain Voltage (V)

SD

V = 0V

Fig 7. Typical Source-Drain Diode

GS

100

D

I , Drain Current (A)

T = 25°C

C

T = 175°C

J

Single Pulse

10

1 10 100

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

100µs

1ms

10ms

Forward Voltage

120

A

A

100

LIMITED BY PACKAGE

IRLP3803

R

D.U.T.

D

V

DD

V

DS

V

GS

R

G

80

60

40

D

I , Drain Current (Amps)

20

0

25 50 75 100 125 150 175

T , Case Temperature (°C)

C

Fig 9. Maximum Drain Current Vs.

Case Temperature

10

thJC

1

D = 0.50

5.0V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

0.20

0.1

Thermal Response (Z )

0.01

0.10

0.05

0.02

0.01
SINGLE PULSE

(THERMAL RESPONSE)

0.00001 0.0001 0.001 0.01 0.1 1 10

t , Rectangular Pulse Duration (sec)

1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRLP3803

A

5.0 V

Fig 12a. Unclamped Inductive Test Circuit

Fig 12b. Unclamped Inductive Waveforms

1500

1200

900

600

300

AS

V = 15V

E , Single Pulse Avalanche Energy (mJ)

DD

0

25 50 75 100 125 150 175

Starting T , Junction Temperature (°C)

J

I
TOP 29A
50A
BOTTOM 71A

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

D

5.0 V

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

IRLP3803

Peak Diode Recovery dv/dt Test Circuit

D.U.T

R

G

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance
Current Transformer

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

V

DD

*

* V

= 5V for Logic Level Devices

GS

Fig 14. For N-Channel HEXFETS

IRLP3803

A

Package Outline

TO-247AC Outline

Dimensions are shown in millimeters (inches)

15.90 (.626)

15.30 (.602)

- B -

20.30 (.800)

19.70 (.775)

1 2

14.80 (.583)

14.20 (.559)

2.40 (.094)

2.00 (.079)
2X

5.45 (.215)
2X

3

3X

3.40 (.133)

3.00 (.118)

Part Marking Information

TO-247AC

EXAMPLE : THIS IS AN IRFPE30
WITH ASSEMB LY
LOT CODE 3A1Q

- A -

5.50 (.217)

2X

- C -

4.30 (.170)

3.70 (.145)

1.40 (.056)

1.00 (.039)

0.25 (.010)

3.65 (.143)

3.55 (.140)

0.25 (.010)

5.50 (.217)

4.50 (.177)

C A

M

MMB

INTERNATIONAL
RECTIFIER
LOGO

ASSEMBLY
LOT CODE

- D -

5.30 (.209)

D

S

4.70 (.185)

2.50 (.089)

1.50 (.059)
4

NOTES:

1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1 982.
2 CONTROLLING DIMENSION : INCH .
3 CONFORMS TO JEDEC OUTLINE
TO-247-AC.

0.80 (.031)

3X

0.40 (.016)

2.60 (.102)

2.20 (.087)

LEAD ASSIGNMENTS

1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN

PART NUMBER

IRFPE30

3A1Q 9302

DATE CODE
(YYWW)
YY = YEAR
WW WEEK

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: [phone]

EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: [phone]

IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: [phone] IR GERMANY: Saalburgstrasse 157,

61350 Bad Homburg Tel: [phone] IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: [phone] IR FAR EAST: K&H Bldg.,
2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: [phone] IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan
Boon Liat Building, 0316 Tel: [phone]

Data and specifications subject to change without notice.