Page 1
PD - 9.1413D
IRLMS5703
HEXFET® Power MOSFET
l Generation V Technology
l Micro6 Package Style
l Ultra Low Rds(on)
l P-Channel MOSFET
Description
Fifth Generation HEXFETs from International Rectifier
D
D
G
1
2
3
T op V iew
A
6
D
5
D
4
S
V
R
DS(on)
DSS
= -30V
= 0.20Ω
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The Micro6 package with its customized leadframe
produces a HEXFET power MOSFET with Rds(on)
60% less than a similar size SOT-23. This package is
ideal for applications where printed circuit board space
is at a premium. It's unique thermal design and R
DS(on)
Micro6
reduction enables a current-handling increase of nearly
300% compared to the SOT-23.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TA = 25°C Continuous Drain Current, VGS @ -10V -2.3
@ TA = 70°C Continuous Drain Current, VGS @- 10V -1.9 A
I
D
I
DM
PD @TA = 25°C Power Dissipation 1.7 W
V
GS
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J, TSTG
Pulsed Drain Current -13
Linear Derating Factor 13 mW/°C
Gate-to-Source Voltage ± 20 V
Junction and Storage Temperature Range -55 to + 150 °C
Thermal Resistance Ratings
Parameter Min. Typ. Max Units
R
Maximum Junction-to-Ambient –––
θ JA
–––
75 °C/W
8/25/97
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IRLMS5703
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆ V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage -30 ––– ––– V VGS = 0V, ID = -250µA
/∆ T
Breakdown Voltage Temp. Coefficient ––– 0.01 ––– V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance
––– ––– 0.20 V
––– ––– 0.40 VGS = -4.5V, ID = -0.80A
Ω
= -10V, ID = -1.6A
GS
Gate Threshold Voltage -1.0 ––– ––– V VDS = VGS, ID = -250µA
Forward Transconductance 1.1 ––– – –– S VDS = -10V, ID = -0.80A
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = 20V
––– ––– -1.0 V
––– ––– -25 VDS = -24V, VGS = 0V, TJ = 125°C
µA
nA
= -24V, VGS = 0V
DS
= -20V
GS
Total Gate Charge ––– 7.2 11 ID = -1.6A
Gate-to-Source Charge ––– 1.4 2.1 nC VDS = -24V
Gate-to-Drain ("Miller") Charge ––– 2.3 3.4 VGS = -10V, See Fig. 6 and 9
Turn-On Delay Time ––– 10 ––– VDD = -15V
Rise Time ––– 12 ––– ID = -1.6A
Turn-Off Delay Time ––– 20 ––– RG = 6.2Ω
ns
Fall Time ––– 8.4 ––– RD = 9.2Ω, See Fig. 10
Input Capacitance ––– 170 ––– VGS = 0V
Output Capacitance ––– 89 ––– pF VDS = -25V
Reverse Transfer Capacitance ––– 44 –– – ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
I
SD
TJ ≤ 150°C
Continuous Source Current MOSFET symbol
(Body Diode) showing the
Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
–––
–––
Diode Forward Voltage ––– ––– -1.2 V TJ = 25°C, IS = -1.6A, VGS = 0V
Reverse Recovery Time ––– 29 44 ns TJ = 25°C, IF = -1.6A
Reverse RecoveryCharge ––– 27 41 nC di/dt = -100A/µs
Pulse width ≤ 300µs; duty cycle ≤ 2%.
≤ -1.6A, di/dt ≤ -140A/µs, V
DD
≤ V
(BR)DSS
,
Surface mounted on FR-4 board, t ≤ 5sec.
–––
-1.7 –––
-13
D
A
G
S
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IRLMS5703
100
VGS
TOP - 15V
- 10V
- 7.0V
- 5.5V
- 4.5V
- 4.0V
- 3.5V
BOTT OM - 3.0V
10
1
-3.0V
D
-I , D r ain - to -S o u rce Cu rre n t (A )
20µs PULS E W I DT H
T = 25 °C
0.1
0.1 1 10
-V , D rain-to-Source Voltage (V)
DS
J
Fig 1. Typical Output Characteristics
100
100
VGS
TOP - 15V
- 10V
- 7.0V
- 5.5V
- 4.5V
- 4.0V
- 3.5V
BOTT OM - 3.0V
10
1
-3.0V
D
-I , Drain-to-So urce Curre nt (A)
20µs PULS E W I DT H
T = 150°C
A
0.1
0.1 1 10
-V , D rain-to-Source Voltage (V)
DS
J
A
Fig 2. Typical Output Characteristics
2.0
I = -1.6A
D
10
1
D
-I , Dr a in-to - So u r c e Curr e n t (A )
0.1
3.0 4.0 5.0 6.0 7.0 8.0
T = 25°C
J
T = 150°C
J
V = -1 0V
DS
20µs PULSE WIDTH
-V , G ate -to -Sou rc e V o l ta g e (V)
GS
Fig 3. Typical Transfer Characteristics
1.5
1.0
(No rm alized)
0.5
DS(on)
R , Drain -to -S ourc e O n R e sista n ce
A
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Ju nc tio n T em peratu r e (° C)
J
V = -1 0V
GS
A
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRLMS5703
350
300
250
200
150
C, C apac itance (pF)
100
50
0
1 10 100
V = 0V, f = 1 MHz
GS
C = C + C , C SH O RT ED
iss gs g d ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rss
-V , Drain -to-So urc e V oltag e (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
20
I = - 1.6A
D
V = - 2 4 V
DS
V = - 1 5 V
16
12
8
4
GS
DS
-V , Ga te-to- So u rce V oltag e (V )
FOR TEST CIRCUIT
A
0
024681 01 2
Q , Total G ate C ha rge (n C )
G
SEE FIGURE 9
A
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
O PERATIO N IN THIS A REA L IMITED
BY R
DS(on)
10
T = 150° C
J
T = 25 °C
J
1
SD
-I , R everse D ra in Current (A)
V = 0V
0.1
0.4 0.6 0.8 1.0 1.2 1.4
-V , S ource-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
10
100µs
1
D
-I , Drain C urren t (A )
T = 25°C
A
T = 150°C
J
A
Single Pulse
0.1
1 10 100
-V , D rain- to-Sourc e V olta ge ( V )
DS
1ms
10ms
A
Fig 8. Maximum Safe Operating Area
Page 5
-10V
IRLMS5703
R
D.U.T.
D
V
DD
V
Q
G
Q
GS
Q
GD
R
DS
V
GS
G
V
G
Charge
Current Regulator
Same Type as D.U.T.
50KΩ
.2µ F
12V
V
GS
.3µ F
D.U.T.
-3mA
I
G
Current Sampling Resistors
I
D
Fig 9b. Gate Charge Test Circuit
100
D = 0.50
10
0.20
0.10
0.05
thJA
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test CircuitFig 9a. Basic Gate Charge Waveform
t
d(on)tr
V
GS
10%
V
DS
+
90%
V
DS
t
d(off)tf
Fig 10b. Switching Time Waveforms
0.02
0.01
1
SINGLE PULSE
Thermal Response (Z )
0.1
0.00001 0.0001 0.001 0.01 0.1 1 10 100
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJA A
1 2
P
DM
t
1
t
2
Page 6
IRLMS5703
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
VGS*
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
**
• dv/dt controlled by R
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D =
G
P.W.
Period
+
VGS=10V
[ ] ***
*
V
DD
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 13. For P-Channel HEXFETS
di/dt
Diode Recovery
dv/dt
V
DD
[ ]
I
[ ]
SD
Page 7
Package Outline
Micro6 Outline
IRLMS5703
3.00 (.11 8 )
2.80 (.11 1 )
1.7 5 (.06 8 )
1.5 0 (.06 0 )
-A-
0.95 ( .0375 )
2X
1.30 (.051 )
0.90 (.036 )
-C-
NOTES :
1. D IM ENSIONING & TOLERANCING PER A NSI Y14.5M-1982.
2. CONTROLLING DIMENS ION : MILLIMETER.
3. D IM ENSIONS ARE S HOW N IN M ILLIMET ERS (INCHES).
6 5 4
1 2 3
0.15 (.006 )
M AX.
-B-
3.00 (.118 )
2.60 (.103 )
0.5 0 (.01 9 )
6X
0.3 5 (.01 4 )
0.15 (.006 ) M C A S B S
1.45 (.057 )
0.90 (.036 )
0.10 (.004 )
6 SURFACES
Part Marking Information
Micro6
LEAD ASSIGNMENTS RECO MMEN DED FOOTPRINT
O O
0 -10
2X 0.95 (.0375 )
2.20 (.087 )
0.60 (.023 )
0.10 (.004 )
6X 0.65 (.025 )
0.20 (.007 )
6X
0.09 (.004 )
DD
6 5 4
1 2 3
DD
S
G
6X (1.0 6 (.04 2 )
EXAMPLE : THIS IS AN IRLMS6702
PART NUMBER
TOP
WAFER LOT
NUMBER CODE
BOTTOM
PART NU MBER EXAMPLES:
2A = IRLM S 1902
2B = IRLM S 1503
2C = IRLM S6 702
2D = IRLM S5 703
DATE
CODE
DATE CODE EXAMPLES:
YW W = 9603 = 6C
YW W = 9632 = FF
YE AR Y W EEK W
2001 1 01 A
2002 2 02 B
2003 3 03 C
2004 4 04 D
2005 5
1996 6
1997 7
1998 8
1999 9
2000 0 24 X
25 Y
26 Z
W O R K W E E K = (1-2 6) IF PR EC ED ED BY L A ST D IGIT O F C ALE NDE R YE AR
W O RK W EE K = ( 27- 52 ) IF PR EC EDED BY A LET T E R
WORK
YEA R Y W EE K W
2001 A 27 A
2002 B 28 B
2003 C 29 C
2004 D 30 D
2005 E
1996 F
1997 G
1998 H
1999 J
2000 K 50 X
51 Y
52 Z
WORK
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IRLMS5703
Tape & Reel Information
Micro6
8mm
4mm
NOTES :
1. OUTLIN E CONFORM S TO EIA-481 & EIA-541 .
178.00
( 7.008 )
M A X .
NOTES:
1. CONTR OLLING D IMEN SION : MILLIM ETE R .
2. OUTLIN E C ONF OR M S TO EIA-481 & EIA-541.
FEED DIRECTION
9.90 ( .390 )
8.40 ( .331 )
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 8/97