Datasheet IRLM110A Datasheet (Fairchild Semiconductor)

Page 1
Advanced Power MOSFET
IRLM110A
FEATURES
ν Avalanche Rugged Technology ν Rugged Gate Oxide Technology ν Lower Input Capacitance ν Improved Gate Charge ν Extended Safe Operating Area ν Lower Leakage Current : 10 µA(Max.) @ V ν Lower R
: 0.336 Ω (Typ.)
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
V
I V E
I E
dv/dt
TJ, T
DSS
I
DM
AR
P
T
D
GS AS
AR
D
STG
L
Drain-to-Source Voltage Continuous Drain Current (T Continuous Drain Current (T
=25oC)
C
=70oC)
C
Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25oC) * Linear Derating Factor * Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds
DS
= 100V
(1)
(2) (1) (1)
(3)
BV
DSS
R
DS(on)
ID= 1.5 A
SOT-223
1
1. Gate 2. Drain 3. Source
100
1.5
1.18 12
±20
60
1.5
0.22
6.5
2.2
0.018
- 55 to +150
300
= 100 V
= 0.44 Ω
2
3
V A A
V
mJ
A
mJ
V/ns
W
W/
o
C
o
C
Thermal Resistance
Characteristic Max. UnitsSymbol Typ.
R
θJA
*
When mounted on the mi nimum pad size recommended (PCB Mount).
Junction-to-Ambient *
o
56.8--
C/W
Rev. A
Page 2
IRLM110A
N-CHANNEL
POWER MOSFET
Electrical Characteristics
CharacteristicSymbol
BV
∆BV/∆T
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
C
C
C
t
d(on)
t
d(off)
Q Q Q
Drain-Source Breakdown Voltage
DSS
Breakdown Voltage Temp. Coeff.
J
Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance
fs
Input Capacitance
iss
Output Capacitance
oss
Reverse Transfer Capacitance
rss
Turn-On Delay Time
t
Rise Time
r
Turn-Off Delay Time
t
Fall Time
f
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain (“Miller”) Charge
gd
(TC=25oC unless otherwise specified)
Max. UnitsTyp.Min. Test Condition
V
100
--
1.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.09
--
--
--
--
--
--
2.0
180
50 20
8 10 17
8
5.5
0.9
3.5
--
--
2.0
100
-100 1
100
0.44
--
235
65 25 25 30 45 25
8
--
--
V
V/oC
V
nA
µA
Ω
S
pF
ns
nC
=0V,ID=250µA
GS
I
=250µA See Fig 7
D
V
=5V,ID=250µA
DS
V
=20V
GS
V
=-20V
GS
VDS=100V VDS=80V,TC=125oC
=5V,ID=0.75A
V
GS
VDS=40V,ID=0.75A VGS=0V,VDS=25V,f =1MHz
VDD=50V,ID=5.6A, R
=12 Ω
G
VDS=80V,VGS=5V, I
=5.6A
D
See Fig 6 & Fig 12
See Fig 5
See Fig 13
(6)
(4)
(4)
(4)(5)
(4)(5)
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
① Repetitive Rating : Pulse Wi dth Lim i ted by Maximum Junction Temperature ② L=40mH, I ③ I ④ Pulse Test : Pulse Width = 250µs, Duty Cycle < ⑤ Essentially Independent of Operating Temperature
Continuous Source Current
S
Pulsed-Source Current Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
=1.5A, VDD=25V, RG=27Ω, Starting TJ =25oC
AS
< 5.6A, di/dt < 250A/μs, V
SD
DD
< BV
, Starting TJ =25oC
DSS
(1) (4)
2%
--
--
--
--
-­85
--
0.23
--
12
1.5
--
--
A
V ns µC
1.5
--
Integral reverse pn-diode in the MOSFET T
=25oC,IS=2.3A,VGS=0V
J
T
=25oC,IF=9.2A
J
di
/dt=100A/µs
F
(4)
Page 3
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V
2
10
1
10
, Drain Current [A ]
D
I
0
10
10
Top : 7 .0 V 6 .0 V 5 .5 V 5 .0 V 4 .5 V 4 .0 V 3 .5 V Bo tto m : 3 .0 V
-1
GS
VDS , Drain-Source Voltage [V]
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
0
10
IRLM110A
2
10
175 oC
1
10
25 oC
, Drain Current [A ]
D
I
0
1
10
10
0246810
- 55 oC
VGS , Gate-Source Vo ltage [V]
@ Notes :
1. V
2. V
3. 250
= 0 V
GS
= 40 V
DS
s Pulse Test
µ
0.08
VGS = 5 V
VGS = 10 V
]
Ω
, [
DS(on)
R
0.06
0.04
0.02
Drain-Source On-Resistance
@ Note : TJ = 25 oC
0.00 0306090120
2500
2000
C
ID , Drain Current [A ]
iss
C
= Cgs+ Cgd ( Cds= shorted )
iss
= Cds+ C
C
oss
gd
C
= C
rss
gd
1500
C
oss
1000
Capacitance [pF]
C
rss
@ Notes :
1. V
= 0 V
GS
2. f = 1 MHz
500
0
0
10
1
10
VDS , Drain-Source Voltage [V]
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
2
10
1
10
175 oC
, Reverse Drain C urrent [A]
DR
I
10
25 oC
0
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
@ Notes :
1. V
2. 250
= 0 V
GS
s Pulse Test
µ
VSD , Source-Drain Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
6
4
2
, Gate-Source Vo ltage [V]
GS
V
0
0 8 16 24 32 40
QG , Total Gate Char ge [nC]
VDS = 20 V
VDS = 50 V
VDS = 80 V
@ Notes : ID = 28 A
Page 4
IRLM110A
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
3.0
POWER MOSFET
2.5
1.1
2.0
N-CHANNEL
1.0
, (Normalized)
DSS
BV
0.9
@ Notes :
1. V
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175 200
2. I
TJ , Junction Temperature [oC]
Operation in This Area
, Drain Current [A ]
D
I
2
10
1
10
0
10
-1
10
10
@ Notes :
1. T
C
2. T
J
3. Single Pul se
0
is Limited by R
= 25 oC = 175 oC
VDS , Drain-Source Voltage [V]
DS(on)
1 ms
10 ms
DC
1
10
= 0 V
GS
= 250 µA
D
100 µs
1.5
, (Normalized)
1.0
DS(on)
R
Drain-Source On-Resistance
0.5
0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200
@ Notes :
1. V
2. I
= 5 V
GS
= 14 A
D
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
30
24
18
12
, Drain Current [A ]
D
I
6
2
10
0
25 50 75 100 125 150 175
Tc , Case Temperature [oC]
(t) , Thermal Response Z
Fig 11. Thermal Response
0
10
D=0.5
0.2
0.1
-1
10
0.05
0.02
0.01
JC
θ
-2
10
-5
10
single pulse
-4
10
t1 , Square Wave Pulse Duration [sec]
-3
10
@ Notes :
1. Z
2. Duty Factor, D=t1/t
(t)=1.24 oC/W Max.
JC
θ
3. TJM-TC=PDM*Z
P
DM
-2
10
-1
10
2
(t)
JC
θ
t
1
t
2
0
10
1
10
Page 5
N-CHANNEL
POWER MOSFET
IRLM110A
Fig 12. Gate Charge Test Circuit & Waveform
12V
10V
* Current Regulator
200nF
3mA
Current Sampling (IG)
V
in
R
G
V
50KΩ
V
out
”
Same Type
V
GS
as DUT
300nF
V
GS
10V
DS
DUT
R
1
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
V
out
90%
)
DS
10%
V
in
Q
gs
t
d(on)tr
Q
g
Q
gd
Charge
t
d(off)
t
t
on
f
t
off
Vary tpto obtain required peak I
5V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
DUT
L
BV
I
D
C
V
DD
DSS
I
AS
V
DD
V
DS
D
R
G
t
p
E
=LL I
AS
1
---­2
2
--------------------
AS
ID (t)
t
p
BV
DSS
DSS
-- V
DD
Time
V
(t)
DS
Page 6
IRLM110A
N-CHANNEL
POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
V
GS
V
GS
( Driver )
DUT
+
V
DS
--
I
S
L
V
GS
Driver
R
G
D =
Same Type
as DUT
• dv/dt controlled by "R controlled by Duty Factor "D"
•I
S
Gate P ulse Width
-------------------------­Gate Pulse Period
V
DD
"
G
10V
I
S
( DUT )
V
DS
( DUT )
IFM, Body Diode Forward Current
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
Body Diode
Forward Voltage Drop
di/dt
V
DD
Page 7
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS EnSigna
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STAR*POWER is used under license
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SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™
UltraFET
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Advance Information
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No Identification Needed
Formative or In Design
First Production
Full Production
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effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
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Rev. H4
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