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PD - 9.1496A
TO-220 FULLPAK
PRELIMINARY
IRLI520N
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 8.1
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 5.7 A
I
DM
PD @TC = 25°C Power Dissipation 30 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 35
Linear Derating Factor 0.20 W/°C
Gate-to-Source Voltage ± 16 V
Single Pulse Avalanche Energy 85 mJ
Avalanche Current 6.0 A
Repetitive Avalanche Energy 3.0 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 5.0
Junction-to-Ambient ––– 65
D
V
R
DS(on)
DSS
= 100V
= 0.18Ω
ID =8.1A
S
°C/W
°C
3/16/98
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IRLI520N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
J
––– ––– 0.18 VGS = 10V, ID = 6.0A
Static Drain-to-Source On-Resistance
––– ––– 0.22 Ω VGS = 5.0V, ID = 6.0A
––– ––– 0.26 VGS = 4.0V, ID = 5.0A
Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 3.1 ––– ––– S VDS = 25V, ID = 6.0A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
VDS = 100V, VGS = 0V
µA
VGS = 16V
nA
Total Gate Charge ––– ––– 20 ID = 6.0A
Gate-to-Source Charge ––– ––– 4.6 nC VDS = 80V
Gate-to-Drain ("Miller") Charge ––– ––– 10 VGS = 5.0V, See Fig. 6 and 13
Turn-On Delay Time ––– 40 ––– VDD = 50V
Rise Time ––– 35 –––
Turn-Off Delay Time ––– 23 ––– RG = 11Ω, VGS = 5.0V
ns
ID = 6.0A
Fall Time ––– 22 ––– RD = 8.2Ω, See Fig. 10
Internal Drain Inductance ––– 4 .5 –––
Internal Source Inductance ––– 7.5 –––
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 440 ––– VGS = 0V
Output Capacitance ––– 97 ––– VDS = 25V
Reverse Transfer Capacitance ––– 50 ––– ƒ = 1.0MHz, See Fig. 5
pF
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 6.0A, VGS = 0V
Reverse Recovery Time ––– 110 160 ns TJ = 25°C, IF = 6.0A
Reverse Recovery Charge ––– 410 620 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
= 25°C, L = 4.7mH
J
= 6.0A. (See Figure 12)
AS
≤ 6.0A, di/dt ≤ 340A/µs, V
DD
≤ V
(BR)DSS
––– –––
––– –––
Pulse width ≤ 300µs; duty cycle ≤ 2%.
t=60s, ƒ=60Hz
,
Uses IRL520N data and test conditions
8.1
35
showing the
A
p-n junction diode.
D
G
S
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IRLI520N
A
A
)
A
A
100
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
10
1
2.5V
D
I , D ra in-to -S o u rc e C u rre nt ( A )
20µs PU LS E WIDTH
T = 25°C
0.1
0.1 1 10 100
V , D rain-to-Source Vo ltage (V)
DS
J
Fig 1. Typical Output Characteristics
100
100
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
10
2.5V
1
D
I , D ra in-to -S o u rc e C u rre nt ( A )
20µs PU LS E WIDTH
T = 175°C
0.1
0.1 1 10 100
V , D rain-to-Source Vo ltage (V)
DS
J
Fig 2. Typical Output Characteristics
3.0
I = 1 0A
D
T = 25°C
J
T = 175°C
10
1
D
I , D rain-to-Source Current (A)
0.1
246810
V , Ga te -to-S o u rc e Voltage (V
GS
J
V = 50V
DS
20µs PULSE W IDTH
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(N o rmaliz ed )
1.0
0.5
DS(on)
R , D ra in -to -S o u rc e On Res is tan c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Tem pe rature (°C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V = 10 V
GS
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IRLI520N
A
A
A
A
800
600
400
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss g s gd d s
C = C
rss g d
C = C + C
oss d s g d
C
iss
C
oss
C, Capacitance (pF)
200
C
rss
0
1 10 100
V , D rain-to -Source V oltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
T = 175°C
10
J
T = 25°C
J
15
I = 6.0A
V , Gate -to -S o u rc e V olta g e ( V )
12
GS
D
9
6
3
V = 80 V
DS
V = 50 V
DS
V = 20 V
DS
FOR TEST CIRCUIT
0
0 5 10 15 20 25
Q , To ta l Gate C harge (n C)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
O P E R A T IO N IN TH IS A R EA L IM IT E D
BY R
10
DS(on)
10µs
100µs
1ms
1
SD
I , R everse Drain Current (A)
0.1
0.4 0.6 0.8 1.0 1.2 1.4
V , So urce-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
GS
1
D
I , Drain Current (A )
T = 25 ° C
C
T = 175°C
J
Single Pulse
0.1
1 10 100 1000
V , D rain-to-S ource V oltage (V)
DS
10ms
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRLI520N
10.0
8.0
6.0
4.0
D
I , Drain Current (A)
2.0
0.0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
Thermal Response (Z )
0.01
0.20
1
0.10
0.05
0.02
0.01
0.1
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLI520N
A
A
15V
DRIVER
+
-
V
R
V
G
10V
DS
L
D.U.T
I
AS
Ω
t
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
DD
200
160
120
80
40
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
I
TO P 2.4A
4.2A
BOTTOM 6.0A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
5.0 V
Q
GS
V
G
Q
GD
Charge
Current Regulator
Same Type as D.U.T.
12V
.2µF
V
GS
Fig 13b. Gate Charge Test CircuitFig 13a. Basic Gate Charge Waveform
50KΩ
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
+
V
DS
-
D
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IRLI520N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
+
+
V
DD
-
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Current
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
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IRLI520N
A
A
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2X
3X
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS AN IRF1010
E X A MP L E : T H IS IS A N IR F I840G
WITH ASSEMBLY
W ITH AS S E MB L Y
LO T CODE 9 B1 M
L OT CO DE E 4 0 1
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.1 30)
3.10 (.1 22)
0.90 (.035)
0.70 (.028)
0.25 (.010)
3.40 (.1 33)
ø
3.10 (.1 23)
- A -
- B -
M
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
A M B
INT ERNATIO NAL
INTERNATIONAL
R E C T IF IE R
R E CTIFIE R
LOG O
L OG O
AS SEMBLY
A SSEM B LY
LO T CO DE
L O T C O DE
2.80 (.110)
2.60 (.102)
NOTES:
1 DIMENSIONING & TOLE R A NCING
PER ANSI Y14.5M, 1982
2 CON TROLL ING DIMEN SION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEAD ASSIGNMENTS
1 - GATE
2 - D RAIN
3 - S OU RC E
MIN IMUM CREEPAGE
DISTANCE BETW EEN
A-B-C-D = 4.80 (.189)
PART NUMBER
PART NUMBER
9246
9B 1M
E401 9245
DATE CODE
(YYW W)
DATE CODE
YY = YEAR
(YYWW)
YY = YEAR
WW = WEEK
WW = WEEK
C
D
A
B
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: 171 (K&H Bldg.) 30-4 Nishi-ikebukuro 3-chome, Toshima-ku, Tokyo Japan Tel: 81 33 983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 16907 Tel: 65 221 8371
Data and specifications subject to change without notice. 3/98
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