Page 1
PD - 9.1369B
TO-220 FULLPAK
IRLI3705N
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
G
D
V
= 55V
DSS
DS(on)
= 52A
I
D
= 0.01Ω
R
S
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 52
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 37 A
I
DM
PD @TC = 25°C Power Dissipation 58 W
V
GS
E
AS
I
AR
E
AR
dv/d t Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 310
Linear Derating Factor 0.39 W/°C
Gate-to-Source Voltage ± 16 V
Single Pulse Avalanche Energy 340 mJ
Avalanche Current 46 A
Repetitive Avalanche Energy 5.8 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 2.6
Junction-to-Ambient ––– 65
°C/W
°C
8/25/97
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IRLI3705N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Drain-to-Source Breakdown Voltage 55 –– – ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.056 ––– V/°C Reference to 25°C, ID = 1mA
J
= 10V, ID = 28A
GS
= 5.0V, ID = 28A
GS
Static Drain-to-Source On-Resistance
––– ––– 0.010 V
––– ––– 0.012 Ω V
––– ––– 0.018 VGS = 4.0V, ID = 24A
Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 50 ––– ––– S VDS = 25V, ID = 46A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
µA
nA
= 55V, VGS = 0V
V
DS
= 16V
V
GS
Total Gate Charge ––– – – – 98 ID = 46A
Gate-to-Source Charge ––– ––– 1 9 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 49 VGS = 5.0V, See Fig. 6 and 13
Turn-On Delay Time ––– 12 ––– VDD = 28V
Rise Time ––– 140 –– –
Turn-Off Delay Time ––– 37 ––– RG = 1.8Ω, VGS = 5.0V
ns
ID = 46A
Fall Time ––– 78 ––– RD = 0.59Ω, See Fig. 10
Internal Drain Inductance ––– 4.5 –––
Internal Source Inductance ––– 7.5 – ––
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 3600 ––– VGS = 0V
Output Capacitance ––– 870 – –– VDS = 25V
Reverse Transfer Capacitance ––– 3 2 0 ––– ƒ = 1.0MHz, See Fig. 5
pF
Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
52
310
showing the
A
p-n junction diode.
Diode Forward Voltage ––– –– – 1.3 V TJ = 25°C, IS = 28A, VGS = 0V
Reverse Recovery Time – – – 9 4 14 0 ns TJ = 25°C, IF = 46A
Reverse RecoveryCharge ––– 290 44 0 nC di/dt = 100A/µs
D
G
S
D
G
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
= 25V, starting TJ = 25°C, L = 320µH
DD
RG = 25Ω, I
= 46A. (See Figure 12)
AS
I
≤ 46A, di/dt ≤ 250A/µs, V
SD
DD
≤ V
(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
t=60s, ƒ=60Hz
Uses IRL3705N data and test conditions
,
Page 3
IRLI3705N
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTT OM 2.5V
100
10
D
I , Drain-to-Source Current (A )
2.5V
20µs PULSE WIDTH
T = 25°C
1
0.1 1 10 100
V , Dra in-to-So urc e V olta ge (V )
DS
1000
J
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTT OM 2.5V
100
10
D
I , Drain- to-S o urce C u rrent ( A)
2.5V
20µs PULSE WIDTH
T = 175°C
A
1
0.1 1 10 100
V , Dra in-to-So urc e V olta ge (V )
DS
J
A
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I = 77A
D
T = 25°C
J
T = 175°C
100
10
D
I , D ra in-to - So urc e Curre nt (A)
1
2.0 3.0 4.0 5.0 6.0 7.0 8.0
V , G a te-to- S o u rc e Vo ltag e (V )
GS
J
V = 25V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(No rm alized)
1.0
0.5
DS(on)
R , D rain -to-S o urc e O n R e si stan ce
A
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Ju nc tio n T em peratu r e (°C )
J
V = 10V
GS
A
Fig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRLI3705N
6000
5000
4000
3000
2000
C, C apac itance (pF)
1000
0
1 10 100
V = 0V, f = 1 MH z
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss g d
C
C = C + C
iss
oss ds gd
C
oss
C
rs s
V , Dr ain-to-Sou rc e Voltage (V )
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
15
I = 46A
V , G ate -to-S ou rc e V o ltage (V )
12
9
6
3
GS
D
V = 44V
DS
V = 28V
DS
FOR TEST CIRCUIT
A
0
0 20 40 60 80 100 120 140
Q , Tota l Gate Ch arge (nC )
G
SEE FIGURE 13
A
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
O PER ATION IN T HIS A R E A LI MITED
BY R
DS(on)
100
T = 175°C
J
T = 25°C
J
SD
I , Rev ers e Dr ain C u rren t (A)
V = 0V
10
0.4 0.8 1.2 1.6 2.0 2.4 2.8
V , Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
10µs
100
100µs
10
D
I , D rain Cu rren t (A )
T = 25°C
C
T = 175°C
J
A
Single Pulse
1
1 10 100
V , Drain-to-So urc e Vo ltag e (V)
DS
1ms
10ms
A
Fig 8. Maximum Safe Operating Area
Page 5
IRLI3705N
+
-
60
50
40
30
20
D
I , Drain Current (A)
10
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
thJC
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
1 2
P
DM
t
1
t
2
Page 6
IRLI3705N
15V
DRIVER
+
-
R
20V
V
DS
G
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
800
600
400
V
DD
A
200
AS
V = 25V
E , S in gle Pu lse Ava lanche E nergy (m J)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
I
TOP 19A
33A
BOTTOM 46 A
D
A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
5.0 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
+
V
-
Fig 13b. Gate Charge Test Circuit
DS
Page 7
IRLI3705N
+
-
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
controlled by Duty Factor "D"
• I
SD
• D.U.T. - Device Under Test
Period
-
D =
G
Period
P.W.
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Current
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Page 8
IRLI3705N
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2X
3X
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS A N IRFI840G
EXAMPLE : THIS IS AN IRF1010
WITH A S SEMBL Y
W ITH ASSEMBLY
LOT C OD E E 4 01
LOT COD E 9 B 1 M
ø
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
0.90 (.035)
0.70 (.028)
0.25 (.010)
3.40 (.133)
3.10 (.123)
- A -
- B -
M
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
A M B
INTERNATIONAL
INT ERNATIONAL
R ECT IF IER
RE CTIFIER
LOGO
LOGO
ASSEMBLY
AS SE M BL Y
LOT COD E
LO T CO D E
2.80 (.110)
2.60 (.102)
NOTES:
1 DIMENSIONING & TOLERANCING
PER A N SI Y1 4.5M, 1982
2 CO NTROLLING DIMENSION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEA D ASSIGNM EN T S
1 - G A TE
2 - D R A IN
3 - SO URCE
MINIMUM CREEPAGE
DISTA NCE BETW E EN
A-B-C -D = 4.80 (.189)
PART NUM BER
PART NU MBE R
9246
E401 9245
9B 1M
DATE CODE
DATE CODE
(YYWW)
(YYWW)
YY = YEAR
YY = YE AR
WW = WEEK
WW = WEEK
C
D
A
B
A
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 8/97
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