Page 1
PD 9.1377
PRELIMINARY
IRLI3103
HEXFET® Power MOSFET
Logic-Level Gate Drive
Advanced Process Technology
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
R
DS(on)
V
DSS
= 0.014Ω
= 30V
Fully Avalanche Rated
ID = 38A
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 38
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 27 A
I
DM
PD @TC = 25°C Power Dissipation 38 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 2.0 V/ns
T
J
T
STG
Thermal Resistance
R
θJC
R
θJA
Pulsed Drain Current 220
Linear Derating Factor 0.25 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 240 mJ
Avalanche Current 34 A
Repetitive Avalanche Energy 3.8 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Parameter Typ. Max. Units
Junction-to-Case ––– 4.0
Junction-to-Ambient ––– 65
°C/W
°C
Page 2
IRLI3103
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA
/∆ T
Breakdown Voltage Temp. Coefficient ––– 0.037 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance
––– ––– 0.014 VGS = 10V, ID = 23A
––– ––– 0.019 VGS = 4.5V, ID = 19A
Ω
Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 23 ––– ––– S VDS = 25V, ID = 34A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
VDS = 30V, VGS = 0V
µA
VGS = 20V
nA
Total Gate Charge ––– ––– 50 ID = 34A
Gate-to-Source Charge ––– ––– 14 nC VDS = 24V
Gate-to-Drain ("Miller") Charge ––– ––– 28 VGS = 4.5V, See Fig. 6 and 13
Turn-On Delay Time ––– 9.0 ––– VDD = 15V
Rise Time ––– 210 –––
Turn-Off Delay Time ––– 20 ––– RG = 3.4Ω, VGS = 4.5V
ns
ID = 34A
Fall Time ––– 54 ––– RD = 0.43 Ω, See Fig. 10
Internal Drain Inductance ––– 4.5 –––
Internal Source Inductance ––– 7.5 –––
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 1600 ––– VGS = 0V
Output Capacitance ––– 640 ––– VDS = 25V
Reverse Transfer Capacitance ––– 320 ––– ƒ = 1.0MHz, See Fig. 5
pF
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
RG = 25Ω , I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 23A, VGS = 0V
Reverse Recovery Time ––– 81 120 ns TJ = 25°C, IF = 34A
Reverse Recovery Charge ––– 210 310 nC di/dt = 100A/µs
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 15V, starting TJ = 25°C, L = 300µH
= 34A. (See Figure 12)
AS
≤ 34A, di/dt ≤ 140A/µs, V
DD
≤ V
(BR)DSS
,
t=60s, ƒ=60Hz
Uses IRL3103 data and test conditions
38
220
showing the
A
p-n junction diode.
Page 3
IRLI3103
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
T = 25°C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 1. Typical Output Characteristics,
TJ = 25oC
1000
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
2.5V
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
T = 175°C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output Characteristics,
TJ = 175oC
2.0
I = 56A
D
T = 25°C
GS
J
T = 175°C
J
V = 15V
DS
20µs PULSE WIDTH
100
10
D
I , Drain-to-Source Current (A)
1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
V , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V = 10V
GS
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IRLI3103
3200
2800
2400
2000
1600
1200
C, Capacitance (pF)
800
400
0
1 10 100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rss
V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
15
I = 34A
D
12
9
6
3
GS
V , Gate-to-Source Voltage (V)
V = 24V
DS
V = 15V
DS
FOR TEST CIRCUIT
0
0 10 20 30 40 50 60 70
Q , Total Gate Charge (nC)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
T = 175°C
J
T = 25°C
SD
I , Reverse Drain Current (A)
10
0.4 0.8 1.2 1.6 2.0 2.4 2.8
V , Source-to-Drain Voltage (V)
J
V = 0V
SD
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
100
10
D
I , Drain Current (A)
T = 25°C
C
T = 175°C
J
Single Pulse
1
1 10 100
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10µs
100µs
1ms
10ms
Page 5
40
30
20
D
10
I , Drain Current (Amps)
0
25 50 75 100 125 150 175
T , Case Temperature (°C)
C
IRLI3103
R
V
DS
V
GS
R
G
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
D
D.U.T.
V
DD
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
thJC
1
0.20
0.10
0.05
0.02
0.1
0.01
Thermal Response (Z )
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
SINGLE PULSE
(THERMAL RESPONSE)
N otes :
1. D uty fac tor D = t / t
2. P eak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
DM
J
P
DM
t
1
t
2
2
1
thJC
C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
Page 6
IRLI3103
10 V
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
600
500
400
300
200
100
AS
V = 15V
E , Single Pulse Avalanche Energy (mJ)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( °C)
J
I
TOP 14A
24A
BOTTOM 34A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
5.0 V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
Page 7
IRLI3103
Peak Diode Recovery dv/dt Test Circuit
D.U.T
R
G
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• dv/dt controlled by R
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
V
DD
*
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Page 8
IRLI3103
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
3.70 (.145)
3.20 (.126)
16.00 (.630)
15.80 (.622)
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2X
1 2 3
1.15 (.045)
MIN.
0.90 (.035)
3X
0.70 (.028)
0.25 (.010)
3.30 (.130)
3.10 (.122)
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS AN IRFI840G
W ITH ASSEMBLY
LOT CODE E401
3.40 (.133)
ø
3.10 (.123)
- A -
7.10 (.280)
6.70 (.263)
- B -
A M B
M
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
4.80 (.189)
4.60 (.181)
2.80 (.110)
2.60 (.102)
NOTES:
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982
2 CONTROLLING DIMENSION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
MINIMUM CREEPAGE
DISTANCE BETWEEN
A-B-C-D = 4.80 (.189)
PART NUMBER
IRFI840G
E401 9245
C
D
A
B
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 713215
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ku, Tokyo, Japan 171 Tel: ++ 81 3 3983 0641
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: ++ 65 221 8371
Data and specifications subject to change without notice. 11/95