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PD - 91841A
IRLBA3803/P
● Logic-Level Gate Drive
● Advanced Process Technology
● 175°C Operating Temperature
● Fast Switching
● Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
G
HEXFET® Power MOSFET
D
R
DS(on)
V
DSS
= 30V
= 0.005Ω
ID = 179A
S
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The Super-220 is a package that has been designed to have
the same mechanical outline and pinout as the industry
standard TO-220 but can house a considerably larger silicon
die. It has increased current handling capability over both the
TO-220 and the much larger TO-247 package.
This makes it ideal to reduce component count in multiparalled
TO-220 applications, reduce system power dissipation,
upgrade existing designs or have TO-247 performance in a
Super_ 220
TO-220 outline.
This package has also been designed to meet automotive
qualification standard Q101.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 179
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 126 A
I
DM
PD @TC = 25°C Power Dissipation 270 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 720
Linear Derating Factor 1.8 W/°C
Gate-to-Source Voltage ±16 V
Single Pulse Avalanche Energy 610 mJ
Avalanche Current 71 A
Repetitive Avalanche Energy 27 m J
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Recommended clip force 20 N
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.55
Case-to-Sink, Flat, Greased Surface 0.5 ––– °C/W
Junction-to-Ambient ––– 58
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IRLBA3803/P
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.052 –– – V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance
––– ––– 0.005 VGS = 10V, ID = 71A
––– ––– 0.009 VGS = 4.5V, ID = 59A
Ω
Gate Threshold Voltage 1.0 ––– V VDS = VGS, ID = 250µA
Forward Transconductance 55 ––– ––– S VDS = 25V, ID = 71A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 30V, VGS = 0V
µA
nA
VGS = -16V
Total Gate Charge ––– –– – 140 ID = 71A
Gate-to-Source Charge ––– ––– 41 nC VDS = 24V
Gate-to-Drain ("Miller") Charge ––– ––– 78 VGS = 4.5V, See Fig. 6 and 13
Turn-On Delay Time ––– 14 ––– VDD = 15V
Rise Time ––– 230 ––– ID = 71A
Turn-Off Delay Time ––– 29 ––– RG = 1.3Ω
Fall Time ––– 35 ––– RD = 0.20Ω, See Fig. 10
Internal Drain Inductance ––– 2.0 –––
Internal Source Inductance ––– 5.0 –––
Between lead,
nH
6mm (0.25in.)
from package
and center of die contact
Input Capacitance ––– 5000 ––– VGS = 0V
Output Capacitance ––– 1800 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 880 ––– ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
179
720
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 71A, VGS = 0V
Reverse Recovery Time ––– 120 180 ns TJ = 25°C, IF = 71A
Reverse Recovery Charge ––– 450 680 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
= 15V, starting TJ = 25°C, L = 180µH
DD
RG = 25Ω, I
I
≤ 71A, di/dt ≤ 130A/µs, V
SD
TJ ≤ 175°C
= 71A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL3803 data and test conditions.
Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
,
package refer to Design Tip # 93-4
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D
S
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IRLBA3803/P
A
1000
100
D
I , Drain-to-Source Current (A)
10
0.1 1 10 100
VGS
TOP
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM
2.7V
2.7V
V , Drain-to-Source Voltage (V)
DS
20µs PULSE WIDTH
T = 25 C
J
°
Fig 1. Typical Output Characteristics
1000
°
T = 25 C
J
1000
100
TOP
BOTTOM
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
2.7V
2.7V
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
10
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
T = 175 C
°
J
Fig 2. Typical Output Characteristics
2.0
I = 12 0 A
D
°
T = 175 C
J
100
1.5
1.0
(Norm alized)
0.5
D
I , Drain-to-Source Current (A)
V = 25V
DS
10
2.0 4.0 6.0 8.0 10.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
DS(on)
R , D r ain -to- S ou r c e On R es i sta n c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
V = 10 V
GS
Vs. Temperature
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IRLBA3803/P
)
A
)
A
10000
8000
6000
4000
C, Capacitance (pF)
2000
0
1 10 100
V = 0V, f = 1 M Hz
GS
C = C + C , C S H O RTE D
iss gs gd ds
C = C
rss gd
C
iss
C = C + C
oss ds g d
C
oss
C
rss
V , Drain- to -S o u rc e Voltage (V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
15
I = 71 A
D
V = 2 4 V
DS
V = 1 5 V
DS
V , G a te-to - S ou r ce V o lta g e (V)
12
GS
9
6
3
FOR TEST CIRCUIT
0
0 40 80 120 160 200
Q , T ota l Gate Charge (nC
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 175 C
J
100
°
T = 25 C
J
10
SD
I , Reverse Drain Current (A)
V = 0 V
1
0.4 0.8 1.2 1.6 2.0 2.4
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
1000
100
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 175 C
Single Pulse
10
1 10 100
°
J
V , Drain-to-Source Voltage (V)
DS
10us
100us
1ms
10ms
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRLBA3803/P
200
LIMITED BY PACKAGE
160
120
80
D
I , Drain Current (A)
40
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
-
DD
D = 0.50
thJC
0.01
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
P
DM
1 2
J DM thJC C
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLBA3803/P
A
)
A
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
DD
1500
I
TO P 29 A
50A
1200
900
600
300
AS
V = 15 V
E , S ing le Puls e A v a lan c he Energ y (mJ)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C
J
BOTTOM 71 A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
D
50KΩ
Q
G
4.5
V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
Fig 13b. Gate Charge Test Circuit
.2µF
V
GS
.3µF
D.U.T .
3mA
I
G
Current Sampling Resistors
I
+
V
DS
-
D
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IRLBA3803/P
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P.W.
Period
+
+
V
DD
-
VGS=10V
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFETS
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IRLBA3803/P
Super_220 Package Outline
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
http://www.irf.com/ Data and specifications subject to change without notice. 1/99
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