Datasheet IRLB4030PBF Datasheet

Applications

)

l DC Motor Drive l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits

PD - 97369

IRLB4030PbF

HEXFET® Power MOSFET

D

V

DSS

R

DS(on

G

max.

typ.

100V

3.4m

4.3m

Ω Ω

Benefits

l Optimized for Logic Level Drive l Very Low R l Superior R*Q at 4.5V V l Improved Gate, Avalanche and Dynamic dV/dt

DS(ON)

at 4.5V V

GS

S

D

I

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free

TO-220AB

GDS

Gate Drain Source

S

D

G

Absolute Maximum Ratings

Symbol Parameter Units

ID @ TC = 25°C

I

@ TC = 100°C Continuous Drain Current, VGS @ 10V

D

I

DM

PD @TC = 25°C

V

GS

dv/dt T

J

T

STG

Continuous Drain Current, V

Pulsed Drain Current

Maximum Power Dissipation

Linear Derating Factor

Gate-to-Source Voltage

Peak Diode Recovery

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds

(1.6mm from case)

Mounting torque, 6-32 or M3 screw

c

e

@ 10V

GS

Max.

180

130

730

370

2.5

± 16

21

-55 to + 175

300

x

in (1.1Nxm)

10lb

Avalanche Characteristics

f

d

305

See Fig. 14, 15, 22a, 22b,

E

AS (Thermally limited)

I

AR

E

AR

Single Pulse Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

c

Thermal Resistance

Symbol Parameter Typ. Max. Units

R

θ

JC

R

θ

CS

R

θ

JA

Junction-to-Case

Case-to-Sink, Flat, Greased Surface

Junction-to-Ambient

j

ij

–––

0.50 –––

––– 62

0.40

180A

A

W

W/°C

V

V/ns

°C

mJ

A

mJ

°C/W

www.irf.com 1

02/12/09

IRLB4030PbF

/

g

h

di/dt = 100A/µs

f

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

I

DSS

I

GSS

R

G(int)

Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

fs Forward Transconductance 320 ––– ––– S

Q

g

Q

gs

Q

gd

Q

sync

t

d(on)

t

r

t

d(off)

t

f

C

iss

C

oss

C

rss

C

eff. (ER)

oss

C

eff. (TR)

oss

Drain-to-Source Breakdown Voltage 100 ––– ––– V

∆T

Breakdown Voltage Temp. Coefficient ––– 0.10 ––– V/°C

J

Static Drain-to-Source On-Resistance ––– 3.4 4.3

––– 3.6 4.5 Gate Threshold Voltage 1.0 ––– 2.5 V Drain-to-Source Leakage Current ––– ––– 20

––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leaka

Internal Gate Resistance

e ––– ––– -100

–––

2.1 –––

Total Gate Charge ––– 87 130 Gate-to-Source Charge ––– 27 ––– Gate-to-Drain ("Miller") Charge ––– 45 ––– Total Gate Charge Sync. (Qg - Qgd)

––– 42 ––– Turn-On Delay Time ––– 74 ––– Rise Time ––– 330 ––– Turn-Off Delay Time ––– 110 ––– Fall Time ––– 170 ––– Input Capacitance ––– 11360 ––– Output Capacitance ––– 670 ––– Reverse Transfer Capacitance ––– 290 –––

Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related)

––– 760 –––

––– 1140 –––

g

Conditions

VGS = 0V, ID = 250µA Reference to 25°C, I VGS = 10V, ID = 110A

mΩ

V

= 4.5V, ID = 92A

GS

VDS = VGS, ID = 250µA V

= 100V, VGS = 0V

DS

µA

V

= 100V, VGS = 0V, TJ = 125°C

DS

= 16V

V

GS

nA

V

= -16V

GS

Ω

Conditions

VDS = 25V, ID = 110A I

= 110A

D

V

= 50V

DS

nC

ns

pF

= 4.5V

V

GS

= 110A, VDS =0V, VGS = 4.5V

I

D

f

VDD = 65V I

= 110A

D

R

= 2.7

Ω

G

VGS = 4.5V

f

VGS = 0V V

= 50V

DS

ƒ = 1.0MHz V

= 0V, VDS = 0V to 80V

GS

VGS = 0V, VDS = 0V to 80V

= 5mA

D

f

c

h g

Diode Characteristics

Symbol Parameter Min. Typ. Max. Units

I

S

I

SM

V

SD

t

rr

Q

rr

I

RRM

t

on

Notes:

 Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by T

RG = 25Ω, I above this value .

 I

≤ 110A, di/dt ≤ 1330A/µs, V

SD

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

Continuous Source Current

(Body Diode) Pulsed Source Current

(Body Diode)

c

––– –––

180

730

Diode Forward Voltage ––– ––– 1.3 V Reverse Recovery Time ––– 50 –––

––– 60 ––– Reverse Recovery Charge ––– 88 –––

––– 130 ––– Reverse Recovery Current ––– 3.3 ––– A Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 C

eff. (TR) is a fixed capacitance that gives the same charging time

oss

, starting TJ = 25°C, L = 0.05mH

Jmax

= 110A, VGS =10V. Part not recommended for use

AS

as C

 C

C

while V

oss

eff. (ER) is a fixed capacitance that gives the same energy as

oss

while V

oss

is rising from 0 to 80% V

DS

is rising from 0 to 80% V

DS

 When mounted on 1" square PCB (FR-4 or G-10 Material). For

DD

≤ V

(BR)DSS

, TJ ≤ 175°C.

recommended footprint and soldering techniquea refer to applocation

note # AN- 994 echniques refer to application note #AN-994.

 R

is measured at TJ approximately 90°C.

θ

Conditions

MOSFET symbol

showing the

A

integral reverse

p-n junction diode. TJ = 25°C, IS = 110A, VGS = 0V

= 25°C VR = 85V,

T

J

ns

T

= 125°C IF = 110A

J

= 25°C

T

J

nC

= 125°C

T

J

= 25°C

T

J

.

DSS

.

DSS

D

G

S

f

2 www.irf.com

IRLB4030PbF

1000

TOP 15V

) A

( t n e

r

100

r u

C e

c

r u o S

o

t

-

10

n

i a

r D

,

D

I

2.5V

≤

BOTTOM 2.5V

60µs PULSE WIDTH

Tj = 25°C

1

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

1000

) A

( t n e

r

100

r u

C e

c

r u o S

o

t

-

10

n

i a

r D

,

D

I

TJ = 175°C

TJ = 25°C

V

= 50V

DS

60µs PULSE WIDTH

≤

1.0 1 2 3 4 5

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

VGS

10V

8.0V

4.5V

3.5V

3.0V

2.7V

1000

VGS

10V

8.0V

4.5V

3.5V

3.0V

2.7V

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

, I

100

D

2.5V

60µs PULSE WIDTH

≤

TOP 15V

BOTTOM 2.5V

Tj = 175°C

10

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output Characteristics

2.5

e c n a

t s

i s e

R n O

)

e

d

c

r

e

u

z

i

l

o

a

S

-

m

o

r

t

-

o

n

N

i

(

a

r D

,

) n o

( S D

R

2.0

1.5

1.0

0.5

ID = 110A

V

= 10V

GS

0.0

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

Fig 4. Normalized On-Resistance vs. Temperature

100000

) F

10000

p

( e

c n a

t

i c a p a

C

1000

, C

100

V

= 0V, f = 1 MHZ

GS

C

= C

C

iss

rss

oss

= C

gs

gd

ds

C

iss

C

oss

C

rss

+ Cgd, C

+ C

SHORTED

ds

gd

1 10 100

VDS, Drain-to-Source Voltage (V)

5.0 ID= 110A

) V

4.0

( e

g a

t

l o V

3.0

e c

r u o S

o

2.0

t

e

t a

G ,

S

1.0

G

V

VDS= 80V

VDS= 50V

0.0

0 20406080100

QG, Total Gate Charge (nC)

Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage

www.irf.com 3

IRLB4030PbF

1000

) A

(

100

t n e

r

r u

C n

i a

r D e

s

r e v e

R ,

D S

I

0.1

TJ = 175°C

TJ = 25°C

10

1

0.0 0.5 1.0 1.5 2.0 2.5

VSD, Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode

Forward Voltage

200

180

160

)

140

A

( t n

120

e

r

r u

100

C n

i a

80

r D ,

60

D

I

40

20

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Fig 9. Maximum Drain Current vs.

V

GS

= 0V

10000

) A

( t

1000

n e

r

r u

C e

c

r u

100

o S

o

t

n

i a

r D

10

,

D

I

Tc = 25°C Tj = 175°C Single Pulse

1

0 1 10 100 1000

OPERATION IN THIS AREA LIMITED BY RDS(on)

100µsec

10msec

1msec

DC

VDS, Drain-to-Source Voltage (V)

Fig 8. Maximum Safe Operating Area

) V

125

( e

g a

t

l o V

n w

o d k a e

r B

e c

r u o S

o

t

n

i a

r D

,

S S D

) R B

(

V

Id = 5mA

120

115

110

105

100

95

90

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Temperature ( °C )

Fig 10. Drain-to-Source Breakdown Voltage

Case Temperature

4.5

4.0

3.5

3.0

) J µ

2.5

( y

g

r e

2.0

n E

1.5

1.0

0.5

0.0

-20 0 20 40 60 80 100 120

V

Drain-to-Source Voltage (V)

DS,

Fig 11. Typical C

Stored Energy

OSS

1400

) J

m

(

1200

y g

r e n E

1000

e h c n

800

a

l a v A

e

600

s

l u P

e

l

400

g n

i S ,

200

S A

E

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

TOP 17A

BOTTOM 110A

I

D

40A

Fig 12. Maximum Avalanche Energy vs. DrainCurrent

4 www.irf.com

IRLB4030PbF

τ

1

W

/ C

° )

C J h

t

Z (

e

0.01

s n o p s e

R l a

0.001

m

r e h T

0.0001

1000

100

) A

( t n e

r

r u

C e

h c n a

l a v A

0.1

D = 0.50

0.1

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

τ

J

τ

J

τ

1

τ

1

Ci= τi/Ri

R

1

R

1

τ

R

2

3

R

2

τ

2

Ri (°C/W) τi (sec)

R

3

τ

C

0.0477 0.000071

τ

3

0.1631 0.000881

τ

3

0.1893 0.007457

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Duty Cycle = Single Pulse

0.01

0.05

10

0.10

1

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and

Tstart = 150°C.

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and

Tstart =25°C (Single Pulse)

Fig 14. Typical Avalanche Current vs.Pulsewidth

350

TOP Single Pulse

300

) J

m

(

250

y g

r e n E

200

e h c n a

150

l a v A ,

100

R A

E

BOTTOM 1.0% Duty Cycle ID = 110A

50

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T

2. Safe operation in Avalanche is allowed as long asT

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

. This is validated for every part type.

jmax

is not exceeded.

jmax

= Average power dissipation per single avalanche pulse.

during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed T

(assumed as

jmax

25°C in Figure 14, 15). t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see Figures 13)

thJC

P

D (ave)

·f

av

= 1/2 ( 1.3·BV·Iav) = DT/ Z

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

Fig 15. Maximum Avalanche Energy vs. Temperature

www.irf.com 5

IRLB4030PbF

2.5

) V

( e

2.0

g a

t

l o V

d

l

1.5

o h s e

r h

t e

t a

G ,

) h

t

( S G

V

ID = 250µA

ID = 1.0mA

1.0 ID = 1.0A

0.5

0.0

-75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( °C )

Fig 16. Threshold Voltage vs. Temperature

35

IF = 110A

30

VR = 85V

TJ = 25°C

25

TJ = 125°C

)

20

A

(

M R

15

R

I

10

5

40

IF = 73A

35

VR = 85V

TJ = 25°C

30

TJ = 125°C

25

) A

(

20

M R R

I

15

10

5

0

0 200 400 600 800 1000

diF /dt (A/µs)

Fig. 17 - Typical Recovery Current vs. dif/dt

800

IF = 73A

720

VR = 85V

640

TJ = 25°C

TJ = 125°C

560

) A

480

(

R R

400

Q

320

240

160

0

0 200 400 600 800 1000

diF /dt (A/µs)

80

0 200 400 600 800 1000

diF /dt (A/µs)

Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt

880

IF = 110A

800

VR = 85V

720

TJ = 25°C

640

TJ = 125°C

560

) A

(

480

R R

Q

400

320

240

160

80

0 200 400 600 800 1000

diF /dt (A/µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

6 www.irf.com

IRLB4030PbF

A

+

-

+

-





D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

Reverse Recovery

+

V

DD

Current

Re-Applied Voltage

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Current

Inductor Curent

* V

GS

Period

P.W.

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

V

15V

V

DS

L

DRIVER

t

p

(BR)DSS

R

G

V

20V

GS

Fig 22a. Unclamped Inductive Test Circuit

V

GS

R

G

10V

V

GS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

D.U.T

I

AS

Ω

0.01

t

p

+

V

DD

-

I

AS

Fig 22b. Unclamped Inductive Waveforms

R

V

DS

D

V

DS

90%

D.U.T.

V

DD

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Current Regulator

Same Type as D.U.T.

.2µF

12V

V

GS

50KΩ

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

+

V

DS

-

I

D

Vds

Vgs(th)

Qgs1

Qgs2 Qgd Qgodr

Id

Vgs

Fig 24a. Gate Charge Test Circuit

www.irf.com 7

Fig 24b. Gate Charge Waveform

IRLB4030PbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

(;$03/( 7+,6,6$1,5)

/27&2'( $66(0%/('21::  ,17+($66(0%/</,1(&

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LQGLFDWHV/HDG)UHH

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

,17(51 $7 ,2 1$/

5(&7,),( 5

/2*2

$66(0%/< /27&2'(

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

3$57180%(5

'$7(&2'( <($5  :((. /,1(&

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