Datasheet IRLB 3034PBF Datasheet

PD -97363

)

IRLB3034PbF

Applications

HEXFET® Power MOSFET

l DC Motor Drive l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits

G

Benefits

l Optimized for Logic Level Drive l Very Low R l Superior R*Q at 4.5V V l Improved Gate, Avalanche and Dynamic dV/dt

DS(ON)

at 4.5V V

GS

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free

Absolute Maximum Ratings

Symbol Parameter Units

ID @ TC = 25°C

I

@ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)

D

I

@ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)

D

I

DM

PD @TC = 25°C

V

GS

dv/dt T

J

T

STG

Continuous Drain Current, VGS @ 10V (Silicon Limited)

Pulsed Drain Current

Maximum Power Dissipation

Linear Derating Factor

Gate-to-Source Voltage

Peak Diode Recovery

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds

(1.6mm from case)

Mounting torque, 6-32 or M3 screw

d

f

D

V R

DSS

DS(on

typ.

40V

max. I

D (Silicon Limited

I

S

D (Package Limited

TO-220AB

IRLB3034PbF

GDS

Gate Drain Source

Max.

343

c

243

c

195

1372

375

2.5

±20

4.6

-55 to + 175

300

10lbfxin (1.1Nxm)

195A

1.4m

1.7m

343A

: :

c

A

W

W/°C

V

V/ns

°C

Avalanche Characteristics

E

AS (Thermally limited)

I

AR

E

AR

Single Pulse Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

d

e

255

See Fig. 14, 15, 22a, 22b,

mJ

Thermal Resistance

Symbol Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

Junction-to-Case

Case-to-Sink, Flat, Greased Surface

Junction-to-Ambient

j

–––

0.5 –––

––– 62

0.4 °C/W

www.irf.com 1

A

01/14/09

IRLB3034PbF

s

/

g

s

g

s

/

g

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

I

DSS

I

GSS

R

G(int)

Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

fs Forward Transconductance 286 ––– ––– S

Q

g

Q

gs

Q

gd

Q

sync

t

d(on)

t

r

t

d(off)

t

f

C

iss

C

oss

C

rss

C

eff. (ER)

oss

C

eff. (TR)

oss

Diode Characteristics

Symbol Parameter Min. Typ. Max. Unit

I

S

I

SM

V

SD

t

rr

Q

rr

I

RRM

t

on

Drain-to-Source Breakdown Voltage 40 ––– ––– V

∆T

Breakdown Voltage Temp. Coefficient ––– 0.04 ––– V/°C

J

Static Drain-to-Source On-Resistance

––– 1.4 1.7

––– 1.6 2.0 Gate Threshold Voltage 1.0 ––– 2.5 V Drain-to-Source Leakage Current ––– ––– 20

––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leaka

e ––– ––– -100

Internal Gate Resistance ––– 2.1 –––

Total Gate Charge ––– 108 162 Gate-to-Source Charge ––– 29 ––– Gate-to-Drain ("Miller") Charge ––– 54 ––– Total Gate Charge Sync. (Qg - Qgd)

––– 54 ––– Turn-On Delay Time ––– 65 ––– Rise Time ––– 827 ––– Turn-Off Delay Time ––– 97 ––– Fall Time ––– 355 ––– Input Capacitance ––– 10315 ––– Output Capacitance ––– 1980 ––– Reverse Transfer Capacitance ––– 935 –––

Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related)

Continuous Source Current ––– –––

(Body Diode) Pulsed Source Current ––– –––

(Body Diode)

d

––– 2378 –––

i

––– 2986 –––

h

343

1372

c

Diode Forward Voltage ––– ––– 1.3 V Reverse Recovery Time ––– 39 –––

––– 41 ––– Reverse Recovery Charge ––– 39 –––

––– 46 ––– Reverse Recovery Current ––– 1.7 ––– A Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Conditions

VGS = 0V, ID = 250µA Reference to 25°C, I

= 10V, ID = 195A

V

GS

m

Ω

V

= 4.5V, ID = 172A

GS

= VGS, ID = 250µA

V

DS

V

= 40V, VGS = 0V

DS

µA

V

= 40V, VGS = 0V, TJ = 125°C

DS

V

= 20V

GS

nA

VGS = -20V

Ω

Conditions

VDS = 10V, ID = 195A I

= 185A

D

= 20V

V

DS

nC

ns

pF

= 4.5V

V

GS

= 185A, VDS =0V, VGS = 4.5V

I

D

= 26V

V

DD

= 195A

I

D

R

= 2.1Ω

G

VGS = 4.5V V

= 0V

GS

V

= 25V

DS

g

ƒ = 1.0MHz V

= 0V, VDS = 0V to 32V

GS

= 0V, VDS = 0V to 32V

V

GS

Conditions

MOSFET symbol

showing the

A

integral reverse

p-n junction diode. TJ = 25°C, IS = 195A, VGS = 0V TJ = 25°C VR = 34V,

ns

T

= 125°C IF = 195A

nC

J

TJ = 25°C TJ = 125°C TJ = 25°C

di

= 5mA

D

d

g

i h

G

g

dt = 100A/µs

D

S

Notes:

 Calcuted continuous current based on maximum allowable junction

temperature Bond wire current limit is 195A. Note that current limitation arising from heating of the device leds may occur with some lead mounting arrangements.

 Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by T

RG = 25Ω, I

above this value .

 I

≤ 195A, di/dt ≤ 841A/µs, V

SD

, starting TJ = 25°C, L = 0.013mH

Jmax

= 195A, VGS =10V. Part not recommended for use

AS

DD

≤ V

(BR)DSS

, TJ ≤ 175°C.

2 www.irf.com

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

 C

eff. (TR) is a fixed capacitance that gives the same charging time

oss

as C

 C

C

 R

while V

oss

eff. (ER) is a fixed capacitance that gives the same energy as

oss

while V

oss

is measured at TJ approximately 90°C

θ

is rising from 0 to 80% V

DS

is rising from 0 to 80% V

DS

DSS

.

IRLB3034PbF

100000

VGS

10V

8.0V

4.5V

3.5V

3.0V

2.7V

2.5V

60µs PULSE WIDTH

≤

Tj = 25°C

)

10000

A

( t n e

r

r u

1000

C e

c

r u o S

-

100

o

t

n

i a

r D

,

D

I

TOP 15V

BOTTOM 2.5V

10

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

10000

) A

1000

(

t n e

r

r u

C

100

e c

r u o S

-

10

o

t

n

i a

r D

,

1

D

I

TJ = 175°C

TJ = 25°C

V

= 25V

DS

≤

60µs PULSE WIDTH

0.1 1 2 3 4 5

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

100000

) A

(

10000

t n e

r

r u

C e

c

r

1000

u o S

o

t

n

i a

r

100

D ,

D

I

TOP 15V

BOTTOM 2.5V

VGS

10V

8.0V

4.5V

3.5V

3.0V

2.7V

60µs PULSE WIDTH

≤

Tj = 175°C

2.5V

10

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output Characteristics

2.0

e c n a

t s

i s e

R n O

)

e c

d

r

e

u

z

i

o

l a

S

m

o

r

t

-

o

n

i

N

(

a

r D

,

) n o

( S D

R

1.5

1.0

ID = 195A

V

= 10V

GS

0.5

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

Fig 4. Normalized On-Resistance vs. Temperature

100000

) F

10000

p

( e

c n a

t

i c a p a

C

1000

, C

V

= 0V, f = 1 MHZ

GS

C

= C

+ Cgd, C

gs

gd

+ C

ds

iss

C

rss

C

oss

C

iss

C

oss

C

rss

SHORTED

ds

gd

5.0 ID= 185A

4.5

) V

(

4.0

e g a

3.5

t

l o V

3.0

e c

r u

2.5

o S

o

t

2.0

e

t a

1.5

G ,

S

1.0

G

V

VDS= 32V

VDS= 20V

0.5

100

1 10 100

VDS, Drain-to-Source Voltage (V)

0.0

0 20 40 60 80 100 120 140

QG, Total Gate Charge (nC)

Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage

www.irf.com 3

IRLB3034PbF

10000

) A

( t

1000

n e

r

r u

C n

i a

r D e

s

r e v e

R ,

D S

I

TJ = 175°C

100

TJ = 25°C

10

1.0

0.0 0.5 1.0 1.5 2.0 2.5

VSD, Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode

Forward Voltage

350

300

)

250

A

( t n e

r

200

r u

C n

i

150

a

r D ,

D

100

I

50

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Limited By Package

Fig 9. Maximum Drain Current vs.

V

GS

= 0V

10000

OPERATION IN THIS AREA

) A

1000

( t n e

r

r u

C

100

e c

r u o S

-

10

o

t

n

i a

r D ,

1

D

I

Tc = 25°C Tj = 175°C Single Pulse

0.1

0.1 1 10 100

LIMITED BY RDS(on)

100µsec

1msec

LIMITED BY PACKAGE

VDS, Drain-to-Source Voltage (V)

10msec

DC

Fig 8. Maximum Safe Operating Area

) V

(

50

e g a

t

l o V

n w

o d k a e

r B

e c

r u o S

o

t

n

i a

r D

,

S S D

) R B

(

V

Id = 5mA

48

46

44

42

40

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Temperature ( °C )

Fig 10. Drain-to-Source Breakdown Voltage

Case Temperature

2.5

2.0

)

1.5

J µ

( y

g

r e n

1.0

E

0.5

0.0 0 5 10 15 20 25 30 35 40 45

V

Drain-to-Source Voltage (V)

DS,

Fig 11. Typical C

Stored Energy

OSS

1200

) J

m

( y

1000

g

r e n E

e

800

h c n a

l a v

600

A e

s

l u P

400

e

l g n

i S ,

200

S A

E

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

TOP 38.9A

BOTTOM 195A

I

D

65.3A

Fig 12. Maximum Avalanche Energy vs. DrainCurrent

4 www.irf.com

1

τ

W

/ C

° )

Z (

e s n o p s e

R l a

m

r e h T

C J h

t

0.01

0.1

D = 0.50

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

τ

J

τ

J

τ

1

τ

1

Ci= τi/Ri

R

1

2

R

1

τ

2

3

R

2

3

τ

3

τ

2

3

Ri (°C/W) τi (sec)

4

R

4

0.02477 0.000025

τ

C

τ

0.08004 0.000077

4

τ

4

0.19057 0.001656

0.10481 0.008408

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

Duty Cycle = Single Pulse

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and

Tstart =25°C (Single Pulse)

) A

( t n e

r

r u

C e

h c n a

l a v A

100

10

0.01

0.05

0.10

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and

Tstart = 150°C.

1

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth

IRLB3034PbF

300

TOP Single Pulse BOTTOM 1.0% Duty Cycle

250

) J

m

( y

g

200

r e n E

e h

150

c n a

l a v A

100

,

R A

E

50

ID = 195A

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T

2. Safe operation in Avalanche is allowed as long asT

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

. This is validated for every part type.

jmax

is not exceeded.

jmax

= Average power dissipation per single avalanche pulse.

during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed T

(assumed as

jmax

25°C in Figure 14, 15). t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see Figures 13)

thJC

P

D (ave)

·f

av

= 1/2 ( 1.3·BV·Iav) = DT/ Z

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRLB3034PbF

3.0

) V

(

2.5

e g a

t

l o

2.0

V d

l o h s e

1.5

r h

t e

t a

1.0

G ,

) h

t

( S

0.5

G

V

0.0

ID = 250µA

ID = 1.0mA

ID = 1.0A

-75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( °C )

Fig 16. Threshold Voltage vs. Temperature

14

IF = 117A

12

VR = 34V

TJ = 25°C

10

TJ = 125°C

)

8

A

(

M R

6

R

I

14

IF = 78A

12

VR = 34V

TJ = 25°C

10

TJ = 125°C

)

8

A

(

M R

6

R

I

4

2

0

0 100 200 300 400 500

diF /dt (A/µs)

Fig. 17 - Typical Recovery Current vs. dif/dt

400

IF = 78A

VR = 34V

TJ = 25°C

300

TJ = 125°C

) A

(

200

R R

Q

4

2

0

0 100 200 300 400 500

diF /dt (A/µs)

400

300

) A

(

200

R R

Q

100

0

0 100 200 300 400 500

100

0

0 100 200 300 400 500

diF /dt (A/µs)

Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt

IF = 117A

VR = 34V

TJ = 25°C

TJ = 125°C

diF /dt (A/µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

6 www.irf.com

IRLB3034PbF

A

+

-

+

-





Reverse Recovery Current

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Current

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

V

DD

Re-Applied Voltage

Period

P.W.

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

V

15V

V

DS

L

DRIVER

t

p

(BR)DSS

R

G

V

20V

GS

Fig 22a. Unclamped Inductive Test Circuit

V

GS

R

G

10V

V

GS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

D.U.T

I

AS

Ω

0.01

t

p

+

V

DD

-

I

AS

Fig 22b. Unclamped Inductive Waveforms

R

V

DS

D

V

DS

90%

D.U.T.

V

DD

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Current Regulator

Same Type as D.U.T.

.2µF

12V

V

GS

50KΩ

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

+

V

DS

-

I

D

Vds

Vgs(th)

Qgs1

Qgs2 Qgd Qgodr

Id

Vgs

Fig 24a. Gate Charge Test Circuit

www.irf.com 7

Fig 24b. Gate Charge Waveform

IRLB3034PbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

(;$03/( 7+,6,6$1,5)

/27&2'( $66(0%/('21:: ,17+($66(0%/</,1(&

1RWH3LQDVVHPEO\OLQHSRVLWLRQ

LQGLFDWHV/HDG)UHH

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

,17(51$7,21$/

5(&7,),(5

/2*2

$66(0%/< /27&2'(

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

Visit us at www.irf.com for sales contact information. 01/09

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