Datasheet IRL540A Datasheet (Fairchild Semiconductor)

$GYDQF HG 3RZH U 026)(7

IRL540A

FEATURES

Avalanche Rugged Technology

♦

Rugged Gate Oxide Technology

♦

Lower Input Capacitance

♦

Improved Gate Charge

♦

Extended Safe Operating Area

♦

Lower Leakage Current: 10µA (Max.) @ V

♦

Lower R

♦

: 0.046Ω (Typ.)

DS(ON)

Absolute Maximum Ratings

Characteristic Value UnitsSymbol

Drain-to-Source Voltage Continuous Drain Current (T Continuous Drain Current (T Drain Current-Pulsed Gate-to-Source Volta ge Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25°C) Linear Derating Factor Operating Juncti on and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8

from case for 5-seconds

T

V

DSS

I

D

I

DM

V E

I

AR

E

dv/dt

P

, T

J

T

GS AS

AR

D

STG

L

= 100V

DS

=25°C)

C

=100°C)

C

(1)

(2) (1) (1) (3)

BV R

DSS

DS(on)

= 100 V

ID = 28 A

TO-220

1

2

3

1.Gate 2. Drain 3. Source

100

28

19.8 98

20

±

522

28

12.1

6.5

121

0.81

- 55 to +175

300

= 0.058Ω

V A A

V

mJ

A

mJ

V/ns

W

W/°C

°C

Thermal Resistance

R

θJC

R

CS

θ

R

θJA

Characteristic Max. UnitsSymbol Typ.

Junction-to-Case

Case-to-Sink

Junction-to-Ambient

--

0.5

--

1.24

--

62.5

°C/W

Rev. B

1

IRL540A

1&+$11(/

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Electrical Characteristics

CharacteristicSymbol

BV ∆BV/∆T V

I

R

C C t

t

DSS

GS(th)

GSS

DSS

DS(on)

g

fs

C

iss oss rss

d(on)

t

r

d(off)

t

f

Q

g

Q

gs

Q

gd

Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff.

J

Gate Threshold Voltage Gate-Source Leakage , Forwar d Gate-Source Leakage , Revers e

Drain-to-Sou rce Leakage Current

Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain (

Miller ) Charge

(TC=25°C unless otherwise specified)

Max. UnitsTyp.Min. Test Condition

V

100

--

1.0

--

0.1

--

22

1215

310 145

7 12 38 24

38.4

6.2

23.3

--

2.0

100

-100 10

100

0.058

--

1580

390 180

25 35 85 60 54

--

V

V/°C

V

nA

A

µ

Ω

pF

ns

nC

=0V,ID=250µA

GS

I

=250µA

D

VDS=5V,ID=250µA

=20V

V

GS

V

=-20V

GS

V

=100V

DS

V

=80V,TC=150°C

DS

=5V,ID=14A

V

GS

Ω

VDS=40V,ID=14A V

=0V,VDS=25V,f =1MHz

GS

See Fig 5

VDD=50V,ID=28A, R

=4.6

G

VDS=80V,VGS=5V,

=28A

I

D

See Fig 6 & Fig 12

See Fig 7

Ω

See Fig 13

(4)

(4) (5)

Source-Drain Diode Ratings and Characteristics

CharacteristicSymbol Max. UnitsTyp.Min. Test Condition

I

SM

V

t

Q

Notes;

(1) Repetitive Rating: Puls e Width Limited by Maximum Junction Te mperature (2) L=1mH, I (3) I (4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%

(5) Essentially Independent of Operating Temperature

Continuous Source Current

S

Pulsed- S o u rce Current Diode Forward Voltage

SD

Reverse Recove ry T ime

rr

Reverse Recovery Ch arge

rr

=28A, VDD=25V, RG=27Ω, Starting TJ =25°C

AS

28A, di/dt ≤ 400A/µs, V

≤

SD

DD

≤

BV

DSS

--

(1)

--

(4)

--

, Starting TJ =25°C

--

132

0.63

28 98

1.5

--

µ

A V

ns

C

Integral reverse pn-diode in the MOSFET T

=25°C,IS=28A,VGS=0V

J

T

=25°C,IF=28A

J

di

/dt=100A/µs

F

(4)

2

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Fig 1. Output Characteristics Fig 2. Transfer Characteristics

V

2

Top : 7.0 V 6 .0 V 5 .5 V 5 .0 V 4 .5 V 4 .0 V 3 .5 V Bottom : 3 .0 V

1

0

-1

10

GS

VDS , Drain-S ource Voltage [V]

, Drain C urrent [A] I

10

D

10

@ Notes :

1. 250 µs Pulse Test

2. TC = 25 oC

0

10

IRL540A

2

10

175 oC

1

10

25 oC

, Drain C urrent [A]

D

I

0

1

10

0246810

- 55 oC

VGS , Gate-So urce Voltage [V]

@ Notes :

1. V

GS

2. V

DS

3. 250

= 0 V = 40 V

s Pulse Test

µ

0.08

VGS = 5 V

VGS = 10 V

]

Ω

, [

DS(on)

R

0.06

0.04

0.02

Drain-Sour ce On-Resistance

0.00 0 30 60 90 120

ID , Drain C urrent [A]

Capacitanc e [pF]

2500

2000

1500

1000

500

C

iss

C

oss

C

rss

0

10

C

= Cgs+ Cgd ( Cds= shorted )

iss

C

= Cds+ C

oss

gd

C

= C

rss

gd

1

10

VDS , Drain-S ource Voltage [V]

@ Note : TJ = 25 oC

@ Notes :

1. V

= 0 V

GS

2. f = 1 MHz

Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistan ce vs. Drain Current

2

10

1

10

175 oC

, Reverse Drain Current [A]

DR

I

10

25 oC

0

0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

@ Notes :

1. V

GS

2. 250

= 0 V

s Pulse Test

µ

VSD , Source- Drain Voltage [V]

Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Vo ltage

6

4

2

, Gate-So urce Voltage [V]

GS

V

0

0 8 16 24 32 40

VDS = 20 V

VDS = 50 V

VDS = 80 V

@ Notes : ID = 28 A

QG , Total G ate Charge [nC]

IRL540A

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistan ce vs. Temperature

1.2

1.1

3.0

2.5

2.0

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1.0

, (Normal ized)

DSS

BV

0.9

@ Notes :

1. V

Drain-Sour ce Breakdown Voltag e

0.8

-75 -50 -25 0 25 50 75 100 125 150 175 200

2. I

TJ , Junctio n Temperature [oC]

Operation in T his Area

, Drain C urrent [A] I

D

2

10

1

10

0

10

-1

10

@ Notes :

1. T

= 25 oC

C

2. T

= 175 oC

J

3. Single Pu lse

0

is Limited by R

VDS , Drain-S ource Voltage [V]

10

DS(on)

1 ms

10 ms

DC

1

GS

= 250 µA

D

100 µs

= 0 V

1.5

, (Normal ized)

1.0

DS(on)

R

Drain-Sour ce On-Resistance

0.5

0.0

-75 -50 -25 0 25 50 75 100 125 150 175 200

@ Notes :

1. V

GS

2. I

D

= 5 V

= 14 A

TJ , Junctio n Temperature [oC]

Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area

30

24

18

12

, Drain C urrent [A]

D

I

6

2

10

0

25 50 75 100 125 150 175

Tc , Case Te mperature [oC]

10

(t) , Ther mal Resp onse

JC

θ

Z

10

Fig 11. Thermal Response

0

D=0.5

0.2

0.1

-1

0.05

0.02

0.01 single pulse

-2

-5

10

-4

10

t1 , Square W ave Puls e Du ration [sec]

-3

10

@ Notes :

1. Z

2. Duty Factor, D=t1/t

(t)=1.24 oC/W Max.

JC

θ

3. TJM-TC=PDM*Z

P

DM

-2

10

-1

10

2

(t)

JC

θ

t

1

t

2

0

10

1

10

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IRL540A

Fig 12. Gate Charge Test Circuit & Waveform

12V

10V

Current Regulator

200nF

3mA

R

G

50k

Ω

300nF

V

GS

R

1

Current Sampli ng (IG)

Resistor

V

out

V

in

V

Same Type

as DUT

V

GS

Q

10V

DS

Q

gs

DUT

R

2

Current Sampli ng (ID)

Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

R

L

V

out

90%

10%

V

in

t

d(on)tr

t

on

DUT

V

DD

( 0.5 rated V

)

DS

g

Q

gd

Charge

t

d(off)

t

f

t

off

Vary tp to obtain required peak I

5V

Fig 14. Un clamped Inductive Switching T est Circuit & Waveforms

BV

L

DUT

L

BV

I

D

C

V

DD

DSS

I

AS

V

DD

V

DS

D

R

G

t

p

E

=LL I

AS

----

1 2

2

AS

(t)

I

D

t

p

DSS

-------------------BV

-- V

DSS

DD

Time

V

(t)

DS

5

IRL540A

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Fig 15. Peak D iode Recovery dv/dt Test Circuit & Waveforms

V

GS

V

GS

( Driver )

DUT

+

V

DS

--

I

S

V

GS

Driver

R

G

D =

Same Type

as DUT

dv/dt controlled by R IS control led by Duty Factor D

Gate Pulse Width

-------------------------Gate Pulse Period

L

V

DD

G

10V

I

S

( DUT )

V

DS

( DUT )

IFM , Body Diode Forward Current

I

RM

Body Diode Revers e Current

Body Diode Recovery dv/dt

V

f

Body Diode

Forward Voltage Drop

di/dt

V

DD

6

TO-220 Package Dimensions

TO-220 (FS PKG CODE AE)

(1.70)

9.20 ±0.2013.08 ±0.20

1.30 ±0.10

(1.46)

(1.00)

1.27 ±0.10

9.90 ±0.20 (8.70)

ø3.60 ±0.10

(3.70)(3.00)

(45°)

1.52 ±0.10

2.80 ±0.1015.90 ±0.20

18.95MAX.

4.50 ±0.20

+0.10

1.30

–0.05

2.54TYP

[2.54 ±0.20]

10.00 ±0.20

0.80 ±0.10

2.54TYP

[2.54 ±0.20]

10.08 ±0.30

0.50

+0.10 –0.05

Dimensions in Millimeters

2.40 ±0.20

September 1999, Rev B

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ CoolFET™ CROSSVOLT™

2

E

CMOS

TM

FACT™ FACT Quiet Series™

®

FAST FASTr™ GTO™ HiSeC™

ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8

TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.