l Logic-Level Gate Drive
l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
Absolute Maximum Ratings
ParameterMax.Units
ID @ TC = 25°CContinuous Drain Current, VGS @ 10V17
ID @ TC = 100°CContinuous Drain Current, VGS @ 10V12A
I
DM
PD @TC = 25°CPower Dissipation79W
V
GS
E
AS
I
AR
E
AR
dv/dtPeak Diode Recovery dv/dt 5.0V/ns
T
J
T
STG
Pulsed Drain Current 60
Linear Derating Factor0.53W/°C
Gate-to-Source Voltage ± 16V
Single Pulse Avalanche Energy150mJ
Avalanche Current9.0A
Repetitive Avalanche Energy7.9m J
Operating Junction and-55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew10 lbf•in (1.1N•m)
and center of die contact
Input Capacitance–––800 –––VGS = 0V
Output Capacitance–––160 –––pFVDS = 25V
Reverse Transfer Capacitance–––90–––ƒ = 1.0MHz, See Fig. 5
Diode Forward Voltage––– –––1.3VTJ = 25°C, IS = 9.0A, VGS = 0V
Reverse Recovery Time––– 140 210nsTJ = 25°C, IF = 9.0A
Reverse RecoveryCharge––– 740 1100nCdi/dt = 100A/µs
Forward Turn-On TimeIntrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
= 25°C, L = 3.1mH
J
= 9.0A. (See Figure 12)
AS
17
60
I
≤ 9.0A, di/dt ≤ 540A/µs, V
SD
showing the
A
p-n junction diode.
DD
≤ V
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%
(BR)DSS
D
G
S
,
Page 3
IRL530N
)
A
)
A
A
A
100
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
10
1
D
I , Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
T = 25°C
0.1
0.1110100
V , Drain -to -S o u r ce Vo ltage (V
DS
J
Fig 1. Typical Output Characteristics
100
T = 25°C
J
T = 175°C
J
10
100
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
10
2.5V
1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
T = 175°C
0.1
0.1110100
V , Drain -to -S o u r ce Vo ltage (V
DS
J
Fig 2. Typical Output Characteristics
3.0
I = 1 5A
D
2.5
2.0
1.5
(No rma li z e d )
1
D
I , Dra in-to -S o urc e C u rre nt (A )
0.1
2345678910
V , Gate -to-S o urce Vo ltage (V)
GS
V = 50V
DS
20µs PULSE WIDTH
1.0
0.5
DS (on)
R , D r a in-to -S o u rc e O n R e s is ta nc e
0.0
-60 -40 -20020 40 60 80 100 120 140 160 180
T , J unc tion T emperatur e (°C )
J
V = 1 0 V
GS
Fig 3. Typical Transfer CharacteristicsFig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRL530N
)
A
A
)
A
g
)
A
1400
1200
1000
800
600
C, Capacitance (pF)
400
200
0
110100
V = 0V, f = 1MH z
GS
C = C + C , C S H O RTE D
iss gs gd ds
C = C
rss gd
C = C + C
oss ds g d
C
iss
C
oss
C
rss
V , Drain -to -S o u rc e Voltage (V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
15
I = 9 . 0A
V , Gate- to-Sour c e V o lta ge (V)
12
GS
D
9
6
3
V = 8 0 V
DS
V = 5 0 V
DS
V = 2 0 V
DS
FOR TEST CIRCUIT
0
0 1020304050
Q , T ota l G a te C h arge (nC
G
SE E F IG U RE 1 3
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
O P E R ATIO N IN THIS AREA L IM IT E D
BY R
DS(on)
T = 175°C
J
10
SD
I , R ev er se D r a in Curre nt (A)
1
0.40.60.81.01.21.4
V , Source-to-Drain Voltage (V)
SD
T = 25°C
J
V = 0V
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
100
10µs
10
D
I , Drain Current (A)
T = 25 °C
C
T = 17 5 °C
J
Sin
le Pu l se
1
1101001000
V , Drain -to -S o u r ce Vo ltage (V
DS
100µs
1ms
10ms
Fig 8. Maximum Safe Operating Area
Page 5
IRL530N
20
15
10
D
I , Drain Current (A)
5
0
255075100125150175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
thJC
D = 0.50
1
0.20
0.10
1 2
P
DM
t
1
t
2
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response (Z )
Notes:
1. Duty factor D = t / t
2. Peak T = Px Z+ T
0.01
0.000010.00010.0010.010.1 1
t , Rectangular Pulse Duration (sec)
1
JDMthJCC
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRL530N
A
)
D.U.T.
I
AS
L
0.01Ω
+
V
DD
-
R
5.0 V
V
DS
G
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
V
DS
I
AS
350
300
250
200
150
100
50
AS
V = 25 V
E , S ing le Puls e Avalan c h e E ne rg y ( mJ)
DD
0
255075100125150175
Starting T , Junction Temperature (°C
J
I
TO P 3.7A
6.4A
BOTTOM 9.0A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
Fig 12b. Unclamped Inductive Waveforms
Q
G
5.0 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
+
Fig 13b. Gate Charge Test Circuit
V
DS
-
Page 7
IRL530N
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P.W.
Period
+
-
VGS=10V
V
DD
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Current
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Page 8
IRL530N
A
A
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIM EN S IO NIN G & T O L E RA NC IN G PE R A NS I Y1 4.5 M , 19 82. 3 OU T L IN E C ON FO R M S T O JE DE C O U TL IN E T O -2 2 0 AB .
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
10.29 (.405)
1 2 3
Part Marking Information
TO-220AB
EXAMPLE :THIS IS AN IRF1010
EXAMPLE : THIS IS AN IRF1010
WITHASSEMBLY
W ITH AS S EMB LY
LOT CODE9B1M
LO T CO DE 9B 1 M
3.78 (.149)
3.54 (.139)
6.47 (.255)
6.10 (.240)
4
1.15 (.045)
M IN
4.06 (.160)
3.55 (.140)
0.93 (.037)
3X
0.69 (.027)
0.36 (.01 4) M B A M
INTERNATIONALRECTIFIERLOGO
ASSEMBLY
ASSEMBLY
LOTCODE
LO T C ODE
4.69 (.185)
- A -
4.20 (.165)
INTERN A TION A L
RE CTIFIER
L OG O
- B -
IRF1010
I RF1010
9246
9246
9B 1M
9B 1 M
1.32 (.052)
1.22 (.048)
LEAD ASSIGNMENTS
1 - GA T E
2 - DR A IN
3 - SO U RCE
4 - DR A IN
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
PARTNUMBER
PART NUMB ER
DATE CODE
DATE CODE
(YYWW)
(YYWW)
YY =YEAR
YY = YEAR
WW =WEEK
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/Data and specifications subject to change without notice.5/98
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