Datasheet IRL520A Datasheet (Fairchild Semiconductor)

$GYDQF HG 3RZH U 026)(7

IRL520A

FEATURES

Avalanche Rugged Technology

♦

Rugged Gate Oxide Technology

♦

Lower Input Capacitance

♦

Improved Gate Charge

♦

Extended Safe Operating Area

♦

Lower Leakage Current: 10µA (Max.) @ V

♦

Lower R

♦

: 0.176Ω (Typ.)

DS(ON)

Absolute Maximum Ratings

Characteristic Value UnitsSymbol

Drain-to-Source Voltage
Continuous Drain Current (T
Continuous Drain Current (T
Drain Current-Pulsed
Gate-to-Source Volta ge
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (TC=25°C)
Linear Derating Factor
Operating Juncti on and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8

from case for 5-seconds

T

V

DSS

I

D

I

DM

V
E

I

AR

E

dv/dt

P

, T

J

T

GS
AS

AR

D

STG

L

= 100V

DS

=25°C)

C

=100°C)

C

(1)

(2)
(1)
(1)
(2)

BV
R

DSS

DS(on)

= 100 V

ID = 9.2 A

TO-220

1

2

3

1.Gate 2. Drain 3. Source

100

9.2

6.5
32

20

±

112

9.2

4.9

6.5
49

0.33

- 55 to +175

300

= 0.22Ω

V
A
A

V

mJ

A

mJ

V/ns

W

W/°C

°C

Thermal Resistance

R

θJC

R

CS

θ

R

θJA

©1999 Fairchild Semiconductor Corpor ation

Characteristic Max. UnitsSymbol Typ.

Junction-to-Case

Case-to-Sink

Junction-to-Ambient

--

0.5

--

3.04

--

62.5

°C/W

Rev. B

1

IRL520A

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Electrical Characteristics

CharacteristicSymbol

BV
∆BV/∆T
V

R

DSS

GS(th)

I

GSS

I

DSS

DS(on)

g

fs

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

Q

Q

gs

Q

gd

Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.

J

Gate Threshold Voltage
Gate-Source Leakage , Forwar d
Gate-Source Leakage , Revers e

Drain-to-Sou rce Leakage Current

Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge

g

Gate-Source Charge
Gate-Drain (

Miller ) Charge

(TC=25°C unless otherwise specified)

Max. UnitsTyp.Min. Test Condition

V

100

--

1.0

--

--

--

--

--

--

--

--

--

--

--

--

--

--

--

--

--

0.1

--

--

--

--

--

--

7.7

340

90
39

5
10
19

9

10.2

1.7

6.0

--

--

2.0

100

-100
10

100

0.22

-­440
115

50
20
30
50
30
15

--

--

V

V/°C

V

nA

A

µ

Ω

pF

ns

nC

=0V,ID=250µA

GS

I

=250µA

D

VDS=5V,ID=250µA

=20V

V

GS

V

=-20V

GS

V

=100V

DS

V

=80V,TC=150°C

DS

=5V,ID=4.6A

V

GS

Ω

VDS=40V,ID=4.6A
V

=0V,VDS=25V,f =1MHz

GS

See Fig 5

VDD=50V,ID=9.2A,
R

=9

G

VDS=80V,VGS=5V,

=9.2A

I

D

See Fig 6 & Fig 12

See Fig 7

Ω

See Fig 13

(4)

(4) (5)

(4) (5)

(4)

Source-Drain Diode Ratings and Characteristics

CharacteristicSymbol Max. UnitsTyp.Min. Test Condition

I

I

SM

V

t

Q

Notes;

(1) Repetitive Rating: Pu lse Width Limited by Maximum Junction Temperatu re
(2) L=2mH, I
(3) I
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%

(5) Essentially Independent of Operating Temper ature

Continuous Source Current

S

Pulsed- S o u rce Curren t
Diode Forward Voltage

SD

Reverse Recove ry T ime

rr

Reverse Recovery Ch arge

rr

=9.2A, VDD=25V, RG=27Ω, Starting TJ =25°C

AS

9.2A, di/dt ≤ 300A/µs, V

≤

SD

DD

≤

BV

DSS

--

(1)

--

(4)

--

--

--

, Starting TJ =25°C

--

--

--

98

0.34

9.2
32

1.5

--

--

µ

A
V

ns

C

Integral reverse pn-diode
in the MOSFET
T

=25°C,IS=9.2A,VGS=0V

J

T

=25°C,IF=9.2A

J

di

/dt=100A/µs

F

(4)

2

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Fig 1. Output Characteristics Fig 2. Transfer Characteristics

V

GS

Top : 7.0 V
6 .0 V
5 .5 V

1

10

5 .0 V
4 .5 V
4 .0 V
3 .5 V
Bottom : 3.0 V

0

10

, Drain C urrent [A]

D

I

-1

10

-1

10

VDS , Drain-S ource Voltage [V]

@ Notes :

1. 250 µs Pulse Test

2. TC = 25 oC

0

10

IRL520A

1

10

175 oC

0

10

25 oC

, Drain C urrent [A]

D

I

-1

1

10

10

0246810

- 55 oC

VGS , Gate-So urce Voltage [V]

@ Notes :

1. V

GS

2. V

DS

3. 250

= 0 V
= 40 V

s Pulse Test

µ

0.4

]

Ω

, [

DS(on)

R

0.3

0.2

0.1

Drain-Sour ce On-Resistance

VGS = 5 V

VGS = 10 V

@ Note : TJ = 25 oC

0.0
0 10203040

ID , Drain C urrent [A]

Capacitanc e [pF]

600

C

480

360

iss

C

oss

240

C

rss

120

0

0

10

C

= Cgs+ Cgd ( Cds= shorted )

iss

C

= Cds+ C

oss

gd

C

= C

rss

gd

1

10

@ Notes :

1. V

= 0 V

GS

2. f = 1 MHz

VDS , Drain-S ource Voltage [V]

Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Curre nt

1

10

0

10

, Reverse Drain Current [A]

175 oC

DR

I

10

25 oC

-1

0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2

@ Notes :

1. V

GS

2. 250

= 0 V

s Pulse Test

µ

VSD , Source- Drain Voltage [V]

Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage

6

4

2

, Gate-So urce Voltage [V]

GS

V

0

024681012

VDS = 20 V

VDS = 50 V

VDS = 80 V

@ Notes : ID = 9.2 A

QG , Total G ate Charge [nC]

3

IRL520A

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2

1.1

3.0

2.5

2.0

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1.0

, (Normal ized)

DSS

BV

0.9

@ Notes :

1. V

Drain-Sour ce Breakdown Voltag e

0.8

-75 -50 -25 0 25 50 75 100 125 150 175 200

2. I

TJ , Junctio n Temperature [oC]

2

, Drain C urrent [A]
I

D

10

1

10

0

10

-1

10

10

@ Notes :

1. T

2. T

3. Single Pu lse

0

Operation in T his Area
is Limited by R

DS(on)

DC

= 25 oC

C

= 175 oC

J

1

VDS , Drain-S ource Voltage [V]

10

10 ms

GS

= 250 µA

D

100 µs

1 ms

= 0 V

1.5

, (Normal ized)

1.0

DS(on)

R

Drain-Sour ce On-Resistance

0.5

0.0

-75 -50 -25 0 25 50 75 100 125 150 175 200

@ Notes :

1. V

GS

2. I

D

= 5 V

= 4.6 A

TJ , Junctio n Temperature [oC]

Fig 10. Max. Drain Current vs. Case Temperat ureFig 9. Max. Safe Operating Area

10

8

6

4

, Drain C urrent [A]

D

I

2

2

10

0

25 50 75 100 125 150 175

Tc , Case Te mperature [oC]

10

10

(t) , Ther mal Resp onse

JC

θ

Z

Fig 11. Thermal Response

D=0.5

0

0.2

0.1

0.05

-1

0.02

0.01
single pulse

-5

10

-4

10

t1 , Square W ave Puls e Du ration [sec]

-3

10

@ Notes :

1. Z

2. Duty Factor, D=t1/t

3. TJM-TC=PDM*Z

-2

10

(t)=3.04 oC/W Max.

JC

θ

P

DM

t

-1

10

2

(t)

JC

θ

1

t

2

0

10

1

10

4

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IRL520A

Fig 12. Gate Charge Test Circuit & Waveform

12V

10V

Current Regulator

200nF

3mA

R

G

50k

Ω

300nF

V

GS

R

1

Current Sampli ng (IG)

Resistor

V

out

V

in

V

Same Type

as DUT

V

GS

Q

10V

DS

Q

gs

DUT

R

2

Current Sampli ng (ID)

Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

R

L

V

out

90%

10%

V

in

t

d(on)tr

t

on

DUT

V

DD

( 0.5 rated V

)

DS

g

Q

gd

Charge

t

d(off)

t

f

t

off

Vary tp to obtain
required peak I

5V

Fig 14. Un clamped Inductive Switching Test Circuit & Waveforms

BV

L

DUT

L

BV

I

D

C

V

DD

DSS

I

AS

V

DD

V

DS

D

R

G

t

p

E

=LL I

AS

----

1
2

2

AS

(t)

I

D

t

p

DSS

-------------------­BV

-- V

DSS

DD

Time

V

(t)

DS

5

IRL520A

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Fig 15. Peak D iode Recovery dv/dt Test Circuit & Waveforms

V

GS

V

GS

( Driver )

DUT

+

V

DS

--

I

S

V

GS

Driver

R

G

D =

Same Type

as DUT

dv/dt controlled by R
IS control led by Duty Factor D

Gate Pulse Width

-------------------------­Gate Pulse Period

L

V

DD

G

10V

I

S

( DUT )

V

DS

( DUT )

IFM , Body Diode Forward Current

I

RM

Body Diode Revers e Current

Body Diode Recovery dv/dt

V

f

Body Diode

Forward Voltage Drop

di/dt

V

DD

6

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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or
In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.

This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.