Datasheet irl3303s Datasheet

PD - 9.1323B

IRL3303S/L

l Logic-Level Gate Drive l Advanced Process Technology

l Surface Mount (IRL3303S) l Low-profile through-hole (IRL3303L) l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated

Description

G

HEXFET® Power MOSFET

D

S

R

DS(on)

V

DSS

= 38A

I

D

= 30V

= 0.026Ω

Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

2

The D

Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The

2

D

Pak is suitable for high current applications because of

2

D Pa k

TO-262

its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL3303L) is available for lowprofile applications.

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 38

@ TC = 100°C Continuous Drain Current, VGS @ 10V 27 A

I

D

I

DM

PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 68 W

V

GS

E

AS

I

AR

E

AR

dv/d t Peak Diode Recovery dv/dt  5.0 V/ns T

J

T

STG

Pulsed Drain Current  140

Linear Derating Factor 0.45 W/°C Gate-to-Source Voltage ±16 V Single Pulse Avalanche Energy 130 mJ Avalanche Current 20 A Repetitive Avalanche Energy 6.8 mJ

Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θJA

Junction-to-Case ––– 2.2 Junction-to-Ambient ( PCB Mounted,steady-state)** –– – 40

°C/W

°C

8/25/97

IRL3303S/L

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

S

C

iss

C

oss

C

rss

Source-Drain Ratings and Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.035 –– – V/° C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance

––– ––– 0.026 VGS = 10V, ID = 20A  ––– ––– 0.040

Ω

VGS = 4.5V, ID = 17A  TJ = 150°C Gate Threshold Voltage 1.0 ––– V VDS = VGS, ID = 250µA Forward Transconductance 12 ––– ––– S VDS = 25V, ID = 20A

Drain-to-Source Leakage Current

––– ––– 25

––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 V Gate-to-Source Reverse Leakage ––– ––– -100

µA

nA

= 30V, VGS = 0V

V

DS

= 16V

GS

VGS = -16V Total Gate Charge ––– ––– 26 ID = 20A Gate-to-Source Charge ––– ––– 8.8 nC VDS = 24V Gate-to-Drain ("Miller") Charge ––– ––– 15 VGS = 4.5V, See Fig. 6 and 13  Turn-On Delay Time ––– 7.4 ––– VDD = 15V Rise Time ––– 200 ––– ID = 20A Turn-Off Delay Time ––– 14 ––– RG = 6.5Ω Fall Time ––– 36 ––– RD = 0.7Ω, See Fig. 10 

Internal Source Inductance 7.5

––– –––

Between lead,

nH

and center of die contact Input Capacitance ––– 870 ––– VGS = 0V Output Capacitance ––– 340 – –– pF VDS = 25V Reverse Transfer Capacitance ––– 170 ––– ƒ = 1.0MHz, See Fig. 5

Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode) 

––– –––

38

140

showing the

A

p-n junction diode. Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 20A, VGS = 0V  Reverse Recovery Time ––– 72 110 n s TJ = 25°C, IF = 20A Reverse Recovery Charge ––– 180 28 0 µC di/dt = 100A/µs Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)



D

G

S

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

 V

= 15V, starting TJ = 25°C, L = 470µH

DD

RG = 25Ω, I

= 20A. (See Figure 12)

AS

≤ 20A, di/dt ≤ 140A/µs, V

SD

TJ ≤ 175°C

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

 Uses IRL3303 data and test conditions.

DD

≤ V

 I

** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.

(BR)DSS

,

IRL3303S/L

1000

VGS TO P 15V 12V 10V

8.0V

6.0V

4.0V

3.0V

100

BOTTOM 2.5V

10

1

D

I , D rain-to -S o urc e C u rre nt (A )

2.5V 20µs PULSE W IDTH

T = 25 °C

0.1

0.1 1 10 100

V , Drain -to -Source V oltag e ( V)

DS

J

Fig 1. Typical Output Characteristics

1000

VGS TOP 15V 12V 10V

8.0V

6.0V

4.0V

3.0V

100

BOTT OM 2.5V

10

2.5V

1

D

I , D rain-to -S o urc e C u rre nt (A )

20µs PULSE W IDTH T = 175°C

A

0.1

0.1 1 10 100

V , Dra in-to-So urc e V olta ge (V )

DS

J

A

Fig 2. Typical Output Characteristics

2.0

I = 34A

D

100

10

1

D

I , Dra in -to -Sou rce C urr en t (A )

0.1 2345678910

T = 25°C

J

T = 175°C

J

V = 15V

DS

20µs PULSE WIDTH

V , Ga te -to-So u rc e Vo ltag e (V)

GS

Fig 3. Typical Transfer Characteristics

1.5

1.0

(No rm a lized)

0.5

DS(on)

R , D rain -to-S ou rc e O n R e si stan ce

A

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Ju nc tion Temperature (°C )

J

V = 1 0V

GS

A

Fig 4. Normalized On-Resistance

Vs. Temperature

IRL3303S/L

1600

1400

1200

1000

800

600

C , Capac itance (pF)

400

200

0

1 10 100

V = 0V , f = 1MHz

GS

C = C + C , C SHORT E D

is s gs gd ds

C = C

rss gd

C = C + C

oss d s gd

C

iss

C

oss

C

rss

V , Drain-to -Sou rce Vo ltage (V )

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

15

I = 20A

V , Gate-to-Source Voltage (V )

12

9

6

3

GS

D

V = 2 4V

DS

V = 1 5V

DS

FOR TEST CIRCUIT

A

0

0 10203040

Q , To tal Ga te Cha rge (nC )

G

SEE FIGURE 13

A

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

O PERA T ION IN THIS ARE A LIM ITED B Y R

DS(on)

100

T = 175°C

J

T = 25 °C

10

SD

I , Rev ers e Dr ain C u rren t (A)

1

0.0 0.5 1.0 1.5 2.0 2.5

V , Source-to-Drain Voltage (V )

SD

J

V = 0V

Fig 7. Typical Source-Drain Diode

Forward Voltage

GS

100

10

D

I , D rain C u rren t (A)

T = 25° C

C

T = 175 ° C

J

A

Single Pulse

1

1 10 100

V , Drain-to-So urc e Vo ltag e (V)

DS

10µs

100µs

1ms

10ms

A

Fig 8. Maximum Safe Operating Area

+

-

40

30

20

D

I , Drain Current (A)

10

0

25 50 75 100 125 150 175

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

IRL3303S/L

V

DS

V

GS

R

G

4.5V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

Fig 10b. Switching Time Waveforms

D.U.T.

t

d(off)tf

V

DD

10

thJC

D = 0.50

1

0.20

0.10

0.05

0.1

0.02

0.01

SINGLE PULSE

(THERMAL RESPONSE)

Thermal Response (Z )

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

0.01

0.00001 0.0001 0.001 0.01 0.1

t , Rectangular Pulse Duration (sec)

1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

J DM thJC C

1 2

P

DM

t

1

t

2

IRL3303S/L

D.U.T .

I

AS

L

0.01Ω

+

V

DD

-

R

10 V

V

DS

G

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

V

DD

V

DS

I

AS

Fig 12b. Unclamped Inductive Waveforms

300

250

200

150

100

50

AS

V = 15 V

E , S in gle Pulse A valanche Energ y (m J)

DD

0

25 50 75 100 125 150 175

Starting T , Junction Temperature (°C)

J

I TOP 8.3 A 14 A BOTTOM 20A

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

D

A

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

12V

.2µF

V

GS

.3µF

D.U.T .

3mA

I

G

Current Sampling Resistors

I

D

Fig 13b. Gate Charge Test Circuit

+

V

DS

-

IRL3303S/L

+

-

Peak Diode Recovery dv/dt Test Circuit



D.U.T

+



-

R

G

Driver Gate Drive

P.W.

+

Circuit Layout Considerations

• Low Stray Inductance



• Ground Plane

• Low Leakage Inductance Current Transformer

-

• dv/dt controlled by R

• Driver same type as D.U.T.

controlled by Duty Factor "D"

• I

SD

• D.U.T. - Device Under Test

Period

-

D =



G

Period

P.W.

+

V

DD

VGS=10V

*

Reverse Recovery Current

Re-Applied Voltage

D.U.T. ISDWaveform

Body Diode Forward

D.U.T. VDSWaveform

Body Diode Forward Drop

Inductor Curent

Ripple ≤ 5%

* V

= 5V for Logic Level Devices

GS

Fig 14. For N-Channel HEXFETS

Current

di/dt

Diode Recovery

dv/dt

V

DD

I

SD

IRL3303S/L

D2Pak Package Outline

10.54 (.415)

1.40 (.055) MAX.

1.78 (.070)

1.27 (.050)

1.40 (.055)

3X

1.14 (.045)

5.08 (.200)

NOTES: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.

10.29 (.405)

- A 2

1 3

15.49 (.610)

14.73 (.580)

0.93 (.037)

3X

0.69 (.027)

0.25 (.010) M B A M

Part Marking Information

D2Pak

4.69 (.185)

4.20 (.165)

5.28 (.208)

4.78 (.188)

0.55 (.022)

0.46 (.018)

- B -

1.32 (.052)

1.22 (.048)

2.79 (.110)

2.29 (.090)

1.39 (.055)

1.14 (.045)

LEAD ASS IGNM ENT S 1 - GATE 2 - DRAIN 3 - SOURC E

10.16 (.400) REF.

6.47 (.255)

6.18 (.243)

2.61 (.103)

2.32 (.091)

8.89 (.350) REF.

MINIMUM RECOMMENDED FOOTP RINT

11.43 (.450)

8.89 (.350)

17.78 (.700)

3.81 (.150)

2.08 (.082) 2X

2.54 (.100) 2X

INTERNATIONAL RECTIFIE R L OG O

AS SEMBLY LOT CO DE

F530S

9246

9B 1M

PART NUMBER

A

DATE CODE (YYW W) YY = YEAR WW = WEEK

Package Outline

TO-262 Outline

IRL3303S/L

Part Marking Information

TO-262

IRL3303S/L

Tape & Reel Information

D2Pak

TRR

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

1.60 (.063)

1.50 (.059)

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

1.85 (.073)

1.65 (.065)

TRL

10.90 (.429)

10.70 (.421)

FEED DIRECTION

13.5 0 (. 532 )

12.8 0 (. 504 )

330.0 0 (14.17 3) M A X .

NOT ES :

1. CO MFO R MS T O EIA -418 .

2. CONTRO LLING DIMEN SION: MILLIME TER .

3. DIM E NS IO N MEASURE D @ HUB .

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

11.6 0 (.457 )

11.4 0 (.449 )

1.75 (.0 69 )

1.25 (.0 49 )

16.10 (.634)

15.90 (.626)

15.4 2 (.609 )

15.2 2 (.601 )

27.4 0 (1 .079 )

23.9 0 (.9 41) 4

26.40 (1. 03 9)

24.40 (.961)

3

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

60.0 0 (2 .36 2) MIN.

30.4 0 (1 .19 7) MA X .

4

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http://www.irf.com/ Data and specifications subject to change without notice. 8/9 7