Logic-Level Gate Drive
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design for which HEXFET
Power MOSFETs are well known, provides the designer with an
extremely efficient and reliable device for use in a wide variety
of applications.
The TO-220 package is universally preferred for all commercialindustrial applications at power dissipation levels to approximately
50 watts. The low thermal resistance and low package cost of the
TO-220 contribute to its wide acceptance throughout the industry.
Absolute Maximum Ratings
ParameterMax.Units
ID @ TC = 25°CContinuous Drain Current, VGS @ 10V48
ID @ TC = 100°CContinuous Drain Current, VGS @ 10V34A
I
DM
PD @TC = 25°CPower Dissipation150W
V
GS
E
AS
I
AR
E
AR
dv/dtPeak Diode Recovery dv/dt 7.4V/ns
T
J
T
STG
Pulsed Drain Current 190
Linear Derating Factor1.0W/°C
Gate-to-Source Voltage ± 20V
Single Pulse Avalanche Energy520mJ
Avalanche Current29A
Repetitive Avalanche Energy15mJ
Operating Junction and-55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew10 lbf•in (1.1N•m)
ns
Fall Time–––55–––RD = 1.7Ω, See Fig. 10
Internal Drain Inductance–––4.5–––
Internal Source Inductance–––7.5–––
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance––– 3700 –––VGS = 0V
Output Capacitance–––630 –––pFVDS = 25V
Reverse Transfer Capacitance–––330 –––ƒ = 1.0MHz, See Fig. 5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRL2910
A
A
15V
DRIVER
+
-
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
1400
1200
1000
800
V
DD
600
400
200
AS
V = 25V
E , Single Pulse Avalanche Energy (mJ)
DD
0
255075100125150175
Starting T , Junction Temperature (°C)
J
I
TOP 12A
D
20A
BOTTOM 29A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
5.0 V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
Page 7
IRL2910
Peak Diode Recovery dv/dt Test Circuit
D.U.T
R
G
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
V
DD
*
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Page 8
IRL2910
A
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB .
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASURE MENTS DO NOT INCLUDE BURRS.
10.29 (.405)
1 2 3
2X
Part Marking Information
TO-220AB
EXAMPLE : THIS IS AN IRF1010
WITH ASSEMBLY
LOT CODE 9B1M