Page 1
PRELIMINARY
PD 9.1091A
IRL2203S
HEXFET® Power MOSFET
l
Logic-Level Gate Drive
l Surface Mount
l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
2
The D
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
2
D
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 100
@ TC = 100°C Continuous Drain Current, VGS @ 10V 71 A
I
D
I
DM
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 130 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 1.2 V/ns
T
J
T
STG
Pulsed Drain Current 400
Linear Derating Factor 0.83 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 390 mJ
Avalanche Current 60 A
Repetitive Avalanche Energy 13 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
D
R
DS(on)
V
DSS
= 0.007Ω
= 30V
ID = 100A
S
D2Pak
°C
Thermal Resistance
R
θJC
R
θJA
Junction-to-Case ––– 1.2
Junction-to-Ambient ( PCB Mounted,steady-state)** –– – 40
Parameter Typ. Max. Units
°C/W
Page 2
IRL2203S
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.035 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance
––– ––– 0.007 V
––– ––– 0.01 VGS = 4.5V, ID = 50A
= 10V, ID = 60A
GS
Gate Threshold Voltage 1.0 ––– 2.5 V VDS = VGS, ID = 250µA
Forward Transconductance 4 7 ––– ––– S VDS = 25V, ID = 60A
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– –– – -100 VGS = -20V
––– ––– 25
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C
µA
nA
= 30V, VGS = 0V
V
DS
= 20V
V
GS
Total Gate Charge ––– ––– 110 ID = 60A
Gate-to-Source Charge –– – ––– 3 1 nC VDS = 24V
Gate-to-Drain ("Miller") Charge ––– ––– 57 VGS = 4.5V, See Fig. 6 and 13
Turn-On Delay Time ––– 15 ––– VDD = 15V
Rise Time ––– 210 –––
Turn-Off Delay Time ––– 29 ––– RG = 1.8Ω, VGS = 4.5V
ns
ID = 60A
Fall Time ––– 54 ––– RD = 0.25Ω, See Fig. 10
Internal Source Inductance 7.5
––– –––
Between lead,
nH
and center of die contact
Input Capacitance ––– 3500 ––– VGS = 0V
Output Capacitance ––– 1400 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 690 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
RG = 25Ω, I
I
SD
TJ ≤ 175°C
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
100
400
showing the
A
p-n junction diode.
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 60A, VGS = 0V
Reverse Recovery Time ––– 94 140 ns TJ = 25°C, IF = 60A
Reverse RecoveryCharge ––– 280 41 0 nC di/dt = 100A/µs
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 15V, starting TJ = 25°C, L = 220µH
= 60A. (See Figure 12)
AS
≤ 60A, di/dt ≤ 140A/µs, V
DD
≤ V
(BR)DSS
,
Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
package refer to Design Tip # 93-4
Uses IRL2203N data and test conditions.
D
G
S
Page 3
IRL2203S
1000
VGS
TO P 1 5V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain- to-S o urce C u rrent ( A)
2.5V
20µs PULSE WIDTH
T = 25° C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 1. Typical Output Characteristics,
TJ = 25oC
1000
1000
VGS
TO P 1 5V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain- to-S o urce C u rrent ( A)
2.5V
20µs PULSE WIDTH
T = 175°C
A
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
A
Fig 2. Typical Output Characteristics,
TJ = 175oC
2.0
I = 100A
D
T = 25°C
J
100
10
D
I , Dr a in -to -So u r ce Cu r ren t (A)
1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
V , Ga te-to-So urce Voltage (V)
GS
T = 175°C
J
V = 15 V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
1.5
1.0
( N ormalized)
0.5
DS (on )
R , Dra in-to-Source On Res istanc e
A
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Te mp era ture (°C)
J
V = 10V
GS
A
Fig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRL2203S
8000
6000
4000
C, C apac itance (pF)
2000
0
1 10 100
V = 0V , f = 1 M Hz
GS
C = C + C , C SHORTE D
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rs s
V , Drai n-to -Sourc e V olt ag e (V )
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
15
I = 60A
D
12
9
6
3
GS
V , Gate-to-So urce Vo ltage (V)
A
0
0 30 60 90 120 150
Q , To tal Gate Ch arge (n C)
G
V = 2 4V
DS
V = 1 5V
DS
FOR TEST CIRCUIT
SEE FIGURE 13
A
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10µs
T = 25 °C
J
T = 175°C
J
100
SD
I , R ev erse D r ain C u rren t (A )
10
0.5 1.0 1.5 2.0 2.5 3.0 3.5
V , Source-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
100
10
D
I , Drain Cu rrent (A )
T = 25°C
C
T = 175°C
J
A
Single Pulse
1
1 10 100
V , Drain-to-So urc e Vo ltag e (V)
DS
100µs
1ms
10ms
A
Fig 8. Maximum Safe Operating Area
Page 5
100
80
60
LIMITED BY PACKAGE
V
DS
V
GS
R
G
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
IRL2203S
R
D
D.U.T.
+
V
DD
-
40
D
I , D rain C u rren t (Am p s )
20
0
25 50 75 100 125 150 175
T , C ase T empe rature (°C)
C
Fig 9. Maximum Drain Current Vs.
A
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
Case Temperature
10
thJC
1
D = 0.50
0.20
DM
P
12
thJC
DM
t
1
t
2
C
0.10
0.1
0.05
Therm al Respon se (Z )
0.01
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectan gular Pulse Duration (sec)
1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J
A
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRL2203S
15V
DRIVER
+
-
V
DD
R
5.0 V
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
1000
I
TOP 24A
D
4 2 A
800
A
600
400
200
AS
V = 1 5 V
E , S ingle Pulse A valanc he E nergy (mJ )
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
B OTTOM 60A
A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Q
G
5.0 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
+
D.U.T .
V
GS
3mA
I
G
Current Sampling Resistors
-
I
D
Fig 13b. Gate Charge Test Circuit
V
DS
Page 7
Peak Diode Recovery dv/dt Test Circuit
IRL2203S
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
controlled by Duty Factor "D"
• I
SD
• D.U.T. - Device Under Test
Period
-
D =
G
P.W.
Period
+
+
V
DD
-
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Diode Recovery
dv/dt
Fig 14. For N-Channel HEXFETS
di/dt
V
DD
I
SD
Page 8
IRL2203S
Package Outline — D2Pak
Dimensions are shown in millimeters (inches)
10.54 (.415)
1.40 (.055)
M AX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTES:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A 2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.25 (.010) M B A M
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
LEAD ASSIGNMENTS
1 - GA TE
2 - DRAIN
3 - SOURCE
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
10.16 (.400)
REF.
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350)
REF.
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
2.54 (.100)
2X
Part Marking
EXAMPL E : THIS IS AN IRF1 010
EX AMP LE : T HIS I S AN I RF530S
W ITH ASSEMBLY
L O T C O DE 9 B 1 M
W IT H AS SEM BL Y
LO T CO D E 9 B1M
INTERNATIONAL
INTERNATIONAL
R E CTIF IE R
R ECTIF IER
L O GO
LOGO
ASSEMBLY
LO T CODE
ASSEMBLY
LO T COD E
IRF1010
F530S
9246
9B 1 M
9 B 1 M
9246
PART NUMBER
PART NUMBER
DATE CODE
DATE C O DE
(YYW W)
(YYWW)
YY = YEAR
YY = YE AR
WW = WEEK
WW = WEEK
A
A
Page 9
Tape & Reel — D2Pak
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
1.60 (.063)
1.50 (.059)
IRL2203S
0.368 (.0145)
0.342 (.0135)
FEE D D IRECTION
1.85 (. 073)
1.65 (. 065)
TRL
10.90 (.429)
10.70 (.421)
FEE D D IRECTION
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
NOTES :
1. CO MFORMS TO EIA-418.
2. CO NTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUD ES F LAN G E DISTORTION @ OU TER EDGE.
11.60 (.457)
11.40 (.449)
1.75 (.069)
1.25 (.049)
16.10 (.634)
15.90 (.626)
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.40 (1.039)
24.40 (.961)
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362)
M IN .
30.40 (1.197)
M AX .
4
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http://www.irf.com/ Data and specifications subject to change without notice. 7/96
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