Page 1
PD - 93854A
IRL1404S
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
Description
G
Seventh Generation HEXFET® power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRL1404L) is available for lowprofile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 160
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 110 A
I
DM
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 200 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 640
Linear Derating Factor 1.3 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 520 mJ
Avalanche Current 95 A
Repetitive Avalanche Energy 20 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.75
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient (PCB Mounted) ––– 40
HEXFET® Power MOSFET
D
V
= 40V
DSS
R
S
D2Pak
IRL1404S
= 0.004Ω
DS(on)
= 160A
I
D
TO-262
IRL1404L
IRL1404L
°C
www.irf.com 1
02/22/02
Page 2
IRL1404S/IRL1404L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 1500 ––– VGS = 0V, VDS = 0V to 32V
oss
Drain-to-Source Breakdown Voltage 40 ––– ––– VVGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.038 ––– V/°C Reference to 25°C, D = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.004 Ω VGS = 10V, ID = 95A
0.0059 VGS = 4.3V, ID = 40A
Gate Threshold Voltage 1.0 ––– 3.0 V VDS = VGS, ID = 250µA
Forward Transconductance 93 ––– ––– SVDS = 25V, ID = 95A
Drain-to-Source Leakage Current
––– ––– 20
––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 V
Gate-to-Source Reverse Leakage ––– ––– -200
VDS = 40V, VGS = 0V
µA
= 20V
GS
nA
VGS = -20V
Total Gate Charge ––– ––– 140 ID = 95A
Gate-to-Source Charge ––– ––– 48 nC VDS = 32V
Gate-to-Drain ("Miller") Charge ––– ––– 60 VGS = 5.0V, See Fig. 6
Turn-On Delay Time ––– 18 ––– VDD = 20V
Rise Time ––– 270 ––– ID = 95A
ns
Turn-Off Delay Time ––– 38 ––– RG = 2.5Ω VGS = 4.5V
Fall Time ––– 130 ––– RD = 0.25Ω
Internal Drain Inductance
Internal Source Inductance ––– –––
4.5
––– –––
7.5
nH
Between lead,
6mm (0.25in.)
from package
and center of die contact
Input Capacitance ––– 6600 ––– VGS = 0V
Output Capacitance ––– 1700 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 350 ––– ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 6700 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 1500 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
160
640
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 95A, VGS = 0V
Reverse Recovery Time ––– 63 94 ns TJ = 25°C, IF = 95A
Reverse RecoveryCharge ––– 170 250 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2 www.irf.com
D
S
Page 3
IRL1404S/IRL1404L
1000
100
D
I , Drain-to-Source Current (A)
10
0.1 1 10 100
1000
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.3V
V , Drain-to-Source Voltage (V)
DS
4.3V
20µs PULSE WIDTH
T = 25 C
J
°
1000
100
D
I , Drain-to-Source Current (A)
10
0.1 1 10 100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.3V
V , Drain-to-Source Voltage (V)
DS
4.3V
20µs PULSE WIDTH
T = 175 C
J
°
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.5
160A
I =
D
°
T = 25 C
J
°
T = 175 C
J
D
I , Drain-to-Source Current (A)
V = 15V
DS
100
4.0 5.0 6.0 7.0 8.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature( C)
J
Fig 4. Normalized On-Resistance
V =
10V
GS
°
Vs. Temperature
www.irf.com 3
Page 4
IRL1404S/IRL1404L
)
10000
8000
6000
4000
C, Capacitance (pF)
2000
0
1 10 100
V
=
0V,
GS
C
=
issgsgd , ds
C
=
rssgd
C
=
oss dsgd
V , Drain-to-Source Voltage (V)
DS
f = 1MHz
C
+ C
+ C
C
C
C
iss
oss
rss
C SHORTED
C
C
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I =
95A
D
V = 32V
DS
V = 20V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 100 200 300 400 500
Q , Total Gate Charge (nC)
G
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA LIMITED
BY R
DS(on
13
100
10
SD
I , Reverse Drain Current (A)
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
°
T = 175 C
J
°
T = 25 C
J
V ,Source-to-Drain Voltage (V)
SD
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
1000
100
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 175 C
Single Pulse
10
1 10 100
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10us
100us
1ms
10ms
Forward Voltage
4 www.irf.com
Page 5
IRL1404S/IRL1404L
160
LIMITED BY PACKAGE
120
80
D
I , Drain Current (A)
40
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
V
DS
90%
10%
V
GS
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
t
d(on)tr
R
D.U.T.
t
d(off)tf
D
+
V
DD
-
D = 0.50
thJC
0.01
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
P
DM
t
1 2
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com 5
Page 6
IRL1404S/IRL1404L
A
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
DD
1200
TOP
1000
800
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
D
39A
67A
95A
°
Current Regulator
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
Same Type as D.U.T.
.2µF
12V
V
GS
50KΩ
.3µF
D.U.T.
3mA
I
Current Sampling Resistors
I
G
+
V
DS
-
D
6 www.irf.com
Page 7
IRL1404S/IRL1404L
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
G
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 14. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
www.irf.com 7
Page 8
IRL1404S/IRL1404L
LOT CODE 8024
ASSEMBLED O N WW 02 , 20 00
I N TH E ASSEMBLY LINE "L"
AS SEMB L Y
LOT C ODE
INTERNATIONA L
REC TIFIER
LOGO
PART NUMBER
DA TE CODE
YEAR 0 = 2000
WEE K 02
LINE L
F530S
THIS IS AN IRF530S WITH
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
1.40 (.055)
MA X.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
2
D
Pak Part Marking Information
10.29 (.405)
- A 2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10 ) M B A M
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS
1 - G ATE
2 - D RA IN
3 - S OURCE
10.16 (.400)
REF .
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350)
REF .
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
2.54 (.100)
2X
8 www.irf.com
Page 9
TO-262 Package Outline
EX AMPLE: THIS I S AN IRL3103L
LOT CODE 1789
ASSEMBLY
PART NUMBER
DA TE CODE
WEE K 19
LINE C
LOT C ODE
YEAR 7 = 1997
ASSE MBL ED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
LOGO
REC TIFIER
INTERNATIONAL
Dimensions are shown in millimeters (inches)
IRL1404S/IRL1404L
TO-262 Par t Mar king Information
www.irf.com 9
Page 10
IRL1404S/IRL1404L
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
4.10 (.161)
3.90 (.153)
FEED D IRE CTI ON
TRL
FEED D IRE CTION
1.85 (.073)
1.65 (.065)
10.90 (.429)
10.70 (.421)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.60 (.063)
1.50 (.059)
1.75 (.069)
1.25 (.049)
15.42 (.609)
15.22 (.601)
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MA X .
NOTES :
1. COMF ORM S TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION M EASURED @ HUB.
4. INCLUDES FLAN GE D ISTORTION @ O UTER EDGE.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 0.35mH
RG = 25Ω, I
I
≤ 95A, di/dt ≤ 160A/µs, V
SD
TJ ≤ 175°C
= 95A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handing of the
package refer to Design Tip # 93-4.
This is applied to D
,
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
DSS.
This product has been designed and qualified for the Industrial market.
27.40 (1.079)
23.90 (.941)
4
60.00 (2.362)
MIN .
30.40 (1.197)
26.40 (1.039)
24.40 (.961)
2
(FR-4 or G-10 Material) . For recommended footprint and
soldering techniques refer to application note #AN-994.
Pak, When mounted on 1" square PCB
M A X .
4
3
Data and specifications subject to change without notice.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/02
10 www.irf.com
Loading...