Datasheet IRL1404PBF Specification

Page 1
PD - 95588A
IRL1404PbF
HEXFET® Power MOSFET
l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free
G
D
V
= 40V
DSS
R
S
= 4.0mΩ
DS(on)
= 160A
I
D
Description
Seventh Generation HEXFET® power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to
TO-220AB
its wide acceptance throughout the industry.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 160 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 110 A I
DM
PD @TC = 25°C Power Dissipation 200 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns T
J
T
STG
Pulsed Drain Current 640
Linear Derating Factor 1.3 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 620 mJ Avalanche Current 95 A Repetitive Avalanche Energy 20 mJ
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case) Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.75 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient (PCB Mounted) ––– 62
°C
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IRL1404PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 1480 ––– VGS = 0V, VDS = 0V to 32V
oss
Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.038 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance
––– ––– 4.0 VGS = 10V, ID = 95A ––– ––– 5.9 VGS = 4.3V, ID = 40A
mΩ
Gate Threshold Voltage 1.0 ––– 3.0 V VDS = VGS, ID = 250µA Forward Transconductance 93 ––– ––– S VDS = 25V, ID = 95A
Drain-to-Source Leakage Current
––– ––– 20
––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -200
VDS = 40V, VGS = 0V
µA
nA
VGS = -20V Total Gate Charge ––– ––– 140 ID = 95A Gate-to-Source Charge ––– ––– 48 nC VDS = 32V Gate-to-Drain ("Miller") Charge ––– ––– 60 VGS = 5.0V, See Fig. 6 Turn-On Delay Time ––– 18 ––– VDD = 20V Rise Time ––– 270 ––– ID = 95A
ns
Turn-Off Delay Time ––– 38 ––– RG = 2.5Ω VGS = 4.5V Fall Time ––– 37 ––– RD = 0.25Ω
Internal Drain Inductance
Internal Source Inductance ––– –––
4.5
––– –––
7.5
nH
Between lead,
6mm (0.25in.)
from package
and center of die contact Input Capacitance ––– 6590 ––– VGS = 0V Output Capacitance ––– 1710 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 350 ––– ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 6650 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 1510 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
160
640
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 95A, VGS = 0V Reverse Recovery Time ––– 63 94 ns TJ = 25°C, IF = 95A Reverse RecoveryCharge ––– 170 250 nC di/dt = 100A/µs  Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
C
eff. is a fixed capacitance that gives the same charging time
Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11). Starting TJ = 25°C, L = 0.35mH RG = 25Ω, I I
≤ 95A, di/dt ≤ 160A/µs, V
SD
TJ ≤ 175°C.
= 95A. (See Figure 12).
AS
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
,
oss
as C Calculated continuous current based on maximum allowable
oss
while V
is rising from 0 to 80% V
DS
DSS.
junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A.
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D
S
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IRL1404PbF
1000
100
D
I , Drain-to-Source Current (A)
10
0.1 1 10 100
1000
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.3V
4.3V
20µs PULSE WIDTH T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
1000
100
D
I , Drain-to-Source Current (A)
10
0.1 1 10 100
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.3V
4.3V
20µs PULSE WIDTH T = 175 C
J
V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.5
I =
D
160A
°
T = 25 C
J
°
T = 175 C
J
D
I , Drain-to-Source Current (A)
V = 15V
DS
100
4.0 5.0 6.0 7.0 8.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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IRL1404PbF
10000
8000
6000
4000
V
=
0V,
GS
C
=
iss gs gd , ds
C
=
rss gd
C
=
oss ds gd
f = 1MHz
C
+ C C C
+ C
C
iss
C SHORTED
C, Capacitance (pF)
2000
0
1 10 100
V , Drain-to-Source Voltage (V)
DS
C
oss
C
rss
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I =
95A
D
V = 32V
DS
V = 20V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 100 200 300 400 500
Q , Total Gate Charge (nC)
G
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
13
100
10
SD
I , Reverse Drain Current (A)
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
°
T = 175 C
J
°
T = 25 C
J
V ,Source-to-Drain Voltage (V)
SD
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
1000
100
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 175 C Single Pulse
10
1 10 100
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10us
100us
1ms
10ms
Forward Voltage
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IRL1404PbF
160
LIMITED BY PACKAGE
120
80
D
I , Drain Current (A)
40
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
V
DS
90%
10% V
GS
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
t
d(on)tr
R
D.U.T.
t
d(off)tf
D
+
V
DD
-
D = 0.50
thJC
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL1404PbF
A
15V
DRIVER
+
-
V
R
G
20V
V
DS
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
DD
1500
TOP
1200
900
600
300
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
D
49A 101A 121A
°
Current Regulator
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
Same Type as D.U.T.
.2µF
12V
V
GS
50KΩ
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
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IRL1404PbF
Peak Diode Recovery dv/dt Test Circuit
+
-
D.U.T*
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
+
R
G
V
GS
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P. W .
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 14. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
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IRL1404PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789 AS SE MBL ED ON WW 19, 2000 IN THE ASSEMBLY LINE "C"
Note: "P" in as sembly line pos ition
indi cates "L ead - F r ee"
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
INTE RNAT IONAL
RECTIF IER
LOGO
ASSEMBLY LOT CODE
PART NUMBER
DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/2010
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