Datasheet IRL1104S-L Datasheet (IOR)

Page 1
查询IRL1104L供应商
PD -91840
PRELIMINARY
l Logic-Level Gate Drive l Advanced Process Technology l Surface Mount (IRL1104S) l Low-profile through-hole (IRL1104L) l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
2
Pak is a surface mount power package capable of
The D accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL1104L) is available for low­profile applications.
2
Pak is
G
IRL1104S/L
HEXFET® Power MOSFET
2
D Pa k
D
S
V
DSS
R
DS(on)
= 0.008Ω
ID = 104A
TO-262
= 40V
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 104 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 74 A I
DM
PD @TA = 25°C Power Dissipation 2.4 W PD @TC = 25°C Power Dissipation 167 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns T
J
T
STG
Pulsed Drain Current  416
Linear Derating Factor 1.1 W/°C Gate-to-Source Voltage ±16 V Single Pulse Avalanche Energy 340 mJ Avalanche Current 62 A Repetitive Avalanche Energy 17 m J
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 0.9 Junction-to-Ambient(PCB Mounted,steady-state)** ––– 62
°C/W
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10/28/98
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IRL1104S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.04 ––– V/°C Reference to 25°C, ID =1mA
J
Static Drain-to-Source On-Resistance
––– ––– 0.008 VGS = 10V, ID = 62A ––– ––– 0.012
W
VGS = 4.5V, ID = 52A Gate Threshold Voltage 1.0 ––– V VDS = VGS, ID = 250µA Forward Transconductance 53 ––– ––– S VDS = 25V, ID = 62A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V Gate-to-Source Reverse Leakage ––– ––– -100
VDS =40V, VGS = 0V
µA
nA
VGS = -16V Total Gate Charge –– – –– – 68 ID =62A Gate-to-Source Charge ––– ––– 24 nC VDS = 32V Gate-to-Drain ("Miller") Charge ––– ––– 34 VGS = 4.5V, See Fig. 6 and 13  Turn-On Delay Time ––– 18 ––– VDD = 20V Rise Time ––– 257 ––– ID =54A Turn-Off Delay Time ––– 32 ––– RG = 3.6Ω , VGS = 4.5V Fall Time ––– 64 ––– RD = 0.4Ω, See Fig. 10 
Internal Source Inductance 7.5
––– –––
Between lead,
nH
and center of die contact Input Capacitance ––– 3445 ––– VGS = 0V Output Capacitance ––– 1065 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 270 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
104
416
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS =62A, VGS = 0V Reverse Recovery Time ––– 84 126 ns TJ = 25°C, IF =62A Reverse Recovery Charge ––– 223 335 nC di/dt = 100A/µs

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
= 15V, starting TJ = 25°C, L = 0.18mH
DD
RG = 25Ω, I
I
≤ 62A, di/dt ≤ 217A/µs, V
SD
TJ ≤ 175°C
= 62A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%. Uses IRL1104 data and test conditions.
Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
,
package refer to Design Tip # 93-4
** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
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D
S
Page 3
IRL1104S/L
1000
100
10
TOP
BOTTOM
VGS 15V 10V
7.0V
5.5V
4.5V
4.0V
3.5V
2.7V
2.7V
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 25 C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 1. Typical Output Characteristics
1000
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
VGS
TOP
15V 10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM
2.7V
2.7V
20µs PULSE WIDTH T = 175 C
J
V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output Characteristics
2.5
I =
D
104A
°
T = 25 C
J
T = 175 C
J
100
10
D
I , Drain-to-Source Current (A)
V = 50V
25
DS
1
2.0 4.0 6.0 8.0 10.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
°
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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IRL1104S/L
6000
5000
4000
3000
2000
C, Capacitance (pF)
1000
0
1 10 100
V
=
0V,
GS
C
=
issgsgd , ds
C
=
rssgd
C
=
oss dsgd
V , Drain-to-Source Voltage (V)
DS
f = 1MHz
C
+ C + C
C
C
C
iss
oss
rss
C SHORTED C C
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
10
I =
62 A
D
V = 32V
DS
V = 20V
8
6
4
2
GS
V , Gate-to-Source Voltage (V)
0
0 20 40 60 80
Q , Total Gate Charge (nC)
G
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
13
100
10
°
T = 25 C
J
1
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.8 1.4 2.0 2.6
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
1000
100
D
I , Drain Current (A)I , Drain Current (A)
10
°
= 25 C
C
T T= 175 C Single Pulse
1
1 10 100
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10us
100us
1ms
10ms
°
T = 175 C
J
Forward Voltage
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IRL1104S/L
120
LIMITED BY PACKAGE
100
80
60
40
D
I , Drain Current (A)
20
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
4.5V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
-
DD
D = 0.50
thJC
0.20
0.10
0.1
0.05
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL1104S/L
A
15V
DRIVER
+
-
V
DD
R
V
G
5
10V
DS
L
D.U.T
I
AS
Ω
t
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
800
TOP
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
I
D 25A 44A 62A
°
50KΩ
Q
G
4.5 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
Fig 13b. Gate Charge Test Circuit
.2µF
V
GS
.3µF
D.U.T .
3mA
I
G
Current Sampling Resistors
I
+
V
DS
-
D
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Page 7
IRL1104S/L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
+
-
VGS=10V
V
DD
*
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFETS
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Page 8
IRL1104S/L
A
D2Pak Package Details
10.54 (.415)
1.40 (.055) MAX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S: 1 DIM ENSIONS AFTER SOLDER DIP. 2 DIM ENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A ­2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10 ) M B A M
Part Marking
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS 1 - G ATE 2 - D RA IN 3 - S OURCE
10.16 (.400) REF .
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350) REF .
MINIMUM RECOM MENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082) 2X
2.54 (.100) 2X
INTERNATIONAL RE CTIFIER L O G O
A S SEMBLY LO T CO D E
F530S
9246
9 B 1M
PART NUM B ER
DATE CODE (YYW W ) YY = YEAR WW = WEEK
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Page 9
TO-262 Package Details
IRL1104S/L
Part Marking
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Page 10
IRL1104S/L
D2Pak Tape and Reel
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
1.60 (.063)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
FEED D IRECTION
1.85 (.073)
1.65 (.065)
TRL
10.90 (.429)
10.70 (.421)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COM FO R M S TO E IA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HU B.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
11.60 (.457)
11.40 (.449)
1.75 (.069)
1.25 (.049)
16.10 (.634)
15.90 (.626)
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.4 0 (1.0 39)
24.40 (.961 )
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362) MIN.
30.40 (1.197) MAX .
4
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http://www.irf.com/ Data and specifications subject to change without notice. 10/98
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