Datasheet irl1004s Datasheet

PD - 91644A

IRL1004S

IRL1004L

l Logic-Level Gate Drive l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated

G

Description

Fifth Generation HEXFET® power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

2

Pak is a surface mount power package capable of

The D accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The

2

D

Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL1004L) is available for lowprofile application.

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 130  ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 92  A I

DM

PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 200 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  5.0 V/ns T

J

T

STG

Pulsed Drain Current  520

Linear Derating Factor 1.3 W/°C Gate-to-Source Voltage ± 16 V Single Pulse Avalanche Energy 700 mJ Avalanche Current 78 A Repetitive Avalanche Energy 20 mJ

Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case)

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θJA

Junction-to-Case ––– 0.75 Junction-to-Ambient ( PCB Mounted,steady-state)* –– – 40

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HEXFET® Power MOSFET

D

V

= 40V

DSS

R

DS(on)

= 0.0065Ω

ID = 130A

S

D2Pak

IRL1004S

TO-262

IRL1004L

°C

°C/W

12/29/99

IRL1004S/1004L

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

S

C

iss

C

oss

C

rss

Drain-to-Source Breakdown Voltage 40 –– – ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.04 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance

––– ––– 0.0065 VGS = 10V, ID = 78A  ––– ––– 0.009

Ω

VGS = 4.5V, ID = 65A  Gate Threshold Voltage 1.0 ––– V VDS = VGS, ID = 250µA Forward Transconductance 63 ––– ––– S VDS = 25V, ID = 78A

Drain-to-Source Leakage Current

––– ––– 25

––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V Gate-to-Source Reverse Leakage ––– ––– -100

VDS = 40V, VGS = 0V

µA

nA

VGS = -16V Total Gate Charge ––– ––– 100 ID = 78A Gate-to-Source Charge ––– ––– 32 nC VDS = 32V Gate-to-Drain ("Miller") Charge ––– ––– 43 VGS = 4.5V, See Fig. 6 and 13  Turn-On Delay Time ––– 16 ––– VDD = 20V, Rise Time ––– 210 ––– ID = 78A, Turn-Off Delay Time ––– 25 ––– n s RG = 2.5Ω, Fall Time ––– 14 ––– RD = 0.18Ω, See Fig. 10 

Internal Source Inductance 7.5

––– –––

Between lead,

nH

and center of die contact Input Capacitance ––– 5330 – –– VGS = 0V Output Capacitance ––– 1480 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 320 ––– ƒ = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode) 

––– –––

130

520

showing the

A

p-n junction diode.

G

Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 78A, VGS = 0V Reverse Recovery Time ––– 78 120 ns TJ = 25°C, IF = 78A Reverse RecoveryCharge – –– 180 270 nC di/dt = 100A/µs Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11)

 Starting T

RG = 25Ω, I

 I

SD

TJ ≤ 175°C

= 25°C, L = 0.23mH

J

= 78A. (See Figure 12)

AS

≤ 78A, di/dt ≤ 370A/µs, V

DD

≤ V

(BR)DSS

,

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

 Calculated continuous current based on maximum allowable

junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4

 Uses IRL1004 data and test conditions

* When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.

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D

S

IRL1004S/1004L

10000

1000

100

10

1

D

I , Drain-to-Source Current (A)

0.1

0.1 1 10 100

1000

100

VGS

TOP

15V 10V

7.0V

5.5V

4.5V

4.0V

3.5V

BOTTOM

2.7V

20µs PULSE WIDTH T = 25 C

J

V , Drain-to-Source Voltage (V)

DS

°

T = 25 C

J

T = 175 C

°

J

1000

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

VGS

TOP

15V 10V

7.0V

5.5V

4.5V

4.0V

3.5V

BOTTOM

2.7V

20µs PULSE WIDTH T = 175 C

J

V , Drain-to-Source Voltage (V)

DS

°

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

2.5

2.0

°

I =

D

130A

1.5

10

1.0

(Normalized)

1

D

I , Drain-to-Source Current (A)

V = 50V

DS

0.1

2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0

V , Gate-to-Source Voltage (V)

GS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

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IRL1004S/1004L

10000

8000

6000

4000

V

GS

C

issgsgd , ds

C

rssgd

C

oss dsgd

C

iss

C

oss

=

0V,

= = =

f = 1MHz

C

+ C C C

C SHORTED

+ C

C, Capacitance (pF)

2000

C

rss

0

1 10 100

V , Drain-to-Source Voltage (V)

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

°

T = 175 C

J

100

12

I =

78 A

D

10

8

6

4

GS

2

V , Gate-to-Source Voltage (V)

0

0 30 60 90 120 150 180

Q , Total Gate Charge (nC)

G

V = 32V

DS

V = 20V

DS

FOR TEST CIRCUIT

SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

10000

OPERATION IN THIS AREA LIMITED

1000

BY R

DS(on)

13

10us

10

°

T = 25 C

J

1

SD

I , Reverse Drain Current (A)

V = 0 V

0.1

0.0 0.5 1.0 1.5 2.0 2.5 3.0

V ,Source-to-Drain Voltage (V)

SD

GS

Fig 7. Typical Source-Drain Diode

100

D

I , Drain Current (A)I , Drain Current (A)

10

°

= 25 C

C

T T= 175 C Single Pulse

1

1 10 100

°

J

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

100us

1ms

10ms

Forward Voltage

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140

120

100

LIMITED BY PACKAGE

IRL1004S/1004L

R

D.U.T.

D

+

V

DD

-

V

DS

V

GS

R

G

80

60

D

40

I , Drain Current (A)

20

0

25 50 75 100 125 150 175

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

1

D = 0.50

thJC

0.20

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

0.1

0.10 P

1 2

DM

t

1

t

2

0.05

Thermal Response (Z )

0.02

0.01

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D = t / t

2. Peak T =P x Z + T

t , Rectangular Pulse Duration (sec)

1

J DM thJC C

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRL1004S/1004L

D.U.T .

I

AS

L

0.01Ω

+

V

DD

-

R

4.5 V

V

DS

G

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

V

DD

V

DS

I

AS

1800

TOP

1500

1200

900

600

300

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150 175

Starting T , Junction Temperature ( C)

J

BOTTOM

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

I

°

D 32A 55A 78A

Fig 12b. Unclamped Inductive Waveforms

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

.3µF

3mA

Current Sampling Resistors

+

V

D.U.T.

I

G

I

D

DS

-

4.5 V

V

Q

G

Q

GS

Q

GD

G

12V

V

GS

Charge

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

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IRL1004S/1004L

Peak Diode Recovery dv/dt Test Circuit

D.U.T

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance Current Transformer

-

+



-



-

+



R

G

Driver Gate Drive

P.W.

• dv/dt controlled by R

• Driver same type as D.U.T.

G

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

Period

D =

P.W.

Period

+

-

VGS=10V

V

DD

*

D.U.T. ISDWaveform

Reverse Recovery Current

Re-Applied Voltage

D.U.T. VDSWaveform

Inductor Curent

* V

= 5V for Logic Level Devices

GS

Fig 14. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

V

DD

I

SD

®

Power MOSFETs

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IRL1004S/1004L

A

D2Pak Package Outline

10.54 (.415)

1.40 (.055) MAX.

1.78 (.070)

1.27 (.050)

1.40 (.055)

3X

1.14 (.045)

5.08 (.200)

NOTE S: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M , 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.

10.29 (.405)

- A 2

1 3

15.49 (.610)

14.73 (.580)

0.93 (.037)

3X

0.69 (.027)

0.25 (.010 ) M B A M

4.69 (.185)

4.20 (.165)

D2Pak Part Marking Information

5.28 (.208)

4.78 (.188)

0.55 (.022)

0.46 (.018)

- B -

1.32 (.052)

1.22 (.048)

2.79 (.110)

2.29 (.090)

1.39 (.055)

1.14 (.045)

LEAD ASSIGNM E N TS 1 - G ATE 2 - D RAIN 3 - SOURCE

10.16 (.400) REF.

6.47 (.255)

6.18 (.243)

2.61 (.103)

2.32 (.091)

8.89 (.350) REF.

MINIMUM RECOMMENDED FOOTPRINT

11.43 (.450)

8.89 (.350)

17.78 (.700)

3.81 (.150)

2.08 (.082) 2X

2.54 (.100) 2X

INTERNATIONAL RE CTIFIE R LO G O

A S SEMBLY LO T CO D E

F530S

9246

9 B 1 M

PART NUM B ER

DATE CODE (YYW W) YY = YEAR WW = WEEK

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TO-262 Package Outline

IRL1004S/1004L

TO-262 Part Marking Information

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IRL1004S/1004L

)

D2Pak Tape & Reel Information

TR R

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

1.60 (.063

1.50 (.059

0.368 (.0145

0.342 (.0135

FEED DIRECTION

1.85 (.073)

1.65 (.065)

TRL

10.90 (.429

10.70 (.421

FEED DIRECTIO N

13.50 (.532)

12.80 (.504)

330.00 (14.173) M AX .

NOT ES :

1. COM FO RM S TO EIA-418.

2. CO NTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

11.60 (.457

11.40 (.449

16.10 (.634

15.90 (.626

1.75 (.069

1.25 (.049

15.42 (.609

15.22 (.601

27.40 (1.079)

23.90 (.941)

4

26.40 (1.039

24.40 (.961

3

24.30 (.957

23.90 (.941

4.72 (.136

4.52 (.178

60.00 (2.362 MIN .

30.40 (1.197) M A X .

4

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252 7105

IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020

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IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630

IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936

Data and specifications subject to change without notice. 12/99

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