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PD - 91702B
IRL1004
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
G
D
R
DS(on)
V
= 40V
DSS
= 0.0065Ω
ID = 130A
S
Description
Fifth Generation HEXFET® power MOSFETs from
International Rectifier utilize advanced processing techniques
to achieve the lowest possible on-resistance per silicon
area. This benefit, combined with the fast switching speed
and ruggedized device design that HEXFET power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation levels
to approximately 50 watts. The low thermal resistance and
low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 130
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 92 A
I
DM
PD @TC = 25°C Power Dissipation 200 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 520
Linear Derating Factor 1.3 W/°C
Gate-to-Source Voltage ± 16 V
Single Pulse Avalanche Energy 700 mJ
Avalanche Current 78 A
Repetitive Avalanche Energy 20 m J
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
qJA
Junction-to-Case ––– 0.75
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62
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IRL1004
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.04 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance
––– ––– 0.0065 VGS = 10V, ID = 78A
––– ––– 0.009 VGS = 4.5V, ID = 65A
Ω
Gate Threshold Voltage 1.0 ––– ––– V VDS = VGS, ID = 250µA
Forward Transconductance 63 ––– ––– S VDS = 25V, ID = 78A
Drain-to-Source Leakage Current
––– ––– 25 VDS = 40V, VGS = 0V
––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
µA
nA
VGS = 16V
Total Gate Charge ––– ––– 100 ID = 78A
Gate-to-Source Charge ––– ––– 32 nC VDS = 32V
Gate-to-Drain ("Miller") Charge ––– ––– 43 VGS = 4.5V, See Fig. 6 and 13
Turn-On Delay Time ––– 16 ––– VDD = 20V
Rise Time ––– 210 ––– ID = 78A
Turn-Off Delay Time ––– 25 ––– RG = 2.5Ω, VGS = 4.5V
ns
Fall Time ––– 14 ––– RD = 0.18Ω, See Fig. 10
Internal Drain Inductance ––– 4.5 –––
Internal Source Inductance ––– 7.5 –––
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 5330 ––– VGS = 0V
Output Capacitance ––– 1480 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 320 ––– ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
130
520
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 78A, VGS = 0V
Reverse Recovery Time ––– 78 120 ns TJ = 25°C, IF = 78A
Reverse Recovery Charge ––– 180 270 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%
max. junction temperature. (See fig. 11)
Starting T
RG = 25Ω, I
I
SD
= 25°C, L =0.23mH
J
AS
≤78A, di/dt ≤ 370A/µs, V
= 78A. (See Figure 12)
≤ V
DD
(BR)DSS
Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
,
package refer to Design Tip #93-4
TJ ≤ 175°C
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D
S
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IRL1004
10000
1000
100
10
1
D
I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
VGS
TOP
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM
2.7V
2.7V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
Fig 1. Typical Output Characteristics
1000
°
T = 25 C
J
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
VGS
TOP
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM
2.7V
2.7V
20µs PULSE WIDTH
T = 175 C
J
V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output Characteristics
2.5
I =
D
130A
100
10
1
D
I , Drain-to-Source Current (A)
0.1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
V , Gate-to-Source Voltage (V)
GS
T = 175 C
V = 50V
DS
20µs PULSE WIDTH
°
J
25
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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IRL1004
gsg
10000
8000
6000
4000
C
iss
C
oss
V
=
0V,
GS
C
=
C
iss
C
rssgd
C
oss dsgd
+ C
=
C
=
C
+ C
f = 1MHz
C SHORTED
d , ds
C, Capacitance (pF)
2000
C
rss
0
1 10 100
V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
°
T = 175 C
J
100
12
I =
78 A
D
10
8
6
4
GS
2
V , Gate-to-Source Voltage (V)
V = 32V
DS
V = 20V
DS
FOR TEST CIRCUIT
0
0 30 60 90 120 150 180
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA LIMITED
1000
BY R
DS(on)
13
10us
10
°
T = 25 C
J
1
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
100
D
I , Drain Current (A)I , Drain Current (A)
10
°
= 25 C
C
T T= 175 C
Single Pulse
1
1 10 100
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
100us
1ms
10ms
Forward Voltage
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IRL1004
140
LIMITED BY PACKAGE
120
100
80
60
D
40
I , Drain Current (A)
20
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
0.20
0.1
0.10
P
1 2
DM
t
1
t
2
0.05
Thermal Response (Z )
0.02
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL1004
D.U.T .
I
AS
L
0.01Ω
+
V
DD
-
R
4.5 V
V
DS
G
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
V
DS
I
AS
1800
TOP
1500
1200
900
600
300
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
°
D
32A
55A
78A
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
.3µF
3mA
Current Sampling Resistors
+
V
D.U.T.
I
G
I
D
DS
-
4.5 V
V
Q
G
Q
GS
Q
GD
G
12V
V
GS
Charge
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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Peak Diode Recovery dv/dt Test Circuit
IRL1004
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
D =
Period
+
+
V
DD
-
VGS=10V
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFET® Power MOSFETs
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IRL1004
A
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIM EN SIONING & TOL ERANC IN G P ER A NSI Y14 .5M, 1982. 3 OU TLIN E C ON FORM S TO JE DEC OUT LINE TO -2 20 A B.
2 CO N TROLLING DIMENSIO N : IN C H 4 HEATS IN K & LE AD MEASU RE ME NT S D O N OT INCLUDE BURRS.
10.29 (.405)
4
1 2 3
2X
3.78 (.149)
3.54 (.139)
- A -
6.47 (.255)
6.10 (.240)
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
0.93 (.037)
3X
0.69 (.027)
0.36 (.014 ) M B A M
TO-220AB Part Marking Information
EXAMPLE : THIS IS AN IRF1010
W ITH AS SE MB LY
LO T CO DE 9 B1 M
INTERN A TION A L
RE CTIFIER
L OG O
ASSEMBLY
LO T C ODE
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
2.92 (.115)
2.64 (.104)
I RF1010
9246
9B 1 M
LEAD ASSIGNMENTS
1 - G ATE
2 - D RAIN
3 - SOURCE
4 - D RAIN
0.55 (.022)
3X
0.46 (.018)
PART NUMB ER
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
Data and specifications subject to change without notice. 11/99
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