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HEXFET® Power MOSFET
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Enhanced 30V Vgs Rating
Reduced C
Isolated Central Mounting Hole
Dynamic dv/dt Rated
Repetitive Avalanche Rated
Description
This new series of Low Charge HEXFET Power MOSFETs achieve significantly
lower gate charge over conventional MOSFETs. Utilizing advanced Hexfet
technology the device improvements allow for reduced gate drive requirements,
faster switching speeds and increased total system savings. These device
improvements combined with the proven ruggedness and reliability of HEXFETs
offer the designer a new standard in power transistors for switching applications.
The TO-247 package is preferred for commercial-industrial applications where
higher power levels preclude the use of TO-220 devices. The TO-247 is similar
but superior to the earlier TO-218 package because of its isolated mounting hole.
iss
, C
oss
, C
rss
PD - 9.1233
IRFPC50LC
V
= 600V
DSS
R
ID = 11A
DS(on)
= 0.60 Ω
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 11
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 7.3 A
I
DM
PD @TC = 25°C Power Dissipation 190 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 3.0 V/ns
T
J
T
STG
Pulsed Drain Current 44
Linear Derating Factor 1.5 W/°C
Gate-to-Source Voltage ±30 V
Single Pulse Avalanche Energy 920 mJ
Avalanche Current 11 A
Repetitive Avalanche Energy 19 mJ
Operating Junction and -55 to + 150
Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Mounting torque, 6-32 or M3 screw. 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Min. Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case –––– –––– 0.65
Case-to-Sink, Flat, Greased Surface –––– 0.24 –––– °C/W
Junction-to-Ambient –––– –––– 40
Revision 0
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IRFPC50LC
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(ON)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 600 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.59 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.60 Ω VGS = 10V, ID = 6.6A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 7.0 ––– ––– S VDS = 100V , ID = 6.6A
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
––– ––– 25 VDS = 600V , VGS = 0V
––– ––– 250 VDS = 480V, VGS = 0V, TJ = 125°C
µA
nA
Total Gate Charge ––– ––– 84 ID = 11A
Gate-to-Source Charge ––– ––– 18 nC VDS = 360V
Gate-to-Drain ("Miller") Charge ––– ––– 36 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 17 ––– VDD = 300V
Rise Time ––– 32 ––– ID = 11A
Turn-Off Delay Time ––– 41 ––– RG = 6.2Ω
ns
Fall Time ––– 26 ––– RD = 30Ω, See Fig. 10
Internal Drain Inductance ––– 5.0 –––
Internal Source Inductance ––– 13 –––
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 2300 ––– VGS = 0V
Output Capacitance ––– 270 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 28 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
RG = 25Ω, I
Continuous Source Current MOSFET symbol
(Body Diode) showing the
Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
––– ––– 11
––– ––– 44
Diode Forward Voltage ––– ––– 1.4 V TJ = 25°C, IS = 11A, VGS = 0V
Reverse Recovery Time ––– 590 890 ns TJ = 25°C, IF = 11A
Reverse Recovery Charge ––– 4.5 6.8 µC di/dt = 100A/µs
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
I
≤ 11A, di/dt ≤ 100A/µs, V
SD
TJ ≤ 150°C
= 25V, starting TJ = 25°C, L = 13mH
= 11A. (See Figure 12)
AS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
A
DD
≤ V
(BR)DSS
,
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IRFPC50LC
A
A
A
A
100
VGS
TOP 15V
10V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
10
BOTTOM 4.5V
1
0.1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
T = 25°C
0.01
0.01 0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
C
Fig 1. Typical Output Characteristics,
TC = 25oC
100
4.5V
100
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
10
BOTTOM 4.5V
1
0.1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
T = 150°C
0.01
0.01 0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
C
Fig 2. Typical Output Characteristics,
TC = 150oC
3.0
I = 11A
D
4.5V
T = 150°C
J
10
1
T = 25°C
J
0.1
D
I , Drain-to-Source Current (A)
0.01
4 5 6 7 8 9 10
V , Gate-to-Source Voltage (V)
GS
V = 100V
DS
20µs PULSE WIDTH
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature (°C)
J
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
V = 10V
GS
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IRFPC50LC
A
A
A
A
4000
3000
2000
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C, Capacitance (pF)
1000
C
oss
C
0
1 10 100
V , Drain-to-Source Voltage (V)
DS
rss
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
20
I = 11A
D
V = 360V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
DS
V = 240V
DS
V = 120V
DS
FOR TEST CIRCUIT
0
0 20 40 60 80
Q , Total Gate Charge (nC)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10
T = 150°C
J
T = 25°C
J
1
SD
I , Reverse Drain Current (A)
0.1
0.0 0.3 0.6 0.9 1.2 1.5
V , Source-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
100
10
D
I , Drain Current (A)
1
T = 25°C
C
T = 150°C
J
Single Pulse
0.1
1 10 100 1000 100 00
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10µs
100µs
1ms
10ms
100ms
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IRFPC50LC
A
R
D.U.T.
D
V
DD
V
DS
V
12
10
GS
R
G
10 V
8
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
4
D
I , Drain Current (Amps)
2
0
25 50 75 100 125 150
T , Case Temperature (°C)
C
Fig 9. Maximum Drain Current Vs.
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Case Temperature
1
D = 0.50
thJC
0.01
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty fa c tor D = t / t
2. Pea k T = P x Z + T
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectangular Pulse Duration (sec)
1
DM
J
1 2
thJC
P
DM
t
1
C
t
2
A
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFPC50LC
A
10 V
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
2000
1600
1200
800
400
AS
V = 50V
E , Single Pulse Avalanche Energy (mJ)
DD
0
25 50 75 100 125 150
Starting T , Juntion Temperature (°C)
J
I
TOP 4.9A
7.0A
BOTTOM 11A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
10 V
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
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IRFPC50LC
Peak Diode Recovery dv/dt Test Circuit
D.U.T
R
G
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
V
DD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
Page 8
IRFPC50LC
A
Package Outline
TO-247AC
Part Marking Information
TO-247AC
EXAMP LE : THIS IS AN IRFPE30
WITH ASSEMBLY
LOT CODE 3A1Q
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:
Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145
10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR
SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371
INTERN ATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
IRFPE30
3A1Q 9302
Data and specifications subject to change without notice.
PART NUMBER
DATE CODE
(YYWW)
YY = YEAR
WW WEEK
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