• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU, SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
N-Channel MOSFET
PRODUCT SUMMARY
VDS (V)500
R
(Ω)V
DS(on)
Q
max. (nC)19
g
Q
(nC)3.3
gs
Q
(nC)13
gd
ConfigurationSingle
= 10 V 3.0
GS
S
are possible in typical surface-mount applications.
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Page 7
www.vishay.com
IRFR420, IRFU420, SiHFR420, SiHFU420
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
-
R
g
Driver gate drive
P.W.
+
-
Period
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
• dV/dt controlled by R
• Driver same type as D.U.T.
I
controlled by duty factor “D”
•
SD
• D.U.T. - device under test
-
D =
g
P.W.
Period
+
+
V
DD
-
V
= 10 Va
GS
D.U.T. l
Reverse
recovery
current
D.U.T. V
Re-applied
voltage
Inductor current
Note
a. V
waveform
SD
Body diode forward
waveform
DS
Body diode forward drop
Ripple ≤ 5 %
= 5 V for logic level devices
GS
current
dI/dt
Diode recovery
dV/dt
V
DD
I
SD
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91275
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
2
Document Number: 71197
Page 10
OPTION 1:
Base
metal
Plating
b1, b3
(b, b2)
c1
(c)
Section B - B and C - C
D
A
c2
c
Lead tip
5
5
(Datum A)
Thermal PAD
E1
4
D1
View A - A
A1
A
A
C
Seating
plane
C
C
B
B
θ1
θ2
B
4
4
4
3
5
L1
L
L3
3 x b2
3 x b
3
b4
E
2 x e
0.010CBMA
0.25
0.010BA
0.25
L2
A
C
M
www.vishay.com
Case Outline for TO-251AA (High Voltage)
Package Information
Vishay Siliconix
MILLIMETERSINCHESMILLIMETERSINCHES
DIM.MIN.MAX.MIN.MAX.DIM.MIN.MAX.MIN.MAX.
A2.182.390.0860.094D15.21-0.205-
A10.891.140.0350.045E6.356.730.2500.265
b0.640.890.0250.035E14.32-0.170-
b10.650.790.0260.031e2.29 BSC2.29 BSC
b20.761.140.0300.045L8.899.650.3500.380
b30.761.040.0300.041L11.912.290.0750.090
b44.955.460.1950.215L20.891.270.0350.050
c0.460.610.0180.024L31.141.520.0450.060
c10.410.560.0160.02210'15'0'15'
c20.460.860.0180.034225'35'25'35'
D5.976.220.2350.245
ECN: E21-0682-Rev. C, 27-Dec-2021
DWG: 5968
Notes
• Dimensioning and tolerancing per ASME Y14.5M-1994
• Dimension are shown in inches and millimeters
• Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
• Thermal pad contour optional with dimensions b4, L2, E1 and D1
• Lead dimension uncontrolled in L3
• Dimension b1, b3 and c1 apply to base metal only
• Outline conforms to JEDEC
Revision: 27-Dec-2021
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
®
outline TO-251AA
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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