These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolarswitching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
Formerly developmental type TA09594.
Ordering Information
PART NUMBERPACKAGEBRAND
IRFR120TO-252AAIRFR120
IRFU120TO-251AAIRFU120
File Number
Features
• 8.4A, 100V
DS(ON)
= 0.270Ω
•r
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
2414.2
NOTE: When ordering, use the entire part number.
Packaging
JEDEC TO-251AAJEDEC TO-252AA
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
GATE
DRAIN
SOURCE
S
DRAIN
(FLANGE)
4-377
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
36mJ
-55 to 175
300
260
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 150oC.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAX UNITS
Drain to Source Breakdown VoltageBV
Gate Threshold VoltageV
GS(TH)VGS
Zero Gate Voltage Drain CurrentI
On-State Drain Current (Note 2)I
D(ON)VDS
Gate to Source Leakage CurrentI
Drain to Source On Resistance (Note 2)r
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
2.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2.0
VGS = 10V
1.5
1.0
, ON-STATE RESISTANCE (S)
0.5
DS(ON)
r
0
0816243240
I
, DRAIN CURRENT (A)
D
VGS = 20V
3.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
= 10V, ID = 5.9A
GS
2.4
1.8
1.2
ON RESISTANCE
0.6
NORMALIZED DRAIN TO SOURCE
0
-40040
, JUNCTION TEMPERATURE (oC)
T
J
80
120
160
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4-380
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Page 5
IRFR120, IRFU120
Typical Performance Curves
1.25
ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
-40040
, JUNCTION TEMPERATURE (oC)
T
J
Unless Otherwise Specified (Continued)
80
120
160
FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
≥ 50V
DS
4
TJ = 25oC
1000
VGS= 0V, f = 1MHz
C
= CGS + C
ISS
C
= C
RSS
800
C
≈ C
OSS
600
400
C, CAPACITANCE (pF)
200
0
12 5102 5
GD
GD
+ C
DS
GD
C
ISS
C
OSS
C
RSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
3
2
, TRANSCONDUCTANCE (S)
fs
1
g
0
03691215
, DRAIN CURRENT (A)
I
D
TJ = 175oC
10
TJ = 175oC
1
, SOURCE TO DRAIN CURRENT (A)
SD
I
0.1
00.40.81.21.62.0
, SOURCE TO DRAIN VOLTAGE (V)
V
SD
TJ = 25oC
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 8.4A
16
12
8
, GATE TO SOURCE (V)
GS
4
V
VDS = 80V
VDS = 50V
= 20V
V
DS
4-381
0
03691215
Q
, GATE CHARGE (nC)
g
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Page 6
IRFR120, IRFU120
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0.01Ω
0
t
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
R
G
V
GS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
CURRENT
REGULATOR
12V
BATTERY
0.2µF
50kΩ
0.3µF
G
t
ON
t
d(ON)
t
R
L
+
V
DD
-
V
DS
0
r
90%
10%
DUT
V
GS
10%
0
50%
PULSE WIDTH
t
d(OFF)
90%
t
OFF
50%
t
f
90%
10%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
(ISOLATED
SUPPLY)
SAME TYPE
AS DUT
D
DUT
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
DS
V
GS
0
I
0
G(REF)
IG CURRENT
SAMPLING
RESISTORRESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
4-382
S
CURRENT
I
D
SAMPLING
V
DS
I
G(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
Page 7
IRFR120, IRFU120
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
4-383
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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