Datasheet IRFS7437TRL7PP Datasheet

Applications

R

DS(on)

typ.

1.1m

Ω

l Brushed Motor drive applications l BLDC Motor drive applications l PWM Inverterized topologies l Battery powered circuits

l Half-bridge and full-bridge topologies l Electronic ballast applications l Synchronous rectifier applications l Resonant mode power supplies l OR-ing and redundant power switches l DC/DC and AC/DC converters

S trongIRFET

IRFS7437-7PPbF

HEXFET® Power MOSFET

D

G

S

V

DSS

40V

max. 1.4m I

D

(Silicon Limited)

I

D

(Package Limited)

295A

195A

Ω

c

Benefits

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free l Halogen Free

Base Part Number Package Type

IRFS7437-7PPbF D2Pak-7PIN

)

4.0

Ω

m (

e c n a

t s

i s e

3.0

R n O e

c

r u o S

o

t

2.0

n

i a

r D ,

) n o

( S D

1.0

R

4 6 8 10 12 14 16 18 20

V

GS,

TJ = 125°C

TJ = 25°C

Gate -to -Source Voltage (V)

Fig 1. Typical On-Resistance vs. Gate Voltage

ID = 100A

D

S

G

D2Pak 7 Pin

GDS

Gate Drain Source

Standard Pack

Form Quantit y

Tube 50 IRFS7437-7PPbF

Tape and Reel Left 800 IRFS7437TRL7PP

300

250

) A

(

200

t n e

r

r u

C

150

n

i a

r D

100

,

D

I

50

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Orderable Part Number

Limited By Package

Fig 2. Maximum Drain Current vs. Case Temperature

Absolute Maximum Ratings

θ

Δ

Ω

Symbol Parameter Units

I

@ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)

D

@ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)

I

D

@ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited)

I

D

I

DM

PD @TC = 25°C

Pulsed Drain Current

Maximum Power Dissipation

d

Linear Derating Factor

V

GS

dv/dt

T

J

T

STG

Gate-to-Source Voltage

Peak Diode Recovery

f

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from case)

Avalanche Characteristics

E

AS (Thermally limited)

E

AS (Thermally limited)

I

AR

E

AR

Single Pulse Avalanche Energy

Avalanche Current

d

Repetitive Avalanche Energy

e

l

d

Thermal Resistance

Symbol Parameter Typ. Max. Units

R

JC

R

JA

Junction-to-Case

Junction-to-Ambient (PCB Mount)

k

j

IRFS7437-7PPbF

Max.

c

295

208

c

195

1040

231

1.5

± 20

3.5

-55 to + 175

300

344

796

See Fig. 14, 15, 22a, 22b

–––

––– 40

0.65

A

W

W/°C

V

V/ns

°C

mJ

A

mJ

°C/W

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

V

(BR )DS S

V

R

DS(on)

(BR)DSS

Drain-to-Source Breakdown Voltage 40 ––– ––– V

/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.035 ––– V/°C

Static Drain-to-Source On-Resistance ––– 1.1 1.4

1.7 –––

V

I

DSS

GS( th)

Gate Threshold Voltage 2.2 ––– 3.9 V

Drain-to-Source Leakage Current ––– ––– 1.0 μA

––– ––– 150

I

GSS

Gate-to-Source Forward Leakage ––– ––– 100 nA

Gate-to-Source Reverse Leakage ––– ––– -100

R

G

Internal Gate Resistance ––– 2.2 –––

Notes:

 Calculated continuous current based on maximum allowable junction

temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)

 Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by T

RG = 50Ω, I

 I

≤ 100A, di/dt ≤ 1288A/μs, V

SD

, starting TJ = 25°C, L = 0.069mH

Jmax

= 100A, VGS =10V.

AS

DD

≤ V

(BR)DSS

, TJ ≤ 175°C.

 Pulse width ≤ 400μs; duty cycle ≤ 2%.  C

eff. (TR) is a fixed capacitance that gives the same charging time

oss

as C

while V

oss

 C

eff. (ER) is a fixed capacitance that gives the same energy as

oss

C

while V

oss

DS

is rising from 0 to 80% V

DS

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recom

mended footprint and soldering techniques refer to application note #AN-994.

 R

is measured at TJ approximately 90°C.

θ

 Limited by T

I

AS

Jmax

= 40A, VGS =10V.

Conditions

= 0V, ID = 250μA

V

GS

Reference to 25°C, I

m

VGS = 10V, ID = 100A

Ω

m

Ω

= 6.0V, ID = 50A

V

GS

= 1.0mA

D

g

VDS = VGS, ID = 150μA

= 40V, VGS = 0V

V

DS

= 40V, VGS = 0V, TJ = 125°C

V

DS

V

= 20V

GS

V

= -20V

GS

is rising from 0 to 80% V

DSS

.

, starting TJ = 25°C, L = 0.069mH,RG = 50Ω,

d

Dynamic @ TJ = 25°C (unless otherwise specified)

Ω

Symbol Parameter Min. Typ. Max. Units

gfs Forward Transconductance 122 ––– ––– S

Q

t

d(on)

t

r

t

d(off)

t

f

C

g

gs

gd

sync

iss

oss

rss

oss

eff. (ER)

eff. (TR)

Total Gate Charge ––– 150 225 nC

Gate-to-Source Charge ––– 41 –––

Gate-to-Drain ("Miller") Charge ––– 51 –––

Total Gate Charge Sync. (Qg - Qgd) ––– 99 –––

Turn-On Delay Time ––– 18 ––– ns

Rise Time –––62–––

Turn-Off Delay Time –––78–––

Fall Time ––– 51 –––

Input Capacitance ––– 7437 ––– pF

Output Capacitance ––– 1097 –––

Reverse Transfer Capacitance ––– 748 –––

Effective Output Capacitance (Energy Related)

Effective Output Capacitance (Time Related)

i

––– 1314 –––

h

––– 1735 –––

Diode Characteristics

Symbol Parameter Min. Typ. Max. Units

285

I

S

Continuous Source Current ––– –––

c

(Body Diode)

I

SM

V

SD

t

rr

Pulsed Source Current ––– ––– 1040 A

(Body Diode)

d

Diode Forward Voltage ––– 1.0 1.3 V

Reverse Recovery Time ––– 37 ––– ns TJ = 25°C VR = 34V,

–––38––– T

Q

rr

Reverse Recovery Charge ––– 34 ––– nC TJ = 25°C

–––36––– TJ = 125°C

I

RRM

t

on

Reverse Recovery Current ––– 1.8 ––– A TJ = 25°C

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

IRFS7437-7PPbF

Conditions

= 10V, ID = 100A

V

DS

= 100A

I

D

= 20V

V

DS

VGS = 10V

= 100A, VDS = 20V, VGS = 10V

I

D

VDD = 20V

I

= 30A

D

= 2.7

R

G

V

GS

VGS = 0V

V

DS

ƒ = 1.0 MHz

V

GS

VGS = 0V, VDS = 0V to 32V

MOSFET symbol

A

showing the

integral reverse

p-n junction diode.

TJ = 25°C, IS = 100A, VGS = 0V

= 125°C IF = 100A

J

g

= 10V

g

= 25V

= 0V, VDS = 0V to 32V

Conditions

di/dt = 100A/μs

i h

D

G

S

g

IRFS7437-7PPbF

10000

TOP 15V

) A

(

1000

t n e

r

r u

C e

c

r

100

u o S

o

t

n

i a

r

10

D ,

D

I

5.0V

≤

BOTTOM 5.0V

60μs PULSE WIDTH

Tj = 25°C

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics

10000

) A

( t

1000

n e

r

r u

C e

c

r

100

u o S

o

t

n

i a

r

10

D ,

D

I

TJ = 175°C

TJ = 25°C

V

= 10V

DS

≤60μs PULSE WIDTH

1.0 2 3 4 5 6 7 8 9

VGS, Gate-to-Source Voltage (V)

Fig 5. Typical Transfer Characteristics

VGS

10V

8.0V

7.0V

6.5V

6.0V

5.5V

10000

VGS

10V

8.0V

7.0V

6.5V

6.0V

5.5V

) A

( t n e

r

1000

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

100

5.0V

60μs PULSE WIDTH

≤

TOP 15V

BOTTOM 5.0V

Tj = 175°C

10

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 4. Typical Output Characteristics

2.0

e c n a

t s

i s e

R n O e

c

r u o S

o

t

n

i a

r D

,

) n o

( S D

R

) d e z

i

l a

m

r o

N

(

1.8

1.6

1.4

1.2

1.0

0.8

ID = 100A

V

= 10V

GS

0.6

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

Fig 6. Normalized On-Resistance vs. Temperature

100000

) F

10000

p

( e

c n a

t

i c a p a

C

1000

, C

100

V

= 0V, f = 1 MHZ

GS

C

= C

+ Cgd, C

gs

gd

+ C

ds

iss

C

rss

C

oss

C

iss

C

oss

C

rss

SHORTED

ds

gd

1 10 100

VDS, Drain-to-Source Voltage (V)

14.0 ID= 100A

12.0

) V

( e

g

10.0

a

t

l o V

e

8.0

c

r u o S

-

6.0

o

t

e

t a

4.0

G ,

S G

V

2.0

VDS= 32V

VDS= 20V

0.0 0 20 40 60 80 100 120 140 160 180 200

QG, Total Gate Charge (nC)

Fig 8. Typical Gate Charge vs. Gate-to-Source VoltageFig 7. Typical Capacitance vs. Drain-to-Source Voltage

IRFS7437-7PPbF

10000

) A

(

1000

t n e

r

r u

C n

i a

r

100

D e

s

r e v e

R ,

D S

I

TJ = 175°C

TJ = 25°C

10

V

= 0V

GS

1.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

VSD, Source-to-Drain Voltage (V)

Fig 9. Typical Source-Drain Diode

) V

(

49

e g a

t

l

48

o V

n

47

w o d k

46

a e

r B

45

e c

r u

44

o S

o

t

43

n

i a

r

42

D ,

S S

41

D

) R

40

B

(

V

-60 -40 -20 0 20 40 60 80 100120140160180

Forward Voltage

Id = 1.0mA

TJ , Temperature ( °C )

Fig 11. Drain-to-Source Breakdown Voltage

)

10.0

Ω

m

( e

c n a

8.0

t s

i s e

R n

6.0

O e

c

r u o S

-

4.0

o

t

n

i a

r D

2.0

,

) n o

(

S D

0.0

R

0 200 400 600 800 1000 1200

10000

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D , I

) J

μ

( y

g

r e n E

ID, Drain Current (A)

OPERATION IN THIS AREA LIMITED BY RDS(on)

1000

100μsec

1msec

100

Limited by

10

1

D

0.1

0.1 1 10 100

package

Tc = 25°C Tj = 175°C Single Pulse

VDS, Drain-toSource Voltage (V)

10msec

DC

Fig 10. Maximum Safe Operating Area

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

-0.1

-5 0 5 10 15 20 25 30 35 40

V

Drain-to-Source Voltage (V)

DS,

Fig 12. Typical C

VGS = 6.0V

V

= 7.0V

GS

VGS = 8.0V

VGS =10V

Stored Energy

OSS

Fig 13. Typical On-Resistance vs. Drain Current

IRFS7437-7PPbF

1

W

/ C

° )

C J h

t

Z (

e

0.01

s n o p s e

R l a

0.001

m

r e h T

0.1

D = 0.50

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 150°C and

) A

( t n e

r

r u

C e

h c n a

l a v A

100

10

Tstart =25°C (Single Pulse)

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25°C and

Tstart = 150°C.

1

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

350

TOP Single Pulse

300

) J

m

(

250

y g

r e n E

200

e h c n a

150

l a v A ,

100

R A

E

BOTTOM 1.0% Duty Cycle ID = 100A

50

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T

2. Safe operation in Avalanche is allowed as long asT

. This is validated for every part type.

jmax

is not exceeded.

jmax

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P

= Average power dissipation per single avalanche pulse.

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ΔT = Allowable rise in junction temperature, not to exceed T

(assumed as

jmax

25°C in Figure 14, 15). t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see Figures 13)

thJC

P

D (ave)

·f

av

= 1/2 ( 1.3·BV·Iav) = DT/ Z

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

Fig 16. Maximum Avalanche Energy vs. Temperature

IRFS7437-7PPbF

5.0

) V

( e

g

4.0

a

t

l o V

d

l o h s e

3.0

r h

t e

t a

G ,

) h

2.0

t

( S G

V

1.0

ID = 150μA

ID = 1.0mA

ID = 1.0A

-75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( °C )

Fig 17. Threshold Voltage vs. Temperature

12

IF = 100A

VR = 34V

10

TJ = 25°C

TJ = 125°C

8

) A

(

6

M R R

I

4

12

IF = 60A

VR = 34V

10

TJ = 25°C

TJ = 125°C

8

) A

(

6

M R R

I

4

2

0

0 200 400 600 800 1000

diF /dt (A/μs)

Fig. 18 - Typical Recovery Current vs. dif/dt

300

IF = 60A

VR = 34V

250

TJ = 25°C

TJ = 125°C

200

) C

n

(

150

R R

Q

100

2

0

0 200 400 600 800 1000

diF /dt (A/μs)

300

250

200

) C

n

(

150

R R

Q

100

50

0

0 200 400 600 800 1000

50

0

0 200 400 600 800 1000

diF /dt (A/μs)

Fig. 20 - Typical Stored Charge vs. dif/dtFig. 19 - Typical Recovery Current vs. dif/dt

IF = 100A

VR = 34V

TJ = 25°C

TJ = 125°C

diF /dt (A/μs)

Fig. 21 - Typical Stored Charge vs. dif/dt

IRFS7437-7PPbF

A

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf





Reverse Recovery Current

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Current

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer

-

• dv/dt controlled by R

• Driver same type as D.U.T.

• I

controlled by Duty Factor "D"

SD

• D.U.T. - Device Under Test



G

+

V

DD

Re-Applied Voltage

+

-

Period

P.W.

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

V

15V

V

DS

L

DRIVER

t

p

(BR)DSS

R

G

20V

V

GS

Fig 22a. Unclamped Inductive Test Circuit

V

GS

R

G

10V

V

GS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

D.U.T

I

AS

Ω

0.01

t

p

+

V

DD

-

I

AS

Fig 22b. Unclamped Inductive Waveforms

R

D.U.T.

D

+

V

DD

-

V

DS

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Current Regulator

Same Type as D.U.T.

.2μF

12V

V

GS

50KΩ

3mA

.3μF

D.U.T.

+

V

DS

-

Vds

Vgs(th)

Id

Vgs

I

Current Sampling Resistors

Fig 24a. Gate Charge Test Circuit

I

G

D

Qgs1

Qgs2 Qgd Qgodr

Fig 24b. Gate Charge Waveform

D2Pak - 7 Pin Package Outline

Dimensions are shown in millimeters (inches)

IRFS7437-7PPbF

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

D2Pak - 7 Pin Part Marking Information

IRFS7437-7PPbF

INTERNATIONAL RECTIFIER LOGO

2

D

Pak - 7 Pin Tape and Reel

ASSEMBLY LOT CODE

IRFS7437-7P

YWWP

LC LC

PART NUMBER

DATE CODE Y = LAST DIGIT OF YEAR WW = WORK WEEK P = LEAD-FREE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

IRFS7437-7PPbF

Indust rial

•

Qualification information

Qualification level

Moisture Sensitivity Level

RoHS c ompliant

†

††

†††

guidelines)

MS L 1

(per JE DEC J-S TD-020D

†††

)

2

Pak-7PIN

D

(per JEDEC JES D47F

Yes

 Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/

 Higher qualification ratings may be available should the user have such requirements. Please contact your

International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/

 Applicable version of JEDEC standard at the time of product release.

Revision History

Date Comment

4/30/2014

2/19/2015

Updated data sheet based on corporate template.

•

Updated package outline and part marking on page 9 & 10.

•

Updated E

•

Updated note 10 “Limited by T

= 796mJ on page 2

AS (L =1mH)

, starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 40A, VGS =10V”. on page 2

Jmax

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/