Datasheet IRFS52N15DPBF Specification

Page 1
SMPS MOSFET
PD - 94357A
IRFB52N15D
IRFS52N15D
IRFSL52N15D
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
V
DSS
R
DS(on)
max I
150V 0.032Ω 60A
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective C
to Simplify Design, (See
OSS
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
TO-220AB
IRFB52N15D
D2Pak
IRFS52N15D
TO-262
IRFSL52N15D
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 60 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 43 A I
DM
PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 320
V
GS
dv/dt Peak Diode Recovery dv/dt 5.5 V/ns T
J
T
STG
Pulsed Drain Current 240
Linear Derating Factor 2.1 W/°C Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
D
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
R
θJA
Notes through are on page 11
Junction-to-Case ––– 0.47 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient ––– 62 Junction-to-Ambient ––– 40
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IRFB/IRFS/IRFSL52N15D
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 550 ––– VGS = 0V, VDS = 0V to 120V
oss
Drain-to-Source Breakdown Voltage 150 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient
J
––– 0.16 ––– V/°C Reference to 25°C, ID = 1mA Static Drain-to-Source On-Resistance ––– ––– 0.032 Ω VGS = 10V, ID = 36A Gate Threshold Voltage 3.0 ––– 5.0 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100
––– ––– 25 ––– ––– 250 VDS = 120V, VGS = 0V, TJ = 150°C
µA
nA
= 150V, VGS = 0V
V
DS
= 30V
GS
V
= -30V
GS
Parameter Min. Typ. Max. Units Conditions Forward Transconductance 19 ––– ––– S VDS = 50V, ID = 36A Total Gate Charge ––– 60 89 ID = 36A Gate-to-Source Charge ––– 18 27 nC VDS = 75V Gate-to-Drain ("Miller") Charge ––– 28 42 VGS = 10V, Turn-On Delay Time ––– 16 ––– VDD = 75V Rise Time ––– 47 ––– ID = 36A Turn-Off Delay Time ––– 28 ––– RG = 2.5Ω
ns
Fall Time ––– 25 ––– VGS = 10V Input Capacitance ––– 2770 ––– VGS = 0V Output Capacitance ––– 590 ––– VDS = 25V Reverse Transfer Capacitance ––– 110 ––– pF ƒ = 1.0MHz Output Capacitance ––– 3940 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 260 ––– VGS = 0V, VDS = 120V, ƒ = 1.0MHz
Avalanche Characteristics
Parameter Typ. Max. Units
E
AS
I
AR
E
AR
Single Pulse Avalanche Energy ––– 470 mJ Avalanche Current ––– 36 A Repetitive Avalanche Energy ––– 32 mJ
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode) 
––– –––
––– –––
60
240
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 36A, VGS = 0V Reverse Recovery Time ––– 140 210 nS TJ = 25°C, IF = 36A Reverse RecoveryCharge ––– 780 1170 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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D
S
Page 3
IRFB/IRFS/IRFSL52N15D
(
)
1000
100
10
1
, Drain-to-Source Current (A)
D
I
VGS TOP 15V 12V 10V
8.0V
7.0V
6.0V
5.5V BOTTOM 5.0V
5.0V
300µs PULSE WIDTH
0.1
0.1 1 10 100
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000.00
1000
100
10
1
, Drain-to-Source Current (A)
D
I
VGS TOP 15V 12V 10V
8.0V
7.0V
6.0V
5.5V BOTTOM 5.0V
5.0V
300µs PULSE WIDTH Tj = 175°C
0.1
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
60A
I =
D
)
(Α
100.00
10.00
, Drain-to-Source Current
D
I
TJ = 25°C
1.00
5.0 7.0 9.0 11.0 13.0 15.0
TJ = 175°C
V
= 15V
DS
300µs PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature
J
Fig 4. Normalized On-Resistance
V =
10V
GS
°
C
Vs. Temperature
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IRFB/IRFS/IRFSL52N15D
)
100000
10000
1000
C, Capacitance(pF)
100
10
1 10 100 1000
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs gd
+ C
ds
Ciss
Coss
Crss
gd
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.00
SHORTED
ds
12
ID= 36A
10
VDS= 120V VDS= 75V
8
6
4
, Gate-to-Source Voltage (V)
GS
2
V
0
0 10203040506070
Q
Total Gate Charge (nC
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED BY RDS(on)
100.00
10.00
, Reverse Drain Current (A)
1.00
SD
I
0.10
TJ = 175°C
TJ = 25°C
0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
V
= 0V
GS
100
100µsec
10
1
, Drain-to-Source Current (A)
D
I
Tc = 25°C Tj = 175°C Single Pulse
0.1 1 10 100 1000
V
, Drain-toSource Voltage (V)
DS
1msec
10msec
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRFB/IRFS/IRFSL52N15D
+
-
(
)
70
60
50
40
30
D
I , Drain Current (A)
20
10
0
25 50 75 100 125 150 175
T , Case Temperature
C
°
C
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
D = 0.50
thJC
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
P
DM
t
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFB/IRFS/IRFSL52N15D
A
)
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
DD
900
TOP
720
540
360
180
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting Tj, Junction Temperature( C
BOTTOM
°
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
D 15A 26A 36A
Current Regulator
Same Type as D.U.T.
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
V
GS
Fig 13b. Gate Charge Test Circuit
50KΩ
.2µF
.3µF
3mA
Current Sampling Resistors
+
V
D.U.T.
I
G
DS
-
I
D
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IRFB/IRFS/IRFSL52N15D
+
-
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
VGS=10V
V
DD
*
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFET® Power MOSFETs
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IRFB/IRFS/IRFSL52N15D
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LOT CODE 1789 A SSEMBLED O N WW 19, 1997 IN THE ASSEMBLY LINE "C"
INTERNATIO NA L
REC TIFIER
LOGO
ASSEMBLY LOT C ODE
PART NUMBER
DA TE CODE YEA R 7 = 1997 WEE K 19 LINE C
EX AMPLE: THIS IS AN IRF1010
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
.415
2.87 (.113
2.62 (.103
15.24 (.600
14.84 (.584
14.09 (.555
13.47 (.530
10.54
10.29 (.405
1 2 3
4
6.47 (.2 5 5
6.10 (.2 4 0
1.15 (.045 MIN
4.06 (.160
3.55 (.140
3.78 (.149
3.54 (.139
- A -
4.69 (.1 8 5
4.20 (.1 6 5
- B -
1.32 (.052
1.22 (.048
LEAD ASSIGNMENTS 1 - G ATE 2 - D RA IN 3 - S OU RC E 4 - D RA IN
0.93 (.037
3X
1.40 (.0 5 5
3X
1.15 (.0 4 5
2.54 (.100
NOTES: 1 DIMEN S IONING & TO LE R A N C ING P ER AN S I Y14.5M, 1982. 3 OUTLINE C ON F O R M S TO JE D EC OU T LINE TO -220A B . 2 C O NT RO L L ING DIM E NS IO N : IN C H 4 H E A TS IN K & L EA D ME A SU R E M E NT S D O N OT INCLUDE BURRS.
2X
0.69 (.027
0.36 (.014) M B A M
0.55 (.022
3X
0.46 (.018
2.92 (.115
2.64 (.104
TO-220AB Part Marking Information
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Page 9
D2Pak Package Outline
THIS IS AN IRF530S W ITH
IRFB/IRFS/IRFSL52N15D
10.54 (.415)
1.40 (.055) MA X.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S: 1 DIM ENSIONS AFTER SOLDER DIP. 2 DIM ENSIONING & TOLE RANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
2
D
Pak Part Marking Information
10.29 (.405)
- A ­2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10 ) M B A M
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS 1 - G ATE 2 - D RA IN 3 - S OURCE
10.16 (.400) REF .
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350) REF .
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082) 2X
2.54 (.100) 2X
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LOT CODE 8024 A SSEMBLED O N WW 02, 2000 IN THE ASSEM BLY LINE "L"
INTERNATIO NA L
REC TIFIER
LOGO
ASSEMBLY LOT C OD E
PART NUMBER
F530S
DA TE CODE YEA R 0 = 2000 WEE K 02 LINE L
Page 10
IRFB/IRFS/IRFSL52N15D
EX AMPLE: TH IS I S AN IRL3103L
LOT CODE 1789
ASSEMBLY
PART NUMBER
DA TE CODE
WEE K 19 LINE C
LOT C ODE
YEA R 7 = 1997
A SSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C"
LOGO
REC TIFIER
INTERNATIONAL
TO-262 Package Outline
TO-262 Par t Mar king Information
10 www.irf.com
Page 11
D2Pak Tape & Reel Information
TRR
FEED DIRECTION
TRL
FEED DIRECTION
1.85 (.0 73)
1.65 (.0 65)
10.90 (.429)
10.70 (.421)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
IRFB/IRFS/IRFSL52N15D
1.60 (.063)
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.50 (.059)
1.75 (.069)
1.25 (.049)
15.42 (.609)
15.22 (.601)
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSIO N: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 0.72mH
J
= 36A.
AS
≤ 36A, di/dt ≤ 400A/µs, V
TJ ≤ 175°C.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
This is only applied to TO-220AB package.
DD
≤ V
(BR)DSS
This is applied to D
,
(FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
is rising from 0 to 80% V
DS
2
Pak, when mounted on 1" square PCB
TO-220 package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] (IRFB52N15D),
Qualification Standards can be found on IR’s Web site.
27.40 (1.079)
23.90 (.941)
4
60.00 (2.362) MIN.
30.40 (1.197)
26.40 (1.039)
24.40 (.961) 3
MAX.
DSS
4
.
& Industrial (IRFS/SL52N15D) market.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/02
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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