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PD- 94080
IRFB4710
IRFS4710
IRFSL4710
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
l Motor Control
l Uninterrutible Power Supplies
V
DSS
R
DS(on)
max I
100V 0.014Ω 75A
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective C
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
to Simplify Design, (See
OSS
TO-220AB
IRFB4710
D2Pak
IRFS4710
TO-262
IRFSL4710
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 75
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 53 A
I
DM
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 200
V
GS
dv/dt Peak Diode Recovery dv/dt 8.2 V/ns
T
J
T
STG
Pulsed Drain Current 300
Linear Derating Factor 1.4 W/°C
Gate-to-Source Voltage ± 20 V
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
D
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
R
θJA
Notes through are on page 11
Junction-to-Case ––– 0.74
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62
Junction-to-Ambient ––– 40
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IRFB/IRFS/IRFL4710
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 430 ––– VGS = 0V, VDS = 0V to 80V
oss
Drain-to-Source Breakdown Voltage 100 –– – ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient
J
––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance ––– 0.011 0.014 Ω VGS = 10V, ID = 45A
Gate Threshold Voltage 3.5 –– – 5.5 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 1.0
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 95V, VGS = 0V
µA
nA
VGS = -20V
Parameter Min. Typ. Max. Units Conditions
Forward Transconductance 35 ––– ––– S VDS = 50V, ID = 45A
Total Gate Charge ––– 110 170 ID = 45A
Gate-to-Source Charge ––– 43 ––– nC VDS = 50V
Gate-to-Drain ("Miller") Charge ––– 40 ––– VGS = 10V,
Turn-On Delay Time ––– 35 –– – VDD = 50V
Rise Time ––– 130 ––– ID = 45A
Turn-Off Delay Time ––– 41 ––– RG = 4.5Ω
ns
Fall Time ––– 38 ––– VGS = 10V
Input Capacitance ––– 6160 ––– VGS = 0V
Output Capacitance ––– 440 ––– VDS = 25V
Reverse Transfer Capacitance ––– 250 ––– pF ƒ = 1.0MHz
Output Capacitance ––– 1580 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 280 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Avalanche Characteristics
Parameter Typ. Max. Units
E
AS
I
AR
E
AR
Single Pulse Avalanche Energy ––– 190 mJ
Avalanche Current ––– 45 A
Repetitive Avalanche Energy ––– 20 mJ
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
75
300
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 45A, VGS = 0V
Reverse Recovery Time ––– 74 110 n s TJ = 25°C, IF = 45A
Reverse RecoveryCharge ––– 180 260 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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D
S
Page 3
IRFB/IRFS/IRFL4710
1000
100
10
1
0.1
D
I , Drain-to-Source Current (A)
0.01
0.1 1 10 100
1000
VGS
TOP
15V
12V
10V
8.0V
7.5V
7.0V
6.5V
BOTTOM
6.0V
6.0V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
1000
100
10
D
I , Drain-to-Source Current (A)
°
1
0.1 1 10 100
VGS
TOP
15V
12V
10V
8.0V
7.5V
7.0V
6.5V
BOTTOM
6.0V
6.0V
20µs PULSE WIDTH
T = 175 C
V , Drain-to-Source Voltage (V)
DS
°
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
75A
I =
D
°
T = 175 C
100
D
I , Drain-to-Source Current (A)
J
10
°
T = 25 C
J
1
V = 50V
DS
0.1
6.0 7.0 8.0 9.0 10.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
10V
GS
°
Vs. Temperature
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IRFB/IRFS/IRFL4710
10000
8000
6000
4000
C, Capacitance(pF)
2000
0
Ciss
Coss
Crss
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
gd
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
SHORTED
ds
20
I =
45A
D
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 40 80 120 160 200
Q , Total Gate Charge (nC)
G
V = 80V
DS
V = 50V
DS
V = 20V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
13
100
°
T = 175 C
J
10
°
T = 25 C
1
SD
I , Reverse Drain Current (A)
0.1
0.0 0.4 0.8 1.2 1.6
V ,Source-to-Drain Voltage (V)
SD
J
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
100
100µsec
10
1msec
1
, Drain-to-Source Current (A)
D
I
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1 10 100 1000
V
, Drain-toSource Voltage (V)
DS
10msec
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRFB/IRFS/IRFL4710
R
D.U.T.
D
+
V
DD
-
80
60
40
R
V
DS
V
GS
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
I , Drain Current (A)
20
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
thJC
0.20
0.1
0.10
P
0.05
SINGLE PULSE
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
DM
t
1 2
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFB/IRFS/IRFL4710
A
15V
DRIVER
+
-
V
DD
R
V
G
V
20V
GS
DS
L
D.U.T
I
AS
0.01
t
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
350
300
250
200
150
100
50
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
TOP
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
°
D
18A
32A
45A
Current Regulator
Same Type as D.U.T.
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
V
GS
Fig 13b. Gate Charge Test Circuit
50KΩ
.2µF
.3µF
3mA
Current Sampling Resistors
+
V
D.U.T.
I
G
DS
-
I
D
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IRFB/IRFS/IRFL4710
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
+
+
V
DD
-
VGS=10V
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFET® Power MOSFETs
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Page 8
IRFB/IRFS/IRFL4710
A
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.60 0)
14.84 (.58 4)
14.09 (.5 55)
13.47 (.5 30)
1.40 (.05 5)
3X
1.15 (.04 5)
2.54 (.10 0)
NOTES:
1 DIMEN S IONING & TO LE RAN C ING P E R AN S I Y14.5M, 1982. 3 OUTL INE C ON F O R M S TO JE D E C OU T LINE TO -220A B .
2 C O N T R O L L ING D IMEN S ION : IN CH 4 H EA T S IN K & L E A D M E A S URE M EN TS D O NOT INCLUDE BURRS.
2X
10.29 (.405)
4
1 2 3
3X
0.36 ( .0 1 4 ) M B A M
6.47 (.255)
6.10 (.240)
1.15 (.04 5)
MIN
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.18 5)
4.20 (.16 5)
- B -
1.32 (.05 2)
1.22 (.04 8)
3X
2.92 (.115)
2.64 (.104)
LEAD ASSIGNMENTS
1 - G AT E
2 - D RA IN
3 - S OU R C E
4 - D RA IN
0.55 (.02 2)
0.46 (.01 8)
TO-220AB Part Marking Information
EXAM PLE : THIS IS AN IRF1010
W IT H A SS EMB L Y
LOT CO D E 9 B 1 M
INTERNA TIONAL
RECTIFIE R
LOG O
ASSEMBLY
LO T C OD E
IRF1010
9246
9B 1M
PART NUMBER
DATE CODE
(YYWW)
YY = YEAR
W W = W EEK
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Page 9
D2Pak Package Outline
A
IRFB/IRFS/IRFL4710
10.54 (.415)
1.40 (.055)
MAX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A 2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10 ) M B A M
4.69 (.185)
4.20 (.165)
D2Pak Part Marking Information
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS
1 - G ATE
2 - D RA IN
3 - S OURCE
10.16 (.400)
REF.
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350)
REF.
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
2.54 (.100)
2X
INTERNATIONAL
RE CTIFIE R
LO G O
A S SEMBLY
LO T CO D E
F530S
9246
9 B 1M
PART NUM B ER
DATE CODE
(YYW W )
YY = YEAR
WW = WEEK
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Page 10
IRFB/IRFS/IRFL4710
TO-262 Package Outline
TO-262 Part Marking Information
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Page 11
D2Pak Tape & Reel Information
TRR
FEED DIRECTION
TRL
FEED DIRECTION
1.85 (.0 73)
1.65 (.0 65)
10.90 (.429)
10.70 (.421)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
IRFB/IRFS/IRFL4710
1.60 (.063)
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.50 (.059)
1.75 (.069)
1.25 (.049)
15.42 (.609)
15.22 (.601)
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSIO N: MILLIM ETER.
3. DIMENSION MEASURED @ HUB.
Notes:
4. INCLUDES FLANGE DISTORTION @ O UTER EDGE.
Repetitive rating; pulse width limited by
13.50 (.532)
12.80 (.504)
Pulse width ≤ 400µs; duty cycle ≤ 2%.
27.40 (1.079)
23.90 (.941)
4
26.40 (1.03 9)
24.40 (.961 )
3
max. junction temperature.
C
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 190µH
J
AS
≤ 45A, di/dt ≤ 420A/µs, V
= 45A, VGS = 10V
DD
≤ V
(BR)DSS
,
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
This is only applied to TO-220AB package
TJ ≤ 175°C
This is applied to D
2
Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
4
DSS
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 3/01
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