Datasheet IRFS4610PBF Datasheet

Applications

)

l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits

PD - 95936C

IRFB4610PbF IRFS4610PbF

IRFSL4610PbF

HEXFET® Power MOSFET

D

V

DSS

R

DS(on

G

max.

typ.

100V

11m

14m

: :

I

S

D

Benefits

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free

S

D

G

TO-220AB

IRFB4610PbF

IRFS4610PbF

D

G

D2Pak

S

Absolute Maximum Ratings

Symbol Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V

I

@ TC = 100°C

D

I

DM

PD @TC = 25°C

V

GS

dV/dt T

J

T

STG

Continuous Drain Current, V

Pulsed Drain Current

Maximum Power Dissipation W

Linear Derating Factor

Gate-to-Source Voltage V

Peak Diode Recovery

Operating Junction and °C

Storage Temperature Range

Soldering Temperature, for 10 seconds

(1.6mm from case)

Mounting torque, 6-32 or M3 screw

f

e

@ 10V

GS

Max.

73

52

290

190

1.3

± 20

7.6

-55 to + 175

300

10lbxin (1.1Nxm)

73A

S

D

G

TO-262

IRFSL4610PbF

A

W/°C

V/ns

Avalanche Characteristics

E

AS (Thermally limited)

I

AR

E

AR

Single Pulse Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

c

f

d

370

See Fig. 14, 15, 16a, 16b,

mJ

Thermal Resistance

Symbol Parameter Typ. Max. Units

R

θ

JC

R

θ

CS

R

θ

JA

R

θ

JA

Junction-to-Case

Case-to-Sink, Flat Greased Surface , TO-220 0.50 ––– °C/W

Junction-to-Ambient, TO-220

Junction-to-Ambient (PCB Mount) , D2Pak

j

ij

––– 0.77

––– 62

––– 40

www.irf.com 1

A

09/16/10

IRF/B/S/SL4610PbF

/

g

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

V

(BR)DSS

V

∆

(BR)DSS

R

DS(on)

V

GS(th)

I

DSS

I

GSS

R

G

Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

gfs Forward Transconductance 73 ––– ––– S Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

C

iss

C

oss

C

rss

C

eff. (ER)

oss

C

eff. (TR)

oss

Drain-to-Source Breakdown Voltage 100 ––– ––– V

T

∆

Breakdown Voltage Temp. Coefficient ––– 0.085 ––– V/°C

J

Static Drain-to-Source On-Resistance ––– 11 14

Gate Threshold Voltage 2.0 ––– 4.0 V

Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250

Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Source Reverse Leakage ––– ––– -200

Gate Input Resistance ––– 1.5 ––– Ω f = 1MHz, open drain

Total Gate Charge ––– 90 140 nC

Gate-to-Source Charge ––– 20 –––

Gate-to-Drain ("Miller") Charge ––– 36 –––

Turn-On Delay Time ––– 18 ––– ns

Rise Time ––– 87 –––

Turn-Off Delay Time ––– 53 –––

Fall Time ––– 70 –––

Input Capacitance ––– 3550 ––– pF

Output Capacitance ––– 260 –––

Reverse Transfer Capacitance ––– 150 –––

Effective Output Capacitance (Ener

y Related)

Effective Output Capacitance (Time Related)

––– 330 –––

––– 380 –––

VGS = 0V, ID = 250µA

Reference to 25°C, I

= 10V, ID = 44A

V

m

Ω

GS

= VGS, ID = 100µA

V

DS

V

= 100V, VGS = 0V

DS

V

= 100V, VGS = 0V, TJ = 125°C

DS

VGS = 20V

V

= -20V

GS

VDS = 50V, ID = 44A

I

= 44A

D

V

= 80V

DS

VGS = 10V

= 65V

V

DD

ID = 44A

R

= 5.6Ω

G

VGS = 10V

= 0V

V

GS

V

= 50V

DS

ƒ = 1.0MHz

V

= 0V, VDS = 0V to 80V h, See Fig.11

GS

V

= 0V, VDS = 0V to 80V g, See Fig. 5

GS

Conditions

f

= 1mA

D

f

c

Diode Characteristics

Symbol Parameter Min. Typ. Max. Units

I

S

I

SM

V

SD

t

rr

Q

rr

I

RRM

t

on

Notes:

 Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by T

RG = 25Ω, I above this value.

 I

≤ 44A, di/dt ≤ 660A/µs, V

SD

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

Continuous Source Current ––– –––

73

(Body Diode) Pulsed Source Current ––– ––– 290

(Body Diode)

c

Diode Forward Voltage ––– ––– 1.3 V

Reverse Recovery Time ––– 35 53 ns

––– 42 63

Reverse Recovery Charge ––– 44 66 nC

––– 65 98

Reverse Recovery Current ––– 2.1 ––– A

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 C

eff. (TR) is a fixed capacitance that gives the same charging time

oss

, starting TJ = 25°C, L = 0.39mH

Jmax

= 44A, VGS =10V. Part not recommended for use

AS

as C

 C

C

while V

oss

eff. (ER) is a fixed capacitance that gives the same energy as

oss

while V

oss

DS

is rising from 0 to 80% V

DS

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recom

DD

≤ V

(BR)DSS

, TJ ≤ 175°C.

mended footprint and soldering techniques refer to application note #AN-994.

 R

is measured at TJ approximately 90°C

θ

MOSFET symbol

A

showing the integral reverse

p-n junction diode. T

= 25°C, IS = 44A, VGS = 0V

J

= 25°C VR = 85V,

T

J

= 125°C IF = 44A

T

J

= 25°C

T

J

= 125°C

T

J

= 25°C

T

J

is rising from 0 to 80% V

DSS

Conditions

di/dt = 100A/µs

.

DSS

.

D

G

S

f

2 www.irf.com

IRF/B/S/SL4610PbF

1000

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

TOP 15V

100

BOTTOM 4.5V

10

VGS

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

60µs PULSE WIDTH

≤

Tj = 25°C

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

1000.0

)

Α

(

t n

100.0

e

r

r u

C e

c

r u

10.0

o S

o

t

n

i a

r D

,

D

I

TJ = 175°C

TJ = 25°C

1.0

V

= 25V

DS

≤ 60µs PULSE WIDTH

0.1

2.0 3.0 4.0 5.0 6.0 7.0 8.0

VGS, Gate-to-Source Voltage (V)

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

, I

1000

TOP 15V

BOTTOM 4.5V

100

D

VGS

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

60µs PULSE WIDTH

≤

Tj = 25°C

10

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output Characteristics

3.0

e c n a

t s

i s e

R n O e

c

r u o S

o

t

n

i a

r D

,

) n o

( S D

R

ID = 73A

V

= 10V

GS

2.5

)

2.0

d e z

i

l a

m

r o

1.5

N

(

1.0

0.5

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics

6000

5000

) F

4000

p

( e

c n a

t

i

3000

c a p a

C

2000

, C

1000

0

1 10 100

V

= 0V, f = 1 MHZ

GS

C

= C

+ Cgd, C

gs

gd

+ C

ds

gd

C

iss

rss

oss

Ciss

Coss Crss

VDS, Drain-to-Source Voltage (V)

SHORTED

Fig 4. Normalized On-Resistance vs. Temperature

20

ID= 44A

) V

(

16

e g a

t

l o V

e

12

c

r u o S

o

t

8

e

t a

G ,

S

4

G

V

0

0 20 40 60 80 100 120 140

VDS= 80V

VDS= 50V VDS= 20V

Q

Total Gate Charge (nC)

G

Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage

www.irf.com 3

IRF/B/S/SL4610PbF

1000.0

) A

( t

100.0

n e

r

r u

C n

i a

r

10.0

D e

s

r e v e

R ,

D S

I

TJ = 175°C

TJ = 25°C

1.0

0.1

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

VSD, Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode

Forward Voltage

80

60

) A

( t n e

r

r u

C

40

n

i a

r D

,

D

I

20

0

25 50 75 100 125 150 175

TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs.

Case Temperature

2.0

1.5

) J µ

( y

1.0

g

r e n E

0.5

0.0

0 20 40 60 80 100

V

Drain-to-Source Voltage (V)

DS,

V

GS

= 0V

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D ,

D

I

1000

100

10

1

Tc = 25°C

OPERATION IN THIS AREA LIMITED BY RDS(on)

100µsec

1msec

10msec

Tj = 175°C Single Pulse

DC

0.1 1 10 100 1000

V

, Drain-toSource Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

e g

125

a

t

l o V

n w

120

o d k a e

r B

115

e c

r u o S

o

t

110

n

i a

r D

,

105

S S D

) R B

(

100

V

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

Fig 10. Drain-to-Source Breakdown Voltage

1600

) J

m

( y

g

r e n

1200

E e

h c n a

l a v

800

A e

s

l u P

e

l g

400

n

i S

, S A

E

0

25 50 75 100 125 150 175

Starting TJ, Junction Temperature (°C)

I

TOP

4.6A

6.3A

BOTTOM

44A

D

Fig 11. Typical C

Stored Energy

OSS

Fig 12. Maximum Avalanche Energy Vs. DrainCurrent

4 www.irf.com

1

τ

IRF/B/S/SL4610PbF

D = 0.50

)

Z (

e s n o p s e

R l a

m

r e h T

C J h

t

0.001

0.1

0.01

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

τ

J

τ

J

τ

1

Ci= τi/Ri

R

1

2

R

1

2

τ

1

2

τ

2

Ri (°C/W) τi (sec)

τ

C

0.4367 0.001016

0.3337 0.009383

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.0001

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100

Duty Cycle = Single Pulse

) A

(

10

t n e

r

r u

C e

h c n a

l

1

a v

A

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and

0.01

0.05

0.10

Tstart = 150°C.

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and

Tstart =25°C (Single Pulse)

0.1

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth

400

TOP Single Pulse

) J

m

(

300

y g

r e n E

e h

200

c n a

l a v A ,

R

100

A

E

0

25 50 75 100 125 150 175

BOTTOM 1% Duty Cycle ID = 44A

Starting TJ , Junction Temperature (°C)

Fig 15. Maximum Avalanche Energy vs. Temperature

www.irf.com 5

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T

2. Safe operation in Avalanche is allowed as long as neither T

is exceeded.

. This is validated for every part type.

jmax

nor Iav

(max)

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

= Average power dissipation per single avalanche pulse.

D (ave)

during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed T

(assumed as

jmax

25°C in Figure 14, 15). t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see Figures 13)

thJC

P

D (ave)

·f

av

= 1/2 ( 1.3·BV·Iav) = DT/ Z

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

IRF/B/S/SL4610PbF

5.0

) V

( e

g a

4.0

t

l o V

d

l o h s e

3.0

r h

t e

t a

G ) h

t

2.0

(

S G

V

1.0

-75 -50 -25 0 25 50 75 100 125 150 175

ID = 1.0A

ID = 1.0mA

ID = 250µA

ID = 100µA

TJ , Temperature ( °C )

Fig 16. Threshold Voltage Vs. Temperature

16

12

) A

(

-

8

M R R

I

4

0

100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

IF = 44A

VR = 85V

TJ = 125°C

TJ = 25°C

16

12

) A

(

-

8

M R R

I

4

0

100 200 300 400 500 600 700 800 900 1000

IF = 29A

VR = 85V

TJ = 125°C

TJ = 25°C

dif / dt - (A / µs)

Fig. 17 - Typical Recovery Current vs. dif/dt

300

200

) C

n

(

R

Q

100

0

100 200 300 400 500 600 700 800 900 1000

IF = 29A

VR = 85V

TJ = 125°C

TJ = 25°C

dif / dt - (A / µs)

Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt

300

200

) C

n

(

R

Q

100

0

100 200 300 400 500 600 700 800 900 1000

IF = 44A

VR = 85V

TJ = 125°C

TJ = 25°C

dif / dt - (A / µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

6 www.irf.com

IRF/B/S/SL4610PbF

A





Reverse Recovery Current

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Current

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

V

DD

Re-Applied Voltage

+

-

Period

P.W.

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

V

15V

V

DS

L

DRIVER

t

p

(BR)DSS

R

G

V

20V

GS

Fig 22a. Unclamped Inductive Test Circuit

D.U.T

I

AS

Ω

0.01

t

p

+

V

DD

-

I

AS

Fig 22b. Unclamped Inductive Waveforms

L

V

DS

D

V

DS

90%

+

-

V

DD

10%

V

GS

t

d(on)

t

r

t

d(off)

t

f

V

GS

Pulse Width < 1µs

Duty Factor < 0.1%

D.U.T

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Vds

L

0

DUT

1K

VCC

Vgs(th)

Id

Vgs

Qgs1

Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit

www.irf.com 7

Fig 24b. Gate Charge Waveform

IRF/B/S/SL4610PbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

EXAMPL E : T HIS IS AN IRF 1010

LOT CODE 1789 AS S EMBLE D ON WW 19, 2000 IN THE ASSEMBLY LINE "C"

Note: "P" in ass embly line position

indi cates "L ead - F ree"

TO-220AB packages are not recommended for Surface Mount Application.

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

INTERNATIONAL

RECT IFIER

LOGO

ASSEMBLY LOT CODE

8 www.irf.com

PART NUMBER

DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

IRF/B/S/SL4610PbF

TO-262 Part Marking Information

EXAMPL E : T HIS IS AN IRL3103L

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

www.irf.com 9

LOT CODE 1789 ASS EMBL E D ON WW 19, 1997 IN THE ASSEMBLY LINE "C"

OR

INT ER NATIONAL

INTERNATIONAL

RECTIFIE R

LOGO

ASSEMBLY LOT CODE

RECTIF IER

LOGO

AS S E MB L Y LOT CODE

PART NUMB ER

DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C

PART NUMBE R

DAT E CODE P = DE S I GNAT E S L EAD- F R E E

PRODUCT (OPT IONAL ) YEAR 7 = 1997 WE E K 1 9 A = ASSEMBLY SITE CODE

IRF/B/S/SL4610PbF

2

Pak (TO-263AB) Package Outline

D

Dimensions are shown in millimeters (inches)

D2Pak (TO-263AB) Part Marking Information

THIS IS AN IRF530S WIT H

LOT CODE 8024 AS SE MBLE D ON WW 02, 2000 IN THE ASSEMBLY LINE "L"

INTERNAT IONAL

RECTIFIER

LOGO

ASSEMBLY LOT CODE

F530S

OR

INTERNAT IONAL

RECTIFIER

LOGO

ASSEMBLY LOT CODE

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

F530S

PART NUMBER

DATE CODE P = DESIGNATES LEAD - FREE

PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S E MB L Y S I T E CODE

10 www.irf.com

PART NUMBER

DATE CODE YEAR 0 = 2000 WEEK 02 LINE L

D2Pak (TO-263AB) Tape & Reel Information

TRR

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

1.60 (.063)

1.50 (.059)

IRF/B/S/SL4610PbF

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

TRL

FEED DIRECTION

330.00 (14.173) MAX.

1.85 (.073)

1.65 (.065)

10.90 (.429)

10.70 (.421)

13.50 (.532)

12.80 (.504)

11.60 (.457)

11.40 (.449)

1.75 (.069)

1.25 (.049)

16.10 (.634)

15.90 (.626)

15.42 (.609)

15.22 (.601)

27.40 (1.079)

23.90 (.941)

4

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

60.00 (2.362) MIN.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

26.40 (1.039)

24.40 (.961)

3

30.40 (1.197) MAX.

4

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 09/2010

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