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l Ultra Low On-Resistance
S
D
G
l Surface Mount (IRFR5305)
l Straight Lead (IRFU5305)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET
the designer with an extremely efficient and reliable device
for use in a wide variety of applications.
The D-Pak is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
®
Power MOSFETs are well known for, provides
PD-95025A
IRFR5305PbF
IRFU5305PbF
HEXFET® Power MOSFET
V
= -55V
DSS
R
D-Pak I-Pak
IRFR5305 IRFU5305
DS(on)
I
D
= 0.065Ω
= -31A
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -3 1
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -2 2 A
I
DM
PD @TC = 25°C Power Dissipation 11 0 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
T
J
T
STG
Pulsed Drain Current -110
Linear Derating Factor 0.71 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 280 mJ
Avalanche Current -16 A
Repetitive Avalanche Energy 11 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
R
θJA
Junction-to-Case ––– 1.4
Junction-to-Ambient (PCB mount)* ––– 50 °C/W
Junction-to-Ambient** ––– 110
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°C
12/13/04
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IRFR/U5305PbF
S
D
S
D
G
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– -0.034 ––– V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance –– – –– – 0.065 Ω VGS = -10V, ID = -16A
Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
Forward Transconductance 8.0 ––– ––– S VDS = -25V, ID = -16A
Drain-to-Source Leakage Current
––– ––– -25
––– ––– -250 VDS = -44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage –– – ––– -100
µA
nA
V
= -55V, VGS = 0V
DS
= 20V
GS
VGS = -20V
Total Gate Charge ––– ––– 6 3 ID = -16A
Gate-to-Source Charge ––– ––– 1 3 nC VDS = -44V
Gate-to-Drain ("Miller") Charge –– – ––– 29 VGS = -10V, See Fig. 6 and 13
Turn-On Delay Time –– – 1 4 –– – VDD = -28V
Rise Time –– – 66 ––– ID = -16A
Turn-Off Delay Time –– – 39 ––– RG = 6.8Ω
ns
Fall Time –– – 6 3 ––– RD = 1.6Ω, See Fig. 10
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance – –– 1200 ––– VGS = 0V
Output Capacitance ––– 520 ––– pF VDS = -25V
Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5
G
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
-31
-110
showing the
A
p-n junction diode.
Diode Forward Voltage –– – –– – -1.3 V TJ = 25°C, IS = -16A, VGS = 0V
Reverse Recovery Time –– – 71 11 0 ns TJ = 25°C, IF = -16A
Reverse RecoveryCharge ––– 170 250 nC di/dt = -100A/µs
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
V
= -25V, starting TJ = 25°C, L = 2.1mH
DD
RG = 25Ω, I
I
≤ -16A, di/dt ≤ -280A/µs, V
SD
= -16A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
This is applied for I-PAK, LS of D-PAK is measured between
lead and center of die contact.
Uses IRF5305 data and test conditions.
,
TJ ≤ 175°C
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
** Uses typical socket mount.
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IRFR/U5305PbF
0
A
0
A
A
A
1000
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
100
10
D
-I , Drain-to-Source Current (A)
-4.5V
20µs PULSE WIDTH
T = 25°C
J
1
0.1 1 10 10
-V , Drain-to-Source Voltage (V)
DS
c
Fig 1. Typical Output Characteristics
100
1000
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
100
10
D
-I , Drain-to-Source Current (A)
-4.5V
20µs PULSE WIDTH
T = 175°C
J
1
0.1 1 10 10
-V , Drain-to-Source Voltage (V)
DS
C
Fig 2. Typical Output Characteristics
2.0
I = -27A
D
T = 25°C
J
T = 1 75°C
J
10
1.5
1.0
(Normalized)
0.5
D
-I , Drain-to-Source Current (A)
1
45678910
-V , Gate-to-Source Volta ge (V)
GS
V = -25V
DS
20µs PULSE WIDT H
Fig 3. Typical Transfer Characteristics
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
V = -10V
GS
Vs. Temperature
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IRFR/U5305PbF
A
A
0
A
A
2500
2000
1500
1000
C, Capacitance (pF)
500
0
1 10 100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rss
-V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I = -16A
D
16
12
8
GS
4
-V , Gate-to-Source Voltage (V)
V = -44V
DS
V = -28V
DS
FOR TEST CIRCUIT
0
0 102030405060
Q , Total Gate Charge (nC)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
100
T = 175°C
J
T = 25°C
SD
-I , Reverse Drain Current (A)
10
0.4 0.8 1.2 1.6 2.
-V , Source-to-Drain Voltage (V)
SD
J
Fig 7. Typical Source-Drain Diode
V = 0V
GS
10
D
-I , Drain Current (A)
T = 25°C
C
T = 175°C
J
Sing le Pulse
1
1 10 100
-V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
100µs
1ms
10ms
Forward Voltage
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IRFR/U5305PbF
V
DS
9
1
V
t
t
+
-
R
D.U.T.
D
V
DD
V
G
-10V
DS
V
GS
35
30
25
20
R
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
D
10
-I , Drain Current (A)
5
0
25 50 75 100 125 150 175
T , Case Temperatu re ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Fig 10a. Switching Time Test Circuit
d(on)tr
GS
0%
0%
d(off)tf
Fig 10b. Switching Time Waveforms
Case Temperature
10
thJC
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rect angular Pulse Durati on (sec)
1
Notes:
1. Duty fa cto r D = t / t
2. Peak T =P x Z + T
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR/U5305PbF
V
S
Current Regulator
5
A
(BR)DSS
I
D
A
L
D.U.T
I
AS
0.01
p
DRIVER
Ω
15V
R
V
G
-20V
DS
t
Fig 12a. Unclamped Inductive Test
Circuit
AS
t
p
V
700
+
V
D
600
500
400
300
200
100
AS
V = -25V
E , Single Pulse Avalanche Energy (mJ)
DD
0
25 50 75 100 125 150 17
Starting T , Junction Temperature (°C)
J
I
TOP -6.6A
D
-11A
BOTTOM -16A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Same Type as D.U.T.
Q
G
-10V
Q
GS
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
V
GS
Fig 13b. Gate Charge Test Circuit
50KΩ
.2µF
.3µF
-3mA
Current Sampling Resistors
V
D.U.T.
I
G
+
I
D
6 www.irf.com
D
Page 7
IRFR/U5305PbF
R
V
+
-
Peak Diode Recovery dv/dt Test Circuit
VGS*
+
D.U.T
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
**
R
G
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
D =
G
Period
P.W.
+
VGS=10V
[ ] ***
*
V
DD
D.U.T. ISDWaveform
Reverse
Recovery
Current
e-Applied
oltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
[ ]
I
[ ]
SD
Fig 14. For P-Channel HEXFETS
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IRFR/U5305PbF
9
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE:
Note: "P" in as s embly line position
8 www.irf.com
THIS IS AN IRFR120
WITH ASSEMBLY
LOT CO D E 1234
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
indicates "Lead-F r ee"
OR
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
IRFU120
12 34
PART NUMBER
IRFU 120
916A
12
34
PART NUMBER
DA TE CODE
P = DESIGNATES LE AD-FREE
YEAR 9 = 1999
WEEK 16
A = A SSE MBLY SITE CODE
DATE CODE
YEAR 9 = 199
WE E K 16
LINE A
PRODUCT (OPT IONAL)
Page 9
I-Pak (TO-251AA) Package Outline
9
Dimensions are shown in millimeters (inches)
IRFR/U5305PbF
I-Pak (TO-251AA) Part Marking Information
919A
PART NUMBER
DATE CODE
YEAR 9 = 199
78
WEEK 19
LINE A
EXAMPLE:
THIS IS AN IRFU120
WIT H ASS EMBLY
LOT CODE 5678
A SSEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
Note: "P" in a ssembly line
position indicates "Lead-Free"
INTERNATIONAL
RECTIFIER
LOGO
ASS E MB L Y
LOT C OD E
IRFU120
56
OR
INTER NATIONAL
RECTIFIER
LOGO
AS S E MBLY
LOT CODE
IRF U120
56 78
www.irf.com 9
PART NUMBER
DATE CODE
P = DES IGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
WEE K 19
A = AS S E MB L Y S IT E CODE
Page 10
IRFR/U5305PbF
)
)
N
1
2
3
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
OTES :
. CONTROLLING DIMENSION : MILLIMETER.
. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
FEED DIRECTION
8.1 ( .318 )
7.9 ( .312 )
TRR
TRL
16.3 ( .641
15.7 ( .619
FEED DIRECTION
NOTES :
1. OUTLINE CON FORMS TO EIA-4 81.
Data and specifications subject to change without notice.
16 mm
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10 www.irf.com
Page 11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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