Datasheet irfr3505 Datasheet

Page 1
PD - 94506A
AUTOMOTIVE MOSFET
IRFR3505 IRFU3505
HEXFET® Power MOSFET
Features
● Advanced Process Technology
● Ultra Low On-Resistance
● 175°C Operating Temperature
● Fast Switching
● Repetitive Avalanche Allowed up to Tjmax
G
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this product are a 175°C junction operating temperature, fast switching speed and im­proved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to
1.5 watts are possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon limited) 71 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig.9) 49 A ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited) 30 I
DM
PD @TC = 25°C Power Dissipation 140 W
V
GS
E
AS
E
(tested) Single Pulse Avalanche Energy Tested Value 410
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 4.0 V/ns T
J
T
STG
Pulsed Drain Current 280
Linear Derating Factor 0.92 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 210 mJ
Avalanche Current See Fig.12a, 12b, 15, 16 A Repetitive Avalanche Energy mJ
Operating Junction and -55 to + 175 Storage Temperature Range °C Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
R
θJA
Junction-to-Case ––– 1.09 Junction-to-Ambient (PCB mount) ––– 40 °C/W Junction-to-Ambient ––– 110
www.irf.com 1
D
V
R
DS(on)
I
S
D
D-Pak I-Pak IRFR3505 IRFU3505
= 55V
= 0.013Ω
= 30A
12/11/02
Page 2
IRFR/U3505
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 630 ––– VGS = 0V, VDS = 0V to 44V
oss
Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– 0.011 0.013 Ω VGS = 10V, ID = 30A Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA Forward Transconductance 41 ––– ––– S VDS = 25V, ID = 30A
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -200
––– ––– 20 ––– ––– 250 VDS = 55V, VGS = 0V, TJ = 125°C
µA
nA
= 55V, VGS = 0V
V
DS
VGS = -20V Total Gate Charge ––– 62 93 ID = 30A Gate-to-Source Charge ––– 17 26 nC VDS = 44V Gate-to-Drain ("Miller") Charge ––– 22 33 VGS = 10V Turn-On Delay Time ––– 13 ––– VDD = 28V Rise Time ––– 74 ––– ID = 30A Turn-Off Delay Time ––– 43 ––– RG = 6.8Ω
ns
Fall Time ––– 54 ––– VGS = 10V
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
4.5
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact Input Capacitance ––– 2030 ––– VGS = 0V Output Capacitance ––– 470 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 91 ––– ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 2600 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 330 ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
71
280
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 30A, VGS = 0V Reverse Recovery Time ––– 70 105 ns TJ = 25°C, IF = 30A, VDD = 28V Reverse RecoveryCharge ––– 180 270 nC di/dt = 100A/µs  Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes through are on page 11
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D
S
Page 3
IRFR/U3505
1000
V
TOP 15V
D
100
10
10V
7.0V
6.0V
5.5V
5.0V BOTTOM 4.5V
)
A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
, I
GS
8.0V
4.5V
20µs PULSE WIDTH
1
0.1 1 10 100
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000
1000
V
TOP 15V
D
100
10
10V
7.0V
6.0V
5.5V
5.0V BOTTOM 4.5V
) A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
, I
GS
8.0V
4.5V
20µs PULSE WIDTH
1
0.1 1 10 100
Tj = 175°C
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
70
)
Α
(
t n e
r
100
r u
C e
c
r u o S
­o
t
-
10
n
i a
r D
,
D
I
1
4.0 5. 0 6.0 7. 0 8.0 9. 0 10. 0
TJ = 25°C
TJ = 175°C
V
= 25V
DS
20µs PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
)
60
S
( e
c n
50
a
t c u d n
40
o c s n a
r
30
T d
r a
w
20
r o F ,
s
f
10
G
0
0 102030405060708090
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
TJ = 25°C
TJ = 175°C
V
= 25V
DS
20µs PULSE WIDTH
Vs. Drain Current
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Page 4
IRFR/U3505
4000
3000
) F p
( e
c n a
t
2000
i c a p a
C ,
C
1000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
Cis s
Coss
Crss
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
) A
( t
100.0
n e
r
r u
C n
i a
r D
e s
r e v e R ,
D S
I
TJ = 175°C
10.0
1.0
0.1
0.0 0.5 1.0 1.5 2.0 2.5
VSD, Source-toDrain Voltage (V)
TJ = 25°C
20
SHORTED
ds
gd
) V
( e
g a
t
l o
V e
c
r u o S
­o
t
­e
t a
G ,
V
ID= 30A
16
12
8
S
4
G
0
0 20406080100
Q
VDS= 44V
VDS= 28V VDS= 11V
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
) A
( t n e
r
r
100
u C e
c
r u o S
­o
t
­n
10
i a
r D ,
D
Tc = 25°C
I
V
= 0V
GS
Tj = 175°C Single Pulse
1
1 10 100 1000
V
OPERATION IN THIS AREA LIMITED BY RDS(on)
100µsec
1msec
10msec
, Drain-toSource Voltage (V)
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
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Page 5
IRFR/U3505
80
LIMITED BY PACKAGE
60
) A
( t n e
r
r u
40
C n
i a
r D
,
D
I
20
0
25 50 75 100 125 150 175
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
2. 5
e
c n a
t s
i s e
R n O e
c
r u o S
­o
t
­n
i a
r D
,
) n o
( S D
R
ID = 30A
V
= 10V
GS
2. 0
) d e z
i
l
1. 5
a m
r o
N
(
1. 0
0. 5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junc tion Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
)
C
1
J h
Z (
e s n o p s e
R l a
m
r e h T
t
0. 001
D = 0.50
0.20
0.1
0. 01
1E- 006 1E -005 0. 0001 0. 001 0.01 0. 1
0.10
0.05
0.02
0.01
SINGLE PULSE ( THERMAL RESPONSE )
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRFR/U3505
A
15V
DRIVER
+
-
V
DD
R
20V
V
V
DS
G
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
400
) J
m (
y g
r e
300
n E
e h c n a
l a
200
v A
e s
l u P
e
l
100
g n
i S
, S A
E
0
25 50 75 100 125 150 175
Starting TJ, Junc tion Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4. 0
I
TOP 12A 21A BOTTOM 30A
D
) V
(
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
3. 6
e g a
t
l o
3. 2
V d
l o h s
2. 8
e
r h
t e
t a
2. 4
G
) h
t
( S
2. 0
G
V
1. 6
-75 -50 -25 0 25 50 75 100 125 150 175 200
ID = 250µA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
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Page 7
1000
Duty Cycle = Single Pulse
IRFR/U3505
100
) A
( t n e
r r
u C
10
e h c n a
l a v A
1
0.1
1.0E- 07 1. 0E- 06 1. 0E-05 1. 0E-04 1. 0E-03 1. 0E-02 1. 0E-01
0.01
0.05
0.10
Allowed avalanche Current v s avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses . Note: In no case should Tj be allowed to exceed Tjmax
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
240
TOP Single Puls e
200
) J
m
( y
g
160
r e n E
e
120
h c n a
l a v
80
A ,
R A
E
40
0
25 50 75 100 125 150 175
BOTTOM 10% Duty Cycle ID = 30A
Starting TJ , Junc tion Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T every part type.
. This is validated for
jmax
2. Safe operation in Avalanche is allowed as long asT not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
av
·f
jmax
is
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
Fig 16. Maximum Avalanche Energy
Vs. Temperature
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
D (ave)·tav
thJC
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Page 8
IRFR/U3505
+
-
+
-
Reverse Recovery Current
Driver Gate Drive
P.W.
D.U.T. ISDWaveform
D.U.T. VDSWaveform
D.U.T
+
-
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance Current Transformer
-
+
V
DD
R
G
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
Re-Applied Voltage
Inductor Curent
* V
GS
Period
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P. W .
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
V
DD
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
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Page 9
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
IRFR/U3505
5.46 (.215 )
5.21 (.205 )
1.02 (.040)
1.64 (.025)
1.52 (.060)
1.15 (.045)
1.14 (.045)
2X
0.76 (.030)
2.28 (.090)
6.73 (.265)
6.35 (.250)
- A -
4
1 2 3
1.27 (.050 )
0.88 (.035 )
6.22 (.245)
5.97 (.235)
- B -
0.89 (.035)
3X
0.64 (.025)
0.25 (.010) M A M B
4.57 (.180)
2.38 (.094)
2.19 (.086)
10.42 (.410)
9.40 (.37 0)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JE DEC OU TLINE TO- 252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLD ER DIP MAX. +0. 16 (.0 06).
1.14 (.045)
0.89 (.035)
0.58 (.02 3)
0.46 (.01 8)
6.45 (.245)
5.68 (.224)
0.51 (.02 0) MIN.
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - GAT E
2 - DRAIN
3 - SOURCE 4 - DRAIN
D-Pak (TO-252AA) Part Marking Information
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Page 10
IRFR/U3505
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
5.46 (.215)
5.21 (.205)
1.52 (.060)
1.15 (.045)
- B -
2.28 (.090)
1.91 (.075)
1.14 (.045)
3X
0.76 (.030)
2.28 (.090)
6.73 (.265)
6.35 (.250)
- A -
4
1 2 3
3X
2X
1.27 (.050)
0.88 (.035)
6.22 (.245)
5.97 (.235)
9.65 (.380)
8.89 (.350)
0.89 (.035)
0.64 (.025)
0.25 (.010) M A M B
2.38 (.094)
2.19 (.086)
0.58 (.023)
0.46 (.018)
6.45 (.245)
5.68 (.224)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 C ONFORMS TO J EDEC OUTLINE TO-252AA.
4 D IMENSIONS SHOW N ARE BEF ORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018)
I-Pak (TO-251AA) Part Marking Information
LEAD ASSIGNMENTS
1 - GATE 2 - DRAIN
3 - SOURCE
4 - DRAIN
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Page 11
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
IRFR/U3505
TRL
12.1 ( .476 )
11.9 ( .469 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
 Limited by T
RG = 25Ω, I
, starting TJ = 25°C, L = 0.47mH
Jmax
= 30A, VGS =10V. Part not
AS
recommended for use above this value.
I
≤ 30A, di/dt ≤ 300A/µs, V
SD
DD
≤ V
(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
16.3 ( .641 )
15.7 ( .619 )
FEED DIRECTION
C
as C Limited by T avalanche performance. This value determined from sample failure population. 100%
,
tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
16 mm
eff. is a fixed capacitance that gives the same charging time
oss
oss
while V
is rising from 0 to 80% V
DS
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
FEED DIRECTION
DSS
.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/02
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