Datasheet irfr3411 Datasheet

l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated

Description

Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead, I-Pak, version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications.

PD - 94393

IRFR3411 IRFU3411

HEXFET® Power MOSFET

D

G

S

D-Pak

IRFR3411

V

R

DS(on)

DSS

= 100V

= 44mΩ

ID = 32A

I-Pak

IRFU3411

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 32 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 23 A I

DM

PD @TC = 25°C Power Dissipation 130 W

V

GS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  7.0 V/ns T

J

T

STG

Pulsed Drain Current  110

Linear Derating Factor 0.83 W/°C Gate-to-Source Voltage ± 20 V Avalanche Current 16 A Repetitive Avalanche Energy 13 mJ

Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )

°C

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θJA

R

θJA

www.irf.com 1

Junction-to-Case ––– 1.2 Junction-to-Ambient (PCB mount)* ––– 50 °C/W Junction-to-Ambient ––– 110

02/18/02

IRFR3411/IRFU3411

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

E

AS

Drain-to-Source Breakdown Voltage 100 ––– ––– VVGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– 36 44 mΩ VGS = 10V, ID = 16A  Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA Forward Transconductance 21 ––– ––– SVDS = 50V, ID = 16A

Drain-to-Source Leakage Current

––– ––– 25 ––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C

Gate-to-Source Forward Leakage ––– ––– 100 V Gate-to-Source Reverse Leakage ––– ––– -100

VDS = 100V, VGS = 0V

µA

= 20V

GS

nA

VGS = -20V Total Gate Charge ––– 48 71 ID = 16A Gate-to-Source Charge ––– 9.0 14 nC VDS = 80V Gate-to-Drain ("Miller") Charge ––– 14 21 VGS = 10V, See Fig. 6 and 13 Turn-On Delay Time ––– 11 ––– VDD = 50V Rise Time ––– 35 ––– ID = 16A Turn-Off Delay Time ––– 39 ––– RG = 5.1Ω

ns

Fall Time ––– 35 ––– VGS = 10V, See Fig. 10 

4.5

Internal Drain Inductance

Internal Source Inductance ––– –––

––– –––

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact Input Capacitance ––– 1960 ––– VGS = 0V Output Capacitance ––– 250 ––– VDS = 25V Reverse Transfer Capacitance ––– 40 ––– pF ƒ = 1.0MHz, See Fig. 5 Single Pulse Avalanche Energy ––– 700 185 mJ I

= 16A, L = 1.5mH

AS

D

G

S

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)

––– –––

33

110

showing the

A

p-n junction diode.

G

Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 16A, VGS = 0V  Reverse Recovery Time ––– 115 170 ns TJ = 25°C, IF = 16A Reverse Recovery Charge ––– 505 760 nC di/dt = 100A/µs



Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11)

 Starting T

RG = 25Ω, I

 I

SD

= 25°C, L =1.5mH

J

= 16A. (See Figure 12)

AS

≤ 16A, di/dt ≤ 340A/µs, V

DD

≤ V

(BR)DSS

TJ ≤ 175°C.

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

,

 This is a typical value at device destruction and represents

operation outside rated limits.

 This is a calculated value limited to T

* When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint dering techniques refer to application note #AN-994.

= 175°C .

J

2 www.irf.com

D

S

IRFR3411/IRFU3411

1000

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

1000

VGS

TOP

15V 10V

8.0V

7.0V

6.0V

5.5V



5.0V

BOTTOM

4.5V

20µs PULSE WIDTH



T = 25 C

J

V , Drain-to-Source Voltage (V)

DS

°

1000

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

VGS

TOP

15V 10V

8.0V

7.0V

6.0V

5.5V



5.0V

BOTTOM

4.5V

20µs PULSE WIDTH



T = 175 C

V , Drain-to-Source Voltage (V)

DS

J

4.5V

°

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.5

33A

I =



D

3.0

2.5

°

T = 25 C



100

D

I , Drain-to-Source Current (A)

10

4.0 5.0 6.0 7.0 8.0 9.0

J

°

T = 175 C



J

V = 50V

DS



20µs PULSE WIDTH

V , Gate-to-Source Voltage (V)

GS

Fig 3. Typical Transfer Characteristics

2.0

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

10V



GS

°

Vs. Temperature

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IRFR3411/IRFU3411

gsg

3000

2500

2000

1500

1000

C, Capacitance (pF)

500

0

1 10 100

V

=

0V, C

C C

C



C

iss



oss



rss

f = 1MHz

+ C + C

d , ds

C SHORTED

GS

C

=

iss

C

=

rssgd



C

=

oss dsgd

V , Drain-to-Source Voltage (V)

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

20

I =

16A

D



V = 80V

DS

V = 50V

DS

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

0

0 20 40 60 80

Q , Total Gate Charge (nC)

G



V = 20V

DS

FOR TEST CIRCUIT



SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

OPERATION IN THIS AREA LIMITED BY RDS(on)

13

100

°

T = 175 C



J

10

°

T = 25 C



J

1

SD

I , Reverse Drain Current (A)

V = 0 V



0.1

0.2 0.6 1.0 1.4 1.8

V ,Source-to-Drain Voltage (V)

SD

GS

Fig 7. Typical Source-Drain Diode

100

10

1

, Drain-to-Source Current (A) I

TA = 25°C

D

TJ = 175°C Single Pulse

0.1 1 10 100 1000

V

, Drain-toSource Voltage (V)

DS

100µsec

1msec

10msec

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

IRFR3411/IRFU3411

(

)

35

30

25

20

15

D

I , Drain Current (A)

10

5

0

25 50 75 100 125 150 175

T , Case Temperature

C

°

C

Fig 9. Maximum Drain Current Vs.

Case Temperature

10

R

V

DS

V

GS

R

G

V

GS

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

D

D.U.T.

Fig 10a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

+

V

DD

-

thJC

1

D = 0.50

0.20

0.10

0.1

0.05

0.02

Thermal Response (Z )

0.01

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)



t , Rectangular Pulse Duration (sec)

1

Notes:

1. Duty factor D = t / t



2. Peak T = P x Z + T

J DM thJC C

P

DM

t



1 2

1

t

2

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRFR3411/IRFU3411

A

15V

DRIVER

R

20V

V

DS

G

t

L

D.U.T

I

AS

0.01

p

Ω

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

400

TOP



300

+

V

DD

-

200

100

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150 175

Starting T , Junction Temperature ( C)

J

BOTTOM

I

D

6.5A

11.3A 16A

°

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Current Regulator

Same Type as D.U.T.

50KΩ

Q

G

V

GS

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

12V

Fig 13b. Gate Charge Test Circuit

.2µF

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

I

D

6 www.irf.com

+

V

DS

-

IRFR3411/IRFU3411

Peak Diode Recovery dv/dt Test Circuit

D.U.T*

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance Current Transformer

-

+



-



-

+



R

G

V

GS

• dv/dt controlled by R

• ISD controlled by Duty Factor "D"

G

• D.U.T. - Device Under Test

+

V

DD

-

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.

Period

D =

P.W.

Period

VGS=10V

[ ] ***

D.U.T. ISDWaveform

Reverse Recovery Current

Re-Applied Voltage

D.U.T. VDSWaveform

Inductor Curent

*** V

= 5.0V for Logic Level and 3V Drive Devices

GS

Fig 14. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

®

power MOSFETs

V

DD

[ ]

I

[ ]

SD

www.irf.com 7

IRFR3411/IRFU3411

IRFU120

916A

LOT CODE

ASSEMBLY

EXAMPL E:

WIT H AS SEMBLY

THIS IS AN IRF R120

YEAR 9 = 1999

DATE CO DE

LINE A

WEE K 16

IN THE ASSEMBLY LINE "A"

ASSEMBLED ON WW 16, 1999

LOT CODE 1234

PART NUM BER

INTERNAT IONAL

LOGO

RECTIFIER

3412

D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

5.46 (.215)

5.21 (.205)

1.02 (.04 0)

1.64 (.02 5)

1.52 (.060)

1.15 (.045)

1.14 (.045)

2X

0.76 (.030)

2.28 (.090)

6.73 (.265)

6.35 (.250)

- A -

4

1 2 3

1.27 (.050)

0.88 (.035)

6.22 (.245)

5.97 (.235)

- B -

0.89 (.035 )

3X

0.64 (.025 )

0.25 (.01 0) M A M B

4.57 (.180)

2.38 (.09 4)

2.19 (.08 6)

10.42 (.410 )

9.40 (.370)

NOTES: 1 DIME N SIONING & T OLE R AN C ING PE R AN S I Y14.5M, 1982 . 2 CONTROLLING DIMENSION : INCH. 3 C ON FO RMS TO JED EC OU TL IN E T O- 252AA . 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SO LDER DIP MA X. +0.16 (.006).

1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

0.51 (.020) M IN.

0.58 (.023)

0.46 (.018)

LEAD ASSIGNMENTS 1 - GA TE 2 - D RA IN 3 - S OUR CE 4 - D RA IN

D-Pak (TO-252AA) Part Marking Information

8 www.irf.com

I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

IRFR3411/IRFU3411

5.46 (.215)

5.21 (.205)

1.52 (.060)

1.15 (.045)

- B -

2.28 (.090)

1.91 (.075)

1.14 (.045)

3X

0.76 (.030)

2.28 (.090) 2X

6.73 (.265)

6.35 (.250)

- A -

4

1 2 3

1.27 (.050)

0.88 (.035)

6.22 (.2 45)

5.97 (.2 35)

9.65 (.380)

8.89 (.350)

0.89 (.035)

3X

0.64 (.025)

0.25 ( .01 0 ) M A M B

2.38 (.094)

2.19 (.086)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 C O NFO RMS TO JEDEC OUTLINE TO- 252AA . 4 D IM ENSION S SHO W N A RE BE FORE S O LDER D IP, S O LD E R DIP MA X. +0.16 (.006).

1.14 (.04 5)

0.89 (.03 5)

0.58 (.023)

0.46 (.018)

I-Pak (TO-251AA) Part Marking Information

LEAD ASSIGNMEN TS 1 - GATE 2 - DRA IN 3 - SOURCE 4 - DRA IN

EXAMPL E:

THIS IS AN IRFR120 WI TH ASSEMBL Y LOT CODE 5678 A SSEMBLED ON WW 19, 1999 IN TH E ASSEMBLY LINE "A"

INTERNAT IONAL

RECTIFIER

LOGO

ASSEMBLY

IRFU120

919A

56 78

PART NUM BER

DATE CO DE YEAR 9 = 1999 WEE K 19 LINE A

LOT CODE

www.irf.com 9

IRFR3411/IRFU3411

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TR

16.3 ( .641 )

15.7 ( .619 )

12.1 ( .476 )

11.9 ( .469 )

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIO NS AR E SHO WN IN MILLIMETERS ( IN CHES ).

3. O U TLINE CON FOR M S TO EIA-481 & EIA-541.

1 3 INC H

FEED DIRECTION

8.1 ( .318 )

7.9 ( .312 )

TRR

TRL

16 .3 ( .6 4 1 ) 15 .7 ( .6 1 9 )

FEED DIRECTION

16 m m

NOTES :

1. O U TLINE CON FOR M S TO EIA-481.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.02/02

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