Page 1
SMPS MOSFET
Trr
Absolute Maximum Ratings
ID @ TC = 25°C
Continuous Drain Current, V
@ 10V
ID @ TC = 100°C
Continuous Drain Current, V
@ 10V
I
PD @TC = 25°C
V
T
T
Diode Characteristics
Units
TJ = 125°C, di/dt = 100A/µs
f
TJ = 125°C, di/dt = 100A/µs
f
I
)
Document Number: 91255
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1
IRFPS29N60LPbF
PD - 95907
Applications
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
V
600V
HEXFET® Power MOSFET
DSSRDS(on)
175m
• Motor Control applications
• Lead-Free
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Enhanced dv/dt capabilities offer improved ruggedness.
• Higher Gate voltage threshold offers improved noise immunity
Parameter Max. Units
29
18 A
110
15 V/ns
DM
GS
dv/dt Peak Diode Recovery dv/dt
J
STG
Pulsed Drain Current
Power Dissipat ion 480 W
Linear Derating Factor 3.8 W/°C
Gate-to-Source Voltage ±30 V
Operating Junction and -55 to + 150
Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 1.1(10) N•m (lbf•in)
c
GS
GS
e
typ.
typ.
Ω 130ns 29A
Super-247™
.
I
D
Symbol Parameter Min. Typ. Max.
I
S
I
SM
V
SD
t
rr
Q
rr
RRM
t
on
Conditions
Continuous Source Current ––– ––– 29 MOSFET symbol
(Body Diode) A showing the
Pulsed Source Current ––– ––– 110 integral reverse
(Body Diode)
Diode Forward Voltage ––– ––– 1.5 V
Reverse Recovery Time ––– 130 190 ns
Reverse Recovery Charge ––– 630 950 nC
Reverse Recovery Current ––– 9.4 14 A
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD
c
––– 240 360
––– 1820 2720
p-n junction diode.
= 25°C, IS = 29A, VGS = 0V
T
J
= 25°C, IF = 29A
T
J
= 25°C, IS = 29A, VGS = 0V
T
J
= 25°C
T
J
f
f
09/15/04
Page 2
IRFPS29N60LPbF
V
V
/∆T
R
V
I
I
R
Q
Q
Q
t
t
t
t
C
C
C
C
eff.
C
eff. (ER)
EASSingle Pulse A v a l a nc he Energ y
d
IARAvalanche Current
c
EARRepeti ti ve Avalanche Energy
c
R
Junction-to-Case
h
R
R
Junction-to-Ambient
h
Document Number: 91255
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2
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
(BR)DSS
∆
DS(on)
GS(th)
DSS
GSS
G
(BR)DSS
Drain-to-Sou r c e B reakdown Volta ge 600 ––– ––– V
Breakdown Voltage Temp. Coefficie nt ––– 0.53 ––– V/°C
J
Stat ic D r ai n- to-Sou r c e O n-R esistance – –– 175 210
Gate Threshold Voltage 3.0 ––– 5.0 V
Drain-to-Sou r c e Leakage Cu rr ent ––– ––– 50 µA
––– ––– 2.0 mA
Gate-t o- Source Forward Leakage ––– ––– 100 nA
Gate-to-Sou r c e R ev e r s e Leakage ––– ––– -100
Internal Gate Resistance ––– 0.86 –––
VGS = 0V, ID = 250µA
Reference to 25°C, I
V
mΩ
GS
V
DS
V
DS
V
DS
VGS = 30V
V
GS
Ω
f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
gfs Forwa r d Transconductance 15 ––– ––– S
g
gs
gd
d(on)
r
d(off)
f
iss
oss
rss
oss
oss
Total Gate Charge ––– ––– 220
Gate-to-Sou r c e C ha r ge ––– ––– 67 nC
Gate-to-Drain ("Miller") Charge ––– ––– 96
Turn-On Delay Time ––– 34 –––
Rise Time ––– 100 ––– ns
Turn-Off Delay Time ––– 66 –––
Fall Time ––– 54 –––
Input Capacitance ––– 6160 –––
Output Capacitance ––– 530 –––
Revers e Tr ansfer C ap acitanc e ––– 44 ––– pF
Effe c tive Out put Capac i t a nce ––– 250 –––
Effective Output Capacitance ––– 190 –––
(Energy Related)
VDS = 50V, ID = 17A
= 29A
I
D
V
DS
V
GS
VDD = 300V
I
= 29A
D
R
G
V
GS
VGS = 0V
V
DS
ƒ = 1.0MHz , See Fig . 5
V
GS
Avalanche Characteristics
Symbol
Parameter Typ. Units
––– mJ
––– A
––– mJ
Thermal Resi stance
Symbol Para met e r Typ. Units
JC
θ
CS
θ
JA
θ
Case-t o- Sink, Flat, Greased Surface 0.24 °C/W
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting T
I
AS
I
SD
TJ ≤ 150°C.
= 25°C, L = 1.5mH, RG = 25Ω,
J
= 29A. (See Figure 12a)
≤ 29A, di/dt ≤ 830A/µs, V
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
while VDS is rising from 0 to 80% V
oss
C
eff.(ER) is a fixed capacitance that stores the same energy
oss
as C
while VDS is rising from 0 to 80% V
,
oss
R
is measured at TJ approximately 90°C
θ
–––
–––
Conditions
= 1mA
D
= 10V, ID = 17A
f
= VGS, ID = 250µA
= 600V, VGS = 0V
= 480V, VGS = 0V, TJ = 125°C
= -30V
Conditions
= 480V
= 10V, See Fig . 7 & 15
= 4.3Ω
= 10V, See Fig . 11a & 11b
= 25V
= 0V,VDS = 0V to 480V
Max.
570
29
48
Max.
0.26
–––
40
.
DSS
.
DSS
f
f
g
Page 3
IRFPS29N60LPbF
Document Number: 91255
www.vishay.com
3
1000
TOP 15V
)
100
A
(
t
n
e
r
r
u
C
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
D
I
10
1
0.1
BOTTOM 4.5V
VGS
10V
9.0V
7.0V
7.0V
5.5V
5.0V
20µs PULSE WIDTH
Tj = 25°C
4.5V
0.01
0.1 1 10 100
VDS, Drain-to-Source V oltage (V)
1000.00
)
Α
100.00
(
t
n
e
r
r
u
C
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
I
D
10.00
1.00
0.10
TJ = 150°C
TJ = 25°C
V
= 50V
DS
20µs PULSE WIDTH
0.01
4 6 8 10
VGS, Gate-to-Source Vol tage (V)
100
TOP 15V
)
A
(
t
n
e
r
10
r
u
C
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
D
I
BOTTOM 4.5V
1
VGS
10V
9.0V
7.0V
7.0V
5.5V
5.0V
4.5V
20µs PULSE WIDTH
Tj = 150°C
0.1
0.1 1 10 100
VDS, Drain-to-Source V oltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
e
c
n
a
t
s
i
s
e
R
n
O
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
)
n
o
(
S
D
R
ID = 28A
V
= 10V
GS
2.5
2.0
)
d
e
z
i
1.5
l
a
m
r
o
N
(
1.0
0.5
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (° C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
Page 4
IRFPS29N60LPbF
Document Number: 91255
www.vishay.com
4
100000
10000
)
F
p
(
e
c
n
a
t
i
1000
c
a
p
a
C
,
C
100
10
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
iss
C
rss
C
oss
1 10 100 1000
VDS, Drain-to-Source V oltage (V)
SHORTED
ds
gd
C
iss
C
oss
C
rss
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
20
ID= 28A
)
V
(
16
e
g
a
t
l
o
V
12
e
c
r
u
o
S
-
o
8
t
-
e
t
a
G
,
S
4
G
V
0
0 40 80 120 160 200 240
VDS= 480V
VDS= 300V
VDS= 150V
Q
Total G ate Charge (nC)
G
40
35
30
25
)
J
µ
(
y
20
g
r
e
n
E
15
10
1000.00
)
A
(
100.00
t
n
e
r
r
u
C
n
i
a
r
10.00
D
e
s
r
e
v
e
R
,
1.00
D
S
I
0.10
5
0
0 100 200 300 400 500 600 700
V
Drain-to-Source Vol tage (V)
DS,
Fig 6. Typ. Output Capacitance
Stored Energy vs. V
TJ = 150°C
TJ = 25°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD, Source-to-Drain V oltage (V)
DS
V
GS
= 0V
Fig 7. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 8. Typical Source-Drain Diode
Forward Voltage
Page 5
IRFPS29N60LPbF
+
-
V
9
1
V
Document Number: 91255
www.vishay.com
5
1000
OPERATION IN THIS AREA
)
A
(
t
n
e
r
r
u
C
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
I
100
10
D
1
Tc = 25°C
Tj = 150°C
Single Pulse
LIMITED BY RDS(on)
100µsec
1msec
10msec
0.1
1 10 100 1000 10000
VDS, Drain-to-Source V oltage (V)
Fig 9. Maximum Safe Operating Area
30
25
)
A
(
20
t
n
e
r
r
u
C
15
n
i
a
r
D
10
,
D
I
5
0
25 50 75 100 125 150
TC , Case Temper ature (°C)
Fig 10. Maximum Drain Current vs.
Case Temperature
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 11a. Switching Time Test Circuit
DS
0%
V
DD
0%
GS
t
d(on)tr
t
d(off)tf
Fig 11b. Switching Time Waveforms
Page 6
IRFPS29N60LPbF
Document Number: 91255
www.vishay.com
6
1
)
C
J
h
t
Z
(
e
s
n
o
p
s
e
R
l
a
m
r
e
h
T
D = 0.50
0.1
0.01
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
t1 , Rectangular Pulse Duration (sec)
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5.0
)
V
(
e
g
4.0
a
t
l
o
V
d
l
o
h
s
3.0
e
r
h
t
e
t
a
G
)
h
2.0
t
(
S
G
V
1.0
-75 -50 -25 0 25 50 75 100 125 150
TJ , Temperature ( °C )
ID = 250µA
Fig 13. Threshold Voltage vs. Temperature
Page 7
IRFPS29N60LPbF
S
Current Regulator
I
A
V
Document Number: 91255
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7
1200
)
J
m
(
y
1000
g
r
e
n
E
e
800
h
c
n
a
l
a
600
v
A
e
s
l
u
400
P
e
l
g
n
i
S
200
,
S
A
E
0
25 50 75 100 125 150
TOP 13A
BOTTOM29A
Starting TJ , Junction Temperature (° C)
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
15V
V
DS
L
DRIVER
I
D
18A
V
(BR)DSS
t
p
R
G
20V
D.U.T
I
AS
Ω
0.01
t
p
+
V
DD
-
Fig 14b. Unclamped Inductive Test Circuit
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
D
-
I
D
Fig 15a. Gate Charge Test Circuit
AS
Fig 14c. Unclamped Inductive Waveforms
Q
G
VGS V
Q
GS
G
Q
GD
Charge
Fig 15b. Basic Gate Charge Waveform
Page 8
IRFPS29N60LPbF
R
V
+
-
Document Number: 91255
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8
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P.W.
Period
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
e-Applied
oltage
D.U.T. ISDWaveform
Body Diode Forward
Current
dv/dt
di/dt
V
DD
I
SD
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Diode Recovery
Fig 16. For N-Channel HEXFET® Power MOSFETs
Page 9
IRFPS29N60LPbF
Document Number: 91255
www.vishay.com
9
Case Outline and Dimensions — Super-247
Super-247 (TO-274AA) Part Marking Information
EXAMPLE: THIS IS AN IRFPS37N50A WITH
Note: "P" in ass em bly line posit io n
ASSEMBLY LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
INTERN ATIONAL RE CTIFIER
LOGO
ASSEMBLY LOT CODE
indicates "Lead-Free "
IRFPS37N50A
17
TOP
719C
89
PART NU M BE R
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
Super TO-247™ package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
09/04
Page 10
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of
International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the
products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or
anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
International Rectifier
are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product
names noted herein may be trademarks of their respective owners.
®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com
Revision: 12-Mar-07 1
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